]>
Commit | Line | Data |
---|---|---|
1 | #------------------------------------------------------------------------------\r | |
2 | #*\r | |
3 | #* Copyright 2006, Intel Corporation \r | |
4 | #* All rights reserved. This program and the accompanying materials \r | |
5 | #* are licensed and made available under the terms and conditions of the BSD License \r | |
6 | #* which accompanies this distribution. The full text of the license may be found at \r | |
7 | #* http://opensource.org/licenses/bsd-license.php \r | |
8 | #* \r | |
9 | #* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
10 | #* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
11 | #* \r | |
12 | #* CpuInterrupt.S\r | |
13 | #* \r | |
14 | #* Abstract:\r | |
15 | #*\r | |
16 | #------------------------------------------------------------------------------\r | |
17 | \r | |
18 | #PUBLIC SystemTimerHandler\r | |
19 | #PUBLIC SystemExceptionHandler\r | |
20 | #EXTERNDEF mExceptionCodeSize:DWORD\r | |
21 | \r | |
22 | #EXTERN TimerHandler: NEAR\r | |
23 | #EXTERN ExceptionHandler: NEAR\r | |
24 | #EXTERN mTimerVector: DWORD\r | |
25 | \r | |
26 | .data\r | |
27 | .globl ASM_PFX(mExceptionCodeSize)\r | |
28 | ASM_PFX(mExceptionCodeSize): .long 9\r | |
29 | \r | |
30 | .text\r | |
31 | .globl ASM_PFX(InitDescriptor)\r | |
32 | \r | |
33 | ASM_PFX(InitDescriptor):\r | |
34 | movl $GDT_BASE,%eax # EAX=PHYSICAL address of gdt\r | |
35 | movl %eax, gdtr + 2 # Put address of gdt into the gdtr\r | |
36 | lgdt gdtr\r | |
37 | movl $IDT_BASE,%eax # EAX=PHYSICAL address of idt\r | |
38 | movl %eax, idtr + 2 # Put address of idt into the idtr\r | |
39 | lidt idtr\r | |
40 | ret\r | |
41 | \r | |
42 | # VOID\r | |
43 | # InstallInterruptHandler (\r | |
44 | # UINTN Vector,\r | |
45 | # VOID (*Handler)(VOID)\r | |
46 | # )\r | |
47 | .globl ASM_PFX(InstallInterruptHandler)\r | |
48 | ASM_PFX(InstallInterruptHandler):\r | |
49 | # Vector:DWORD @ 4(%esp)\r | |
50 | # Handler:DWORD @ 8(%esp)\r | |
51 | \r | |
52 | push %edi\r | |
53 | pushf # save eflags\r | |
54 | cli # turn off interrupts\r | |
55 | subl $6,%esp # open some space on the stack\r | |
56 | movl %esp,%edi\r | |
57 | sidt (%edi) # get fword address of IDT\r | |
58 | movl 2(%edi), %edi # move offset of IDT into EDI\r | |
59 | addl $6,%esp # correct stack\r | |
60 | movl 12(%esp),%eax # Get vector number\r | |
61 | shl $3,%eax # multiply by 8 to get offset\r | |
62 | addl %eax,%edi # add to IDT base to get entry\r | |
63 | movl 16(%esp),%eax # load new address into IDT entry\r | |
64 | movw %ax,(%edi) # write bits 15..0 of offset\r | |
65 | shrl $16,%eax # use ax to copy 31..16 to descriptors\r | |
66 | movw %ax,6(%edi) # write bits 31..16 of offset\r | |
67 | popf # restore flags (possible enabling interrupts)\r | |
68 | pop %edi\r | |
69 | ret\r | |
70 | \r | |
71 | .macro JmpCommonIdtEntry\r | |
72 | # jmp commonIdtEntry - this must be hand coded to keep the assembler from\r | |
73 | # using a 8 bit reletive jump when the entries are\r | |
74 | # within 255 bytes of the common entry. This must\r | |
75 | # be done to maintain the consistency of the size\r | |
76 | # of entry points...\r | |
77 | .byte 0xe9 # jmp 16 bit reletive \r | |
78 | .long commonIdtEntry - . - 4 # offset to jump to\r | |
79 | .endm\r | |
80 | \r | |
81 | .align 2\r | |
82 | .globl ASM_PFX(SystemExceptionHandler)\r | |
83 | ASM_PFX(SystemExceptionHandler):\r | |
84 | INT0:\r | |
85 | pushl $0x0 # push error code place holder on the stack\r | |
86 | pushl $0x0 \r | |
87 | JmpCommonIdtEntry\r | |
88 | # db 0e9h # jmp 16 bit reletive \r | |
89 | # dd commonIdtEntry - $ - 4 # offset to jump to\r | |
90 | \r | |
91 | INT1:\r | |
92 | pushl $0x0 # push error code place holder on the stack\r | |
93 | pushl $0x1 \r | |
94 | JmpCommonIdtEntry\r | |
95 | \r | |
96 | INT2:\r | |
97 | pushl $0x0 # push error code place holder on the stack\r | |
98 | pushl $0x2 \r | |
99 | JmpCommonIdtEntry\r | |
100 | \r | |
101 | INT3:\r | |
102 | pushl $0x0 # push error code place holder on the stack\r | |
103 | pushl $0x3 \r | |
104 | JmpCommonIdtEntry\r | |
105 | \r | |
106 | INT4:\r | |
107 | pushl $0x0 # push error code place holder on the stack\r | |
108 | pushl $0x4 \r | |
109 | JmpCommonIdtEntry\r | |
110 | \r | |
111 | INT5:\r | |
112 | pushl $0x0 # push error code place holder on the stack\r | |
113 | pushl $0x5 \r | |
114 | JmpCommonIdtEntry\r | |
115 | \r | |
116 | INT6:\r | |
117 | pushl $0x0 # push error code place holder on the stack\r | |
118 | pushl $0x6 \r | |
119 | JmpCommonIdtEntry\r | |
120 | \r | |
121 | INT7:\r | |
122 | pushl $0x0 # push error code place holder on the stack\r | |
123 | pushl $0x7 \r | |
124 | JmpCommonIdtEntry\r | |
125 | \r | |
126 | INT8:\r | |
127 | # Double fault causes an error code to be pushed so no phony push necessary\r | |
128 | nop\r | |
129 | nop\r | |
130 | pushl $0x8 \r | |
131 | JmpCommonIdtEntry\r | |
132 | \r | |
133 | INT9:\r | |
134 | pushl $0x0 # push error code place holder on the stack\r | |
135 | pushl $0x9 \r | |
136 | JmpCommonIdtEntry\r | |
137 | \r | |
138 | INT10:\r | |
139 | # Invalid TSS causes an error code to be pushed so no phony push necessary\r | |
140 | nop\r | |
141 | nop\r | |
142 | pushl $10\r | |
143 | JmpCommonIdtEntry\r | |
144 | \r | |
145 | INT11:\r | |
146 | # Segment Not Present causes an error code to be pushed so no phony push necessary\r | |
147 | nop\r | |
148 | nop\r | |
149 | pushl $11\r | |
150 | JmpCommonIdtEntry\r | |
151 | \r | |
152 | INT12:\r | |
153 | # Stack fault causes an error code to be pushed so no phony push necessary\r | |
154 | nop\r | |
155 | nop\r | |
156 | pushl $12\r | |
157 | JmpCommonIdtEntry\r | |
158 | \r | |
159 | INT13:\r | |
160 | # GP fault causes an error code to be pushed so no phony push necessary\r | |
161 | nop\r | |
162 | nop\r | |
163 | pushl $13\r | |
164 | JmpCommonIdtEntry\r | |
165 | \r | |
166 | INT14:\r | |
167 | # Page fault causes an error code to be pushed so no phony push necessary\r | |
168 | nop\r | |
169 | nop\r | |
170 | pushl $14\r | |
171 | JmpCommonIdtEntry\r | |
172 | \r | |
173 | INT15:\r | |
174 | pushl $0x0 # push error code place holder on the stack\r | |
175 | pushl $15\r | |
176 | JmpCommonIdtEntry\r | |
177 | \r | |
178 | INT16:\r | |
179 | pushl $0x0 # push error code place holder on the stack\r | |
180 | pushl $16\r | |
181 | JmpCommonIdtEntry\r | |
182 | \r | |
183 | INT17:\r | |
184 | # Alignment check causes an error code to be pushed so no phony push necessary\r | |
185 | nop\r | |
186 | nop\r | |
187 | pushl $17\r | |
188 | JmpCommonIdtEntry\r | |
189 | \r | |
190 | INT18:\r | |
191 | pushl $0x0 # push error code place holder on the stack\r | |
192 | pushl $18\r | |
193 | JmpCommonIdtEntry\r | |
194 | \r | |
195 | INT19:\r | |
196 | pushl $0x0 # push error code place holder on the stack\r | |
197 | pushl $19\r | |
198 | JmpCommonIdtEntry\r | |
199 | \r | |
200 | INTUnknown:\r | |
201 | .rept (32 - 20)\r | |
202 | pushl $0x0 # push error code place holder on the stack\r | |
203 | # push xxh # push vector number\r | |
204 | .byte 0x6a\r | |
205 | .byte ( . - INTUnknown - 3 ) / 9 + 20 # vector number\r | |
206 | JmpCommonIdtEntry\r | |
207 | .endr\r | |
208 | \r | |
209 | .globl ASM_PFX(SystemTimerHandler)\r | |
210 | ASM_PFX(SystemTimerHandler):\r | |
211 | pushl $0\r | |
212 | pushl $ASM_PFX(mTimerVector)\r | |
213 | JmpCommonIdtEntry\r | |
214 | \r | |
215 | commonIdtEntry:\r | |
216 | # +---------------------+\r | |
217 | # + EFlags +\r | |
218 | # +---------------------+\r | |
219 | # + CS +\r | |
220 | # +---------------------+\r | |
221 | # + EIP +\r | |
222 | # +---------------------+\r | |
223 | # + Error Code +\r | |
224 | # +---------------------+\r | |
225 | # + Vector Number +\r | |
226 | # +---------------------+\r | |
227 | # + EBP +\r | |
228 | # +---------------------+ <-- EBP\r | |
229 | \r | |
230 | cli\r | |
231 | push %ebp\r | |
232 | movl %esp,%ebp\r | |
233 | \r | |
234 | #\r | |
235 | # Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32\r | |
236 | # is 16-byte aligned\r | |
237 | #\r | |
238 | andl $0xfffffff0,%esp\r | |
239 | subl $12,%esp\r | |
240 | \r | |
241 | ## UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax#\r | |
242 | push %eax\r | |
243 | push %ecx\r | |
244 | push %edx\r | |
245 | push %ebx\r | |
246 | leal 6*4(%ebp),%ecx\r | |
247 | push %ecx # ESP\r | |
248 | push (%ebp) # EBP\r | |
249 | push %esi\r | |
250 | push %edi\r | |
251 | \r | |
252 | ## UINT32 Gs, Fs, Es, Ds, Cs, Ss#\r | |
253 | movw %ss,%ax\r | |
254 | push %eax\r | |
255 | movzx 4*4(%ebp),%eax\r | |
256 | push %eax\r | |
257 | movw %ds,%ax\r | |
258 | push %eax\r | |
259 | movw %es,%ax\r | |
260 | push %eax\r | |
261 | movw %fs,%ax\r | |
262 | push %eax\r | |
263 | movw %gs,%ax\r | |
264 | push %eax\r | |
265 | \r | |
266 | ## UINT32 Eip#\r | |
267 | pushl 3*4(%ebp)\r | |
268 | \r | |
269 | ## UINT32 Gdtr[2], Idtr[2]#\r | |
270 | subl $8,%esp\r | |
271 | sidt (%esp)\r | |
272 | subl $8,%esp\r | |
273 | sgdt (%esp)\r | |
274 | \r | |
275 | ## UINT32 Ldtr, Tr#\r | |
276 | xorl %eax, %eax\r | |
277 | str %ax\r | |
278 | push %eax\r | |
279 | sldt %eax\r | |
280 | push %eax\r | |
281 | \r | |
282 | ## UINT32 EFlags#\r | |
283 | pushl 5*4(%ebp)\r | |
284 | \r | |
285 | ## UINT32 Cr0, Cr1, Cr2, Cr3, Cr4#\r | |
286 | mov %cr4,%eax\r | |
287 | orl $0x208,%eax\r | |
288 | mov %eax,%cr4\r | |
289 | push %eax\r | |
290 | mov %cr3,%eax\r | |
291 | push %eax\r | |
292 | mov %cr2,%eax\r | |
293 | push %eax\r | |
294 | xor %eax, %eax\r | |
295 | push %eax\r | |
296 | mov %cr0,%eax\r | |
297 | push %eax\r | |
298 | \r | |
299 | ## UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7#\r | |
300 | mov %dr7,%eax\r | |
301 | push %eax\r | |
302 | ## clear Dr7 while executing debugger itself\r | |
303 | xor %eax, %eax\r | |
304 | mov %eax,%dr7\r | |
305 | \r | |
306 | mov %dr6,%eax\r | |
307 | push %eax\r | |
308 | ## insure all status bits in dr6 are clear...\r | |
309 | xor %eax, %eax\r | |
310 | mov %eax,%dr6\r | |
311 | \r | |
312 | mov %dr3,%eax\r | |
313 | push %eax\r | |
314 | mov %dr2,%eax\r | |
315 | push %eax\r | |
316 | mov %dr1,%eax\r | |
317 | push %eax\r | |
318 | mov %dr0,%eax\r | |
319 | push %eax\r | |
320 | \r | |
321 | ## FX_SAVE_STATE_IA32 FxSaveState;\r | |
322 | sub $512,%esp\r | |
323 | mov %esp,%edi\r | |
324 | fxsave (%edi)\r | |
325 | \r | |
326 | ## UINT32 ExceptionData;\r | |
327 | pushl 2*4(%ebp)\r | |
328 | \r | |
329 | ## Prepare parameter and call\r | |
330 | mov %esp,%edx\r | |
331 | push %edx\r | |
332 | mov 1*4(%ebp),%eax\r | |
333 | push %eax\r | |
334 | cmpl $32,%eax\r | |
335 | jb CallException\r | |
336 | call ASM_PFX(TimerHandler)\r | |
337 | jmp ExceptionDone\r | |
338 | CallException:\r | |
339 | call ASM_PFX(ExceptionHandler)\r | |
340 | ExceptionDone:\r | |
341 | addl $8,%esp\r | |
342 | \r | |
343 | cli\r | |
344 | ## UINT32 ExceptionData;\r | |
345 | addl $4,%esp\r | |
346 | \r | |
347 | ## FX_SAVE_STATE_IA32 FxSaveState;\r | |
348 | mov %esp,%esi\r | |
349 | fxrstor (%esi)\r | |
350 | addl $512,%esp\r | |
351 | \r | |
352 | #; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r | |
353 | pop %eax\r | |
354 | mov %eax,%dr0\r | |
355 | pop %eax\r | |
356 | mov %eax,%dr1\r | |
357 | pop %eax\r | |
358 | mov %eax,%dr2\r | |
359 | pop %eax\r | |
360 | mov %eax,%dr3\r | |
361 | ## skip restore of dr6. We cleared dr6 during the context save.\r | |
362 | addl $4,%esp\r | |
363 | pop %eax\r | |
364 | mov %eax,%dr7\r | |
365 | \r | |
366 | ## UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r | |
367 | pop %eax\r | |
368 | mov %eax,%cr0\r | |
369 | addl $4,%esp # not for Cr1\r | |
370 | pop %eax\r | |
371 | mov %eax,%cr2\r | |
372 | pop %eax\r | |
373 | mov %eax,%cr3\r | |
374 | pop %eax\r | |
375 | mov %eax,%cr4\r | |
376 | \r | |
377 | ## UINT32 EFlags;\r | |
378 | popl 5*4(%ebp)\r | |
379 | \r | |
380 | ## UINT32 Ldtr, Tr;\r | |
381 | ## UINT32 Gdtr[2], Idtr[2];\r | |
382 | ## Best not let anyone mess with these particular registers...\r | |
383 | addl $24,%esp\r | |
384 | \r | |
385 | ## UINT32 Eip;\r | |
386 | popl 3*4(%ebp)\r | |
387 | \r | |
388 | ## UINT32 Gs, Fs, Es, Ds, Cs, Ss;\r | |
389 | ## NOTE - modified segment registers could hang the debugger... We\r | |
390 | ## could attempt to insulate ourselves against this possibility,\r | |
391 | ## but that poses risks as well.\r | |
392 | ##\r | |
393 | pop %gs\r | |
394 | pop %fs\r | |
395 | pop %es\r | |
396 | pop %ds\r | |
397 | popl 4*4(%ebp)\r | |
398 | pop %ss\r | |
399 | \r | |
400 | ## UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;\r | |
401 | pop %edi\r | |
402 | pop %esi\r | |
403 | addl $4,%esp # not for ebp\r | |
404 | addl $4,%esp # not for esp\r | |
405 | pop %ebx\r | |
406 | pop %edx\r | |
407 | pop %ecx\r | |
408 | pop %eax\r | |
409 | \r | |
410 | mov %ebp,%esp\r | |
411 | pop %ebp\r | |
412 | addl $8,%esp\r | |
413 | iret\r | |
414 | \r | |
415 | \r | |
416 | #;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r | |
417 | # data\r | |
418 | #;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r | |
419 | \r | |
420 | .data\r | |
421 | .align 4\r | |
422 | \r | |
423 | gdtr: .short GDT_END - GDT_BASE - 1 # GDT limit\r | |
424 | .long 0 # (GDT base gets set above)\r | |
425 | #;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r | |
426 | # global descriptor table (GDT)\r | |
427 | #;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r | |
428 | \r | |
429 | .align 4\r | |
430 | \r | |
431 | GDT_BASE:\r | |
432 | # null descriptor\r | |
433 | NULL_SEL = .-GDT_BASE\r | |
434 | .short 0 # limit 15:0\r | |
435 | .short 0 # base 15:0\r | |
436 | .byte 0 # base 23:16\r | |
437 | .byte 0 # type\r | |
438 | .byte 0 # limit 19:16, flags\r | |
439 | .byte 0 # base 31:24\r | |
440 | \r | |
441 | # linear data segment descriptor\r | |
442 | LINEAR_SEL = .-GDT_BASE\r | |
443 | .short 0x0FFFF # limit 0xFFFFF\r | |
444 | .short 0 # base 0\r | |
445 | .byte 0\r | |
446 | .byte 0x092 # present, ring 0, data, expand-up, writable\r | |
447 | .byte 0x0CF # page-granular, 32-bit\r | |
448 | .byte 0\r | |
449 | \r | |
450 | # linear code segment descriptor\r | |
451 | LINEAR_CODE_SEL = .-GDT_BASE\r | |
452 | .short 0x0FFFF # limit 0xFFFFF\r | |
453 | .short 0 # base 0\r | |
454 | .byte 0\r | |
455 | .byte 0x09A # present, ring 0, data, expand-up, writable\r | |
456 | .byte 0x0CF # page-granular, 32-bit\r | |
457 | .byte 0\r | |
458 | \r | |
459 | # system data segment descriptor\r | |
460 | SYS_DATA_SEL = .-GDT_BASE\r | |
461 | .short 0x0FFFF # limit 0xFFFFF\r | |
462 | .short 0 # base 0\r | |
463 | .byte 0\r | |
464 | .byte 0x092 # present, ring 0, data, expand-up, writable\r | |
465 | .byte 0x0CF # page-granular, 32-bit\r | |
466 | .byte 0\r | |
467 | \r | |
468 | # system code segment descriptor\r | |
469 | SYS_CODE_SEL = .-GDT_BASE\r | |
470 | .short 0x0FFFF # limit 0xFFFFF\r | |
471 | .short 0 # base 0\r | |
472 | .byte 0\r | |
473 | .byte 0x09A # present, ring 0, data, expand-up, writable\r | |
474 | .byte 0x0CF # page-granular, 32-bit\r | |
475 | .byte 0\r | |
476 | \r | |
477 | # spare segment descriptor\r | |
478 | SPARE3_SEL = .-GDT_BASE\r | |
479 | .short 0 # limit 0xFFFFF\r | |
480 | .short 0 # base 0\r | |
481 | .byte 0\r | |
482 | .byte 0 # present, ring 0, data, expand-up, writable\r | |
483 | .byte 0 # page-granular, 32-bit\r | |
484 | .byte 0\r | |
485 | \r | |
486 | # spare segment descriptor\r | |
487 | SPARE4_SEL = .-GDT_BASE\r | |
488 | .short 0 # limit 0xFFFFF\r | |
489 | .short 0 # base 0\r | |
490 | .byte 0\r | |
491 | .byte 0 # present, ring 0, data, expand-up, writable\r | |
492 | .byte 0 # page-granular, 32-bit\r | |
493 | .byte 0\r | |
494 | \r | |
495 | # spare segment descriptor\r | |
496 | SPARE5_SEL = .-GDT_BASE\r | |
497 | .short 0 # limit 0xFFFFF\r | |
498 | .short 0 # base 0\r | |
499 | .byte 0\r | |
500 | .byte 0 # present, ring 0, data, expand-up, writable\r | |
501 | .byte 0 # page-granular, 32-bit\r | |
502 | .byte 0\r | |
503 | \r | |
504 | GDT_END:\r | |
505 | \r | |
506 | .align 4\r | |
507 | \r | |
508 | \r | |
509 | \r | |
510 | idtr: .short IDT_END - IDT_BASE - 1 # IDT limit\r | |
511 | .long 0 # (IDT base gets set above)\r | |
512 | #;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r | |
513 | # interrupt descriptor table (IDT)\r | |
514 | #\r | |
515 | # Note: The hardware IRQ's specified in this table are the normal PC/AT IRQ\r | |
516 | # mappings. This implementation only uses the system timer and all other\r | |
517 | # IRQs will remain masked. The descriptors for vectors 33+ are provided\r | |
518 | # for convenience.\r | |
519 | #;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\r | |
520 | \r | |
521 | #idt_tag .byte "IDT",0 \r | |
522 | .align 4\r | |
523 | \r | |
524 | IDT_BASE:\r | |
525 | # divide by zero (INT 0)\r | |
526 | DIV_ZERO_SEL = .-IDT_BASE\r | |
527 | .short 0 # offset 15:0\r | |
528 | .short SYS_CODE_SEL # selector 15:0\r | |
529 | .byte 0 # 0 for interrupt gate\r | |
530 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
531 | .short 0 # offset 31:16\r | |
532 | \r | |
533 | # debug exception (INT 1)\r | |
534 | DEBUG_EXCEPT_SEL = .-IDT_BASE\r | |
535 | .short 0 # offset 15:0\r | |
536 | .short SYS_CODE_SEL # selector 15:0\r | |
537 | .byte 0 # 0 for interrupt gate\r | |
538 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
539 | .short 0 # offset 31:16\r | |
540 | \r | |
541 | # NMI (INT 2)\r | |
542 | NMI_SEL = .-IDT_BASE\r | |
543 | .short 0 # offset 15:0\r | |
544 | .short SYS_CODE_SEL # selector 15:0\r | |
545 | .byte 0 # 0 for interrupt gate\r | |
546 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
547 | .short 0 # offset 31:16\r | |
548 | \r | |
549 | # soft breakpoint (INT 3)\r | |
550 | BREAKPOINT_SEL = .-IDT_BASE\r | |
551 | .short 0 # offset 15:0\r | |
552 | .short SYS_CODE_SEL # selector 15:0\r | |
553 | .byte 0 # 0 for interrupt gate\r | |
554 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
555 | .short 0 # offset 31:16\r | |
556 | \r | |
557 | # overflow (INT 4)\r | |
558 | OVERFLOW_SEL = .-IDT_BASE\r | |
559 | .short 0 # offset 15:0\r | |
560 | .short SYS_CODE_SEL # selector 15:0\r | |
561 | .byte 0 # 0 for interrupt gate\r | |
562 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
563 | .short 0 # offset 31:16\r | |
564 | \r | |
565 | # bounds check (INT 5)\r | |
566 | BOUNDS_CHECK_SEL = .-IDT_BASE\r | |
567 | .short 0 # offset 15:0\r | |
568 | .short SYS_CODE_SEL # selector 15:0\r | |
569 | .byte 0 # 0 for interrupt gate\r | |
570 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
571 | .short 0 # offset 31:16\r | |
572 | \r | |
573 | # invalid opcode (INT 6)\r | |
574 | INVALID_OPCODE_SEL = .-IDT_BASE\r | |
575 | .short 0 # offset 15:0\r | |
576 | .short SYS_CODE_SEL # selector 15:0\r | |
577 | .byte 0 # 0 for interrupt gate\r | |
578 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
579 | .short 0 # offset 31:16\r | |
580 | \r | |
581 | # device not available (INT 7)\r | |
582 | DEV_NOT_AVAIL_SEL = .-IDT_BASE\r | |
583 | .short 0 # offset 15:0\r | |
584 | .short SYS_CODE_SEL # selector 15:0\r | |
585 | .byte 0 # 0 for interrupt gate\r | |
586 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
587 | .short 0 # offset 31:16\r | |
588 | \r | |
589 | # double fault (INT 8)\r | |
590 | DOUBLE_FAULT_SEL = .-IDT_BASE\r | |
591 | .short 0 # offset 15:0\r | |
592 | .short SYS_CODE_SEL # selector 15:0\r | |
593 | .byte 0 # 0 for interrupt gate\r | |
594 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
595 | .short 0 # offset 31:16\r | |
596 | \r | |
597 | # Coprocessor segment overrun - reserved (INT 9)\r | |
598 | RSVD_INTR_SEL1 = .-IDT_BASE\r | |
599 | .short 0 # offset 15:0\r | |
600 | .short SYS_CODE_SEL # selector 15:0\r | |
601 | .byte 0 # 0 for interrupt gate\r | |
602 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
603 | .short 0 # offset 31:16\r | |
604 | \r | |
605 | # invalid TSS (INT 0ah)\r | |
606 | INVALID_TSS_SEL = .-IDT_BASE\r | |
607 | .short 0 # offset 15:0\r | |
608 | .short SYS_CODE_SEL # selector 15:0\r | |
609 | .byte 0 # 0 for interrupt gate\r | |
610 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
611 | .short 0 # offset 31:16\r | |
612 | \r | |
613 | # segment not present (INT 0bh)\r | |
614 | SEG_NOT_PRESENT_SEL = .-IDT_BASE\r | |
615 | .short 0 # offset 15:0\r | |
616 | .short SYS_CODE_SEL # selector 15:0\r | |
617 | .byte 0 # 0 for interrupt gate\r | |
618 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
619 | .short 0 # offset 31:16\r | |
620 | \r | |
621 | # stack fault (INT 0ch)\r | |
622 | STACK_FAULT_SEL = .-IDT_BASE\r | |
623 | .short 0 # offset 15:0\r | |
624 | .short SYS_CODE_SEL # selector 15:0\r | |
625 | .byte 0 # 0 for interrupt gate\r | |
626 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
627 | .short 0 # offset 31:16\r | |
628 | \r | |
629 | # general protection (INT 0dh)\r | |
630 | GP_FAULT_SEL = .-IDT_BASE\r | |
631 | .short 0 # offset 15:0\r | |
632 | .short SYS_CODE_SEL # selector 15:0\r | |
633 | .byte 0 # 0 for interrupt gate\r | |
634 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
635 | .short 0 # offset 31:16\r | |
636 | \r | |
637 | # page fault (INT 0eh)\r | |
638 | PAGE_FAULT_SEL = .-IDT_BASE\r | |
639 | .short 0 # offset 15:0\r | |
640 | .short SYS_CODE_SEL # selector 15:0\r | |
641 | .byte 0 # 0 for interrupt gate\r | |
642 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
643 | .short 0 # offset 31:16\r | |
644 | \r | |
645 | # Intel reserved - do not use (INT 0fh)\r | |
646 | RSVD_INTR_SEL2 = .-IDT_BASE\r | |
647 | .short 0 # offset 15:0\r | |
648 | .short SYS_CODE_SEL # selector 15:0\r | |
649 | .byte 0 # 0 for interrupt gate\r | |
650 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
651 | .short 0 # offset 31:16\r | |
652 | \r | |
653 | # floating point error (INT 0x10)\r | |
654 | FLT_POINT_ERR_SEL = .-IDT_BASE\r | |
655 | .short 0 # offset 15:0\r | |
656 | .short SYS_CODE_SEL # selector 15:0\r | |
657 | .byte 0 # 0 for interrupt gate\r | |
658 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
659 | .short 0 # offset 31:16\r | |
660 | \r | |
661 | # alignment check (INT 0x11)\r | |
662 | ALIGNMENT_CHECK_SEL = .-IDT_BASE\r | |
663 | .short 0 # offset 15:0\r | |
664 | .short SYS_CODE_SEL # selector 15:0\r | |
665 | .byte 0 # 0 for interrupt gate\r | |
666 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
667 | .short 0 # offset 31:16\r | |
668 | \r | |
669 | # machine check (INT 0x12)\r | |
670 | MACHINE_CHECK_SEL = .-IDT_BASE\r | |
671 | .short 0 # offset 15:0\r | |
672 | .short SYS_CODE_SEL # selector 15:0\r | |
673 | .byte 0 # 0 for interrupt gate\r | |
674 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
675 | .short 0 # offset 31:16\r | |
676 | \r | |
677 | # SIMD floating-point exception (INT 0x13)\r | |
678 | SIMD_EXCEPTION_SEL = .-IDT_BASE\r | |
679 | .short 0 # offset 15:0\r | |
680 | .short SYS_CODE_SEL # selector 15:0\r | |
681 | .byte 0 # 0 for interrupt gate\r | |
682 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
683 | .short 0 # offset 31:16\r | |
684 | \r | |
685 | .rept (32 - 20)\r | |
686 | .short 0 # offset 15:0\r | |
687 | .short SYS_CODE_SEL # selector 15:0\r | |
688 | .byte 0 # 0 for interrupt gate\r | |
689 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
690 | .short 0 # offset 31:16\r | |
691 | .endr\r | |
692 | \r | |
693 | # 72 unspecified descriptors\r | |
694 | .rept 72 * 8\r | |
695 | .byte 0\r | |
696 | .endr\r | |
697 | \r | |
698 | # IRQ 0 (System timer) - (INT 0x68)\r | |
699 | IRQ0_SEL = .-IDT_BASE\r | |
700 | .short 0 # offset 15:0\r | |
701 | .short SYS_CODE_SEL # selector 15:0\r | |
702 | .byte 0 # 0 for interrupt gate\r | |
703 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
704 | .short 0 # offset 31:16\r | |
705 | \r | |
706 | # IRQ 1 (8042 Keyboard controller) - (INT 0x69)\r | |
707 | IRQ1_SEL = .-IDT_BASE\r | |
708 | .short 0 # offset 15:0\r | |
709 | .short SYS_CODE_SEL # selector 15:0\r | |
710 | .byte 0 # 0 for interrupt gate\r | |
711 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
712 | .short 0 # offset 31:16\r | |
713 | \r | |
714 | # Reserved - IRQ 2 redirect (IRQ 2) - DO NOT USE!!! - (INT 6ah)\r | |
715 | IRQ2_SEL = .-IDT_BASE\r | |
716 | .short 0 # offset 15:0\r | |
717 | .short SYS_CODE_SEL # selector 15:0\r | |
718 | .byte 0 # 0 for interrupt gate\r | |
719 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
720 | .short 0 # offset 31:16\r | |
721 | \r | |
722 | # IRQ 3 (COM 2) - (INT 6bh)\r | |
723 | IRQ3_SEL = .-IDT_BASE\r | |
724 | .short 0 # offset 15:0\r | |
725 | .short SYS_CODE_SEL # selector 15:0\r | |
726 | .byte 0 # 0 for interrupt gate\r | |
727 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
728 | .short 0 # offset 31:16\r | |
729 | \r | |
730 | # IRQ 4 (COM 1) - (INT 6ch)\r | |
731 | IRQ4_SEL = .-IDT_BASE\r | |
732 | .short 0 # offset 15:0\r | |
733 | .short SYS_CODE_SEL # selector 15:0\r | |
734 | .byte 0 # 0 for interrupt gate\r | |
735 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
736 | .short 0 # offset 31:16\r | |
737 | \r | |
738 | # IRQ 5 (LPT 2) - (INT 6dh)\r | |
739 | IRQ5_SEL = .-IDT_BASE\r | |
740 | .short 0 # offset 15:0\r | |
741 | .short SYS_CODE_SEL # selector 15:0\r | |
742 | .byte 0 # 0 for interrupt gate\r | |
743 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
744 | .short 0 # offset 31:16\r | |
745 | \r | |
746 | # IRQ 6 (Floppy controller) - (INT 6eh)\r | |
747 | IRQ6_SEL = .-IDT_BASE\r | |
748 | .short 0 # offset 15:0\r | |
749 | .short SYS_CODE_SEL # selector 15:0\r | |
750 | .byte 0 # 0 for interrupt gate\r | |
751 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
752 | .short 0 # offset 31:16\r | |
753 | \r | |
754 | # IRQ 7 (LPT 1) - (INT 6fh)\r | |
755 | IRQ7_SEL = .-IDT_BASE\r | |
756 | .short 0 # offset 15:0\r | |
757 | .short SYS_CODE_SEL # selector 15:0\r | |
758 | .byte 0 # 0 for interrupt gate\r | |
759 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
760 | .short 0 # offset 31:16\r | |
761 | \r | |
762 | # IRQ 8 (RTC Alarm) - (INT 0x70)\r | |
763 | IRQ8_SEL = .-IDT_BASE\r | |
764 | .short 0 # offset 15:0\r | |
765 | .short SYS_CODE_SEL # selector 15:0\r | |
766 | .byte 0 # 0 for interrupt gate\r | |
767 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
768 | .short 0 # offset 31:16\r | |
769 | \r | |
770 | # IRQ 9 - (INT 0x71)\r | |
771 | IRQ9_SEL = .-IDT_BASE\r | |
772 | .short 0 # offset 15:0\r | |
773 | .short SYS_CODE_SEL # selector 15:0\r | |
774 | .byte 0 # 0 for interrupt gate\r | |
775 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
776 | .short 0 # offset 31:16\r | |
777 | \r | |
778 | # IRQ 10 - (INT 0x72)\r | |
779 | IRQ10_SEL = .-IDT_BASE\r | |
780 | .short 0 # offset 15:0\r | |
781 | .short SYS_CODE_SEL # selector 15:0\r | |
782 | .byte 0 # 0 for interrupt gate\r | |
783 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
784 | .short 0 # offset 31:16\r | |
785 | \r | |
786 | # IRQ 11 - (INT 0x73)\r | |
787 | IRQ11_SEL = .-IDT_BASE\r | |
788 | .short 0 # offset 15:0\r | |
789 | .short SYS_CODE_SEL # selector 15:0\r | |
790 | .byte 0 # 0 for interrupt gate\r | |
791 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
792 | .short 0 # offset 31:16\r | |
793 | \r | |
794 | # IRQ 12 (PS/2 mouse) - (INT 0x74)\r | |
795 | IRQ12_SEL = .-IDT_BASE\r | |
796 | .short 0 # offset 15:0\r | |
797 | .short SYS_CODE_SEL # selector 15:0\r | |
798 | .byte 0 # 0 for interrupt gate\r | |
799 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
800 | .short 0 # offset 31:16\r | |
801 | \r | |
802 | # IRQ 13 (Floating point error) - (INT 0x75)\r | |
803 | IRQ13_SEL = .-IDT_BASE\r | |
804 | .short 0 # offset 15:0\r | |
805 | .short SYS_CODE_SEL # selector 15:0\r | |
806 | .byte 0 # 0 for interrupt gate\r | |
807 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
808 | .short 0 # offset 31:16\r | |
809 | \r | |
810 | # IRQ 14 (Secondary IDE) - (INT 0x76)\r | |
811 | IRQ14_SEL = .-IDT_BASE\r | |
812 | .short 0 # offset 15:0\r | |
813 | .short SYS_CODE_SEL # selector 15:0\r | |
814 | .byte 0 # 0 for interrupt gate\r | |
815 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
816 | .short 0 # offset 31:16\r | |
817 | \r | |
818 | # IRQ 15 (Primary IDE) - (INT 0x77)\r | |
819 | IRQ15_SEL = .-IDT_BASE\r | |
820 | .short 0 # offset 15:0\r | |
821 | .short SYS_CODE_SEL # selector 15:0\r | |
822 | .byte 0 # 0 for interrupt gate\r | |
823 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r | |
824 | .short 0 # offset 31:16\r | |
825 | \r | |
826 | .rept 1 * 8\r | |
827 | .byte 0\r | |
828 | .endr\r | |
829 | \r | |
830 | IDT_END:\r | |
831 | \r |