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1/*++\r
2\r
3Copyright (c) 2006, Intel Corporation \r
4All rights reserved. This program and the accompanying materials \r
5are licensed and made available under the terms and conditions of the BSD License \r
6which accompanies this distribution. The full text of the license may be found at \r
7http://opensource.org/licenses/bsd-license.php \r
8 \r
9THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
10WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
11\r
12Module Name:\r
13 VirtualMemory.c\r
14 \r
15Abstract:\r
16\r
17 x64 Virtual Memory Management Services in the form of an IA-32 driver. \r
18 Used to establish a 1:1 Virtual to Physical Mapping that is required to\r
19 enter Long Mode (x64 64-bit mode).\r
20\r
21 While we make a 1:1 mapping (identity mapping) for all physical pages \r
22 we still need to use the MTRR's to ensure that the cachability attirbutes\r
23 for all memory regions is correct.\r
24\r
25 The basic idea is to use 2MB page table entries where ever possible. If\r
26 more granularity of cachability is required then 4K page tables are used.\r
27\r
28 References:\r
29 1) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 1:Basic Architecture, Intel\r
30 2) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 2:Instruction Set Reference, Intel\r
31 3) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel\r
32 \r
33--*/ \r
34\r
35#include "VirtualMemory.h"\r
36\r
37EFI_PHYSICAL_ADDRESS\r
38CreateIdentityMappingPageTables (\r
39 VOID\r
40 )\r
41/*++\r
42\r
43Routine Description:\r
44\r
45 Allocates and fills in the Page Directory and Page Table Entries to\r
46 establish a 1:1 Virtual to Physical mapping.\r
47\r
48Arguments:\r
49\r
50 NumberOfProcessorPhysicalAddressBits - Number of processor address bits to use.\r
51 Limits the number of page table entries \r
52 to the physical address space.\r
53\r
54Returns:\r
55\r
56 EFI_SUCCESS The 1:1 Virtual to Physical identity mapping was created\r
57\r
58--*/\r
59{ \r
60 UINT32 RegEax;\r
61 UINT8 PhysicalAddressBits;\r
62 EFI_PHYSICAL_ADDRESS PageAddress;\r
63 UINTN IndexOfPml4Entries;\r
64 UINTN IndexOfPdpEntries;\r
65 UINTN IndexOfPageDirectoryEntries;\r
66 UINTN NumberOfPml4EntriesNeeded;\r
67 UINTN NumberOfPdpEntriesNeeded;\r
68 PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;\r
69 PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;\r
70 PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;\r
71 PAGE_TABLE_ENTRY *PageDirectoryEntry;\r
72\r
73 //\r
74 // By architecture only one PageMapLevel4 exists - so lets allocate storage for it.\r
75 //\r
76 PageMap = AllocatePages (1);\r
77 ASSERT (PageMap != NULL);\r
78\r
79 //\r
80 // Get physical address bits supported.\r
81 //\r
82 AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r
83 if (RegEax >= 0x80000008) {\r
84 AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);\r
85 PhysicalAddressBits = (UINT8) RegEax;\r
86 } else {\r
87 PhysicalAddressBits = 36;\r
88 }\r
89\r
90 //\r
91 // Calculate the table entries needed.\r
92 //\r
93 if (PhysicalAddressBits <= 39 ) {\r
94 NumberOfPml4EntriesNeeded = 1;\r
95 NumberOfPdpEntriesNeeded = 1 << (PhysicalAddressBits - 30);\r
96 } else {\r
97 NumberOfPml4EntriesNeeded = 1 << (PhysicalAddressBits - 39);\r
98 NumberOfPdpEntriesNeeded = 512;\r
99 }\r
100\r
101 PageMapLevel4Entry = PageMap;\r
102 PageAddress = 0;\r
103 for (IndexOfPml4Entries = 0; IndexOfPml4Entries < NumberOfPml4EntriesNeeded; IndexOfPml4Entries++, PageMapLevel4Entry++) {\r
104 //\r
105 // Each PML4 entry points to a page of Page Directory Pointer entires.\r
106 // So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.\r
107 //\r
108 PageDirectoryPointerEntry = AllocatePages (1);\r
109 ASSERT (PageDirectoryPointerEntry != NULL);\r
110\r
111 //\r
112 // Make a PML4 Entry\r
113 //\r
114 PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry;\r
115 PageMapLevel4Entry->Bits.ReadWrite = 1;\r
116 PageMapLevel4Entry->Bits.Present = 1;\r
117\r
118 for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {\r
119 //\r
120 // Each Directory Pointer entries points to a page of Page Directory entires.\r
121 // So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.\r
122 // \r
123 PageDirectoryEntry = AllocatePages (1);\r
124 ASSERT (PageDirectoryEntry != NULL);\r
125\r
126 //\r
127 // Fill in a Page Directory Pointer Entries\r
128 //\r
129 PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry;\r
130 PageDirectoryPointerEntry->Bits.ReadWrite = 1;\r
131 PageDirectoryPointerEntry->Bits.Present = 1;\r
132\r
133 for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += 0x200000) {\r
134 //\r
135 // Fill in the Page Directory entries\r
136 //\r
137 PageDirectoryEntry->Uint64 = (UINT64)PageAddress;\r
138 PageDirectoryEntry->Bits.ReadWrite = 1;\r
139 PageDirectoryEntry->Bits.Present = 1;\r
140 PageDirectoryEntry->Bits.MustBe1 = 1;\r
141\r
142 }\r
143 }\r
144 }\r
145\r
146 //\r
147 // For the PML4 entries we are not using fill in a null entry.\r
148 // For now we just copy the first entry.\r
149 //\r
150 for (; IndexOfPml4Entries < 512; IndexOfPml4Entries++, PageMapLevel4Entry++) {\r
151 CopyMem (\r
152 PageMapLevel4Entry,\r
153 PageMap,\r
154 sizeof (PAGE_MAP_AND_DIRECTORY_POINTER)\r
155 );\r
156 }\r
157\r
158 return (EFI_PHYSICAL_ADDRESS) (UINTN)PageMap; // FIXME\r
159}\r
160\r