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1/** @file\r
2 Header file declares all logic function for PCI bus enumeration.\r
3 \r
4Copyright (c) 2006, Intel Corporation \r
5All rights reserved. This program and the accompanying materials \r
6are licensed and made available under the terms and conditions of the BSD License \r
7which accompanies this distribution. The full text of the license may be found at \r
8http://opensource.org/licenses/bsd-license.php \r
9 \r
10THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
11WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
12\r
13**/\r
14\r
15\r
16#ifndef _EFI_PCI_ENUMERATOR_H_\r
17#define _EFI_PCI_ENUMERATOR_H_\r
18\r
19#include "PciResourceSupport.h"\r
20\r
21/**\r
22 This routine is used to enumerate entire pci bus system\r
23 in a given platform\r
24\r
25 @param Controller Parent controller handle.\r
26 \r
27 @return Status of enumerating.\r
28**/\r
29EFI_STATUS\r
30PciEnumerator (\r
31 IN EFI_HANDLE Controller\r
32 );\r
33\r
34/**\r
35 Enumerate PCI root bridge\r
36 \r
37 @param PciResAlloc Pointer to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
38 @param RootBridgeDev Instance of root bridge device.\r
39 \r
40 @retval EFI_SUCCESS Success to enumerate root bridge.\r
41 @retval Others Fail to enumerate root bridge.\r
42 \r
43**/\r
44EFI_STATUS\r
45PciRootBridgeEnumerator (\r
46 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,\r
47 IN PCI_IO_DEVICE *RootBridgeDev\r
48 );\r
49\r
50/**\r
51 This routine is used to process option rom on a certain root bridge\r
52 \r
53 @param Bridge Given parent's root bridge.\r
54 @param RomBase Base address of ROM driver loaded from.\r
55 @param MaxLength Max rom size.\r
56 \r
57 @retval EFI_SUCCESS Success to process option rom image.\r
58**/\r
59EFI_STATUS\r
60ProcessOptionRom (\r
61 IN PCI_IO_DEVICE *Bridge,\r
62 IN UINT64 RomBase,\r
63 IN UINT64 MaxLength\r
64 );\r
65\r
66/**\r
67 This routine is used to assign bus number to the given PCI bus system\r
68 \r
69 @param Bridge Parent root bridge instance.\r
70 @param StartBusNumber Number of beginning.\r
71 @param SubBusNumber the number of sub bus.\r
72 \r
73 @retval EFI_SUCCESS Success to assign bus number.\r
74**/\r
75EFI_STATUS\r
76PciAssignBusNumber (\r
77 IN PCI_IO_DEVICE *Bridge,\r
78 IN UINT8 StartBusNumber,\r
79 OUT UINT8 *SubBusNumber\r
80 );\r
81\r
82/**\r
83 This routine is used to determine the root bridge attribute by interfacing\r
84 the host bridge resource allocation protocol.\r
85\r
86 @param PciResAlloc Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r
87 @param RootBridgeDev Root bridge instance.\r
88 \r
89 @retval EFI_SUCCESS Success to get root bridge's attribute.\r
90 @retval Others Fail to get attribute.\r
91**/\r
92EFI_STATUS\r
93DetermineRootBridgeAttributes (\r
94 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,\r
95 IN PCI_IO_DEVICE *RootBridgeDev\r
96 );\r
97\r
98/**\r
99 Get Max Option Rom size on this bridge\r
100 \r
101 @param Bridge Bridge device instance.\r
102 @return Max size of option rom.\r
103**/\r
104UINT64\r
105GetMaxOptionRomSize (\r
106 IN PCI_IO_DEVICE *Bridge\r
107 );\r
108\r
109/**\r
110 Process attributes of devices on this host bridge\r
111 \r
112 @param PciResAlloc Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
113 \r
114 @retval EFI_NOT_FOUND Can not find the specific root bridge device.\r
115 @retval EFI_SUCCESS Success Process attribute.\r
116 @retval Others Can not determine the root bridge device's attribute.\r
117**/\r
118EFI_STATUS\r
119PciHostBridgeDeviceAttribute (\r
120 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
121 );\r
122\r
123/**\r
124 Get resource allocation status from the ACPI pointer\r
125\r
126 @param AcpiConfig Point to Acpi configuration table.\r
127 @param IoResStatus Return the status of I/O resource.\r
128 @param Mem32ResStatus Return the status of 32-bit Memory resource.\r
129 @param PMem32ResStatus Return the status of 32-bit PMemory resource.\r
130 @param Mem64ResStatus Return the status of 64-bit Memory resource.\r
131 @param PMem64ResStatus Return the status of 64-bit PMemory resource.\r
132 \r
133 @retval EFI_SUCCESS Success to get resource allocation status from ACPI configuration table.\r
134**/\r
135EFI_STATUS\r
136GetResourceAllocationStatus (\r
137 VOID *AcpiConfig,\r
138 OUT UINT64 *IoResStatus,\r
139 OUT UINT64 *Mem32ResStatus,\r
140 OUT UINT64 *PMem32ResStatus,\r
141 OUT UINT64 *Mem64ResStatus,\r
142 OUT UINT64 *PMem64ResStatus\r
143 );\r
144\r
145/**\r
146 Remove a PCI device from device pool and mark its bar\r
147 \r
148 @param PciDevice Instance of Pci device.\r
149 \r
150 @retval EFI_SUCCESS Success Operation.\r
151 @retval EFI_ABORTED Pci device is a root bridge.\r
152**/\r
153EFI_STATUS\r
154RejectPciDevice (\r
155 IN PCI_IO_DEVICE *PciDevice\r
156 );\r
157\r
158/**\r
159 Determine whethter a PCI device can be rejected\r
160 \r
161 @param PciResNode Pointer to Pci resource node instance.\r
162 \r
163 @return whethter a PCI device can be rejected.\r
164**/\r
165BOOLEAN\r
166IsRejectiveDevice (\r
167 IN PCI_RESOURCE_NODE *PciResNode\r
168 );\r
169\r
170/**\r
171 Compare two resource node and get the larger resource consumer\r
172 \r
173 @param PciResNode1 resource node 1 want to be compared.\r
174 @param PciResNode2 resource node 2 want to be compared.\r
175 \r
176 @return Larger resource consumer.\r
177**/\r
178PCI_RESOURCE_NODE *\r
179GetLargerConsumerDevice (\r
180 IN PCI_RESOURCE_NODE *PciResNode1,\r
181 IN PCI_RESOURCE_NODE *PciResNode2\r
182 );\r
183\r
184/**\r
185 Get the max resource consumer in the host resource pool\r
186 \r
187 @param ResPool Pointer to resource pool node.\r
188 \r
189 @return the max resource consumer in the host resource pool.\r
190**/\r
191PCI_RESOURCE_NODE *\r
192GetMaxResourceConsumerDevice (\r
193 IN PCI_RESOURCE_NODE *ResPool\r
194 );\r
195\r
196/**\r
197 Adjust host bridge allocation so as to reduce resource requirement\r
198 \r
199 @param IoPool Pointer to instance of I/O resource Node.\r
200 @param Mem32Pool Pointer to instance of 32-bit memory resource Node.\r
201 @param PMem32Pool Pointer to instance of 32-bit Pmemory resource node.\r
202 @param Mem64Pool Pointer to instance of 64-bit memory resource node.\r
203 @param PMem64Pool Pointer to instance of 64-bit Pmemory resource node.\r
204 @param IoResStatus Status of I/O resource Node.\r
205 @param Mem32ResStatus Status of 32-bit memory resource Node.\r
206 @param PMem32ResStatus Status of 32-bit Pmemory resource node.\r
207 @param Mem64ResStatus Status of 64-bit memory resource node.\r
208 @param PMem64ResStatus Status of 64-bit Pmemory resource node.\r
209**/\r
210EFI_STATUS\r
211PciHostBridgeAdjustAllocation (\r
212 IN PCI_RESOURCE_NODE *IoPool,\r
213 IN PCI_RESOURCE_NODE *Mem32Pool,\r
214 IN PCI_RESOURCE_NODE *PMem32Pool,\r
215 IN PCI_RESOURCE_NODE *Mem64Pool,\r
216 IN PCI_RESOURCE_NODE *PMem64Pool,\r
217 IN UINT64 IoResStatus,\r
218 IN UINT64 Mem32ResStatus,\r
219 IN UINT64 PMem32ResStatus,\r
220 IN UINT64 Mem64ResStatus,\r
221 IN UINT64 PMem64ResStatus\r
222 );\r
223\r
224/**\r
225 Summary requests for all resource type, and contruct ACPI resource\r
226 requestor instance.\r
227 \r
228 @param Bridge detecting bridge.\r
229 @param IoNode Pointer to instance of I/O resource Node.\r
230 @param Mem32Node Pointer to instance of 32-bit memory resource Node.\r
231 @param PMem32Node Pointer to instance of 32-bit Pmemory resource node.\r
232 @param Mem64Node Pointer to instance of 64-bit memory resource node.\r
233 @param PMem64Node Pointer to instance of 64-bit Pmemory resource node.\r
234 @param pConfig outof buffer holding new constructed APCI resource requestor.\r
235**/\r
236EFI_STATUS\r
237ConstructAcpiResourceRequestor (\r
238 IN PCI_IO_DEVICE *Bridge,\r
239 IN PCI_RESOURCE_NODE *IoNode,\r
240 IN PCI_RESOURCE_NODE *Mem32Node,\r
241 IN PCI_RESOURCE_NODE *PMem32Node,\r
242 IN PCI_RESOURCE_NODE *Mem64Node,\r
243 IN PCI_RESOURCE_NODE *PMem64Node,\r
244 OUT VOID **pConfig\r
245 );\r
246\r
247/**\r
248 Get resource base from a acpi configuration descriptor.\r
249 \r
250 @param pConfig an acpi configuration descriptor.\r
251 @param IoBase output of I/O resource base address.\r
252 @param Mem32Base output of 32-bit memory base address.\r
253 @param PMem32Base output of 32-bit pmemory base address.\r
254 @param Mem64Base output of 64-bit memory base address.\r
255 @param PMem64Base output of 64-bit pmemory base address.\r
256 \r
257 @return EFI_SUCCESS Success operation.\r
258**/\r
259EFI_STATUS\r
260GetResourceBase (\r
261 IN VOID *pConfig,\r
262 OUT UINT64 *IoBase,\r
263 OUT UINT64 *Mem32Base,\r
264 OUT UINT64 *PMem32Base,\r
265 OUT UINT64 *Mem64Base,\r
266 OUT UINT64 *PMem64Base\r
267 );\r
268\r
269/**\r
270 Enumerate pci bridge, allocate resource and determine attribute\r
271 for devices on this bridge\r
272 \r
273 @param BridgeDev Pointer to instance of bridge device.\r
274 \r
275 @retval EFI_SUCCESS Success operation.\r
276 @retval Others Fail to enumerate.\r
277**/\r
278EFI_STATUS\r
279PciBridgeEnumerator (\r
280 IN PCI_IO_DEVICE *BridgeDev\r
281 );\r
282\r
283/**\r
284 Allocate all kinds of resource for bridge\r
285 \r
286 @param Bridge Pointer to bridge instance.\r
287 \r
288 @retval EFI_SUCCESS Success operation.\r
289 @retval Others Fail to allocate resource for bridge.\r
290**/\r
291EFI_STATUS\r
292PciBridgeResourceAllocator (\r
293 IN PCI_IO_DEVICE *Bridge\r
294 );\r
295\r
296/**\r
297 Get resource base address for a pci bridge device\r
298 \r
299 @param Bridge Given Pci driver instance.\r
300 @param IoBase output for base address of I/O type resource.\r
301 @param Mem32Base output for base address of 32-bit memory type resource.\r
302 @param PMem32Base output for base address of 32-bit Pmemory type resource.\r
303 @param Mem64Base output for base address of 64-bit memory type resource.\r
304 @param PMem64Base output for base address of 64-bit Pmemory type resource.\r
305 \r
306 @retval EFI_SUCCESS Succes to get resource base address.\r
307**/\r
308EFI_STATUS\r
309GetResourceBaseFromBridge (\r
310 IN PCI_IO_DEVICE *Bridge,\r
311 OUT UINT64 *IoBase,\r
312 OUT UINT64 *Mem32Base,\r
313 OUT UINT64 *PMem32Base,\r
314 OUT UINT64 *Mem64Base,\r
315 OUT UINT64 *PMem64Base\r
316 );\r
317\r
318/**\r
319 Process Option Rom on this host bridge\r
320 \r
321 @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r
322 \r
323 @retval EFI_NOT_FOUND Can not find the root bridge instance.\r
324 @retval EFI_SUCCESS Success process.\r
325**/\r
326EFI_STATUS\r
327PciHostBridgeP2CProcess (\r
328 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
329 );\r
330\r
331/**\r
332 These are the notifications from the PCI bus driver that it is about to enter a certain \r
333 phase of the PCI enumeration process.\r
334\r
335 This member function can be used to notify the host bridge driver to perform specific actions,\r
336 including any chipset-specific initialization, so that the chipset is ready to enter the next phase.\r
337 Eight notification points are defined at this time. See belows:\r
338 EfiPciHostBridgeBeginEnumeration - Resets the host bridge PCI apertures and internal data\r
339 structures. The PCI enumerator should issue this notification\r
340 before starting a fresh enumeration process. Enumeration cannot\r
341 be restarted after sending any other notification such as\r
342 EfiPciHostBridgeBeginBusAllocation.\r
343 EfiPciHostBridgeBeginBusAllocation - The bus allocation phase is about to begin. No specific action is\r
344 required here. This notification can be used to perform any\r
345 chipset-specific programming.\r
346 EfiPciHostBridgeEndBusAllocation - The bus allocation and bus programming phase is complete. No\r
347 specific action is required here. This notification can be used to\r
348 perform any chipset-specific programming.\r
349 EfiPciHostBridgeBeginResourceAllocation - The resource allocation phase is about to begin. No specific\r
350 action is required here. This notification can be used to perform\r
351 any chipset-specific programming.\r
352 EfiPciHostBridgeAllocateResources - Allocates resources per previously submitted requests for all the PCI\r
353 root bridges. These resource settings are returned on the next call to\r
354 GetProposedResources(). Before calling NotifyPhase() with a Phase of\r
355 EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible for gathering I/O and memory requests for\r
356 all the PCI root bridges and submitting these requests using\r
357 SubmitResources(). This function pads the resource amount\r
358 to suit the root bridge hardware, takes care of dependencies between\r
359 the PCI root bridges, and calls the Global Coherency Domain (GCD)\r
360 with the allocation request. In the case of padding, the allocated range\r
361 could be bigger than what was requested.\r
362 EfiPciHostBridgeSetResources - Programs the host bridge hardware to decode previously allocated\r
363 resources (proposed resources) for all the PCI root bridges. After the\r
364 hardware is programmed, reassigning resources will not be supported.\r
365 The bus settings are not affected.\r
366 EfiPciHostBridgeFreeResources - Deallocates resources that were previously allocated for all the PCI\r
367 root bridges and resets the I/O and memory apertures to their initial\r
368 state. The bus settings are not affected. If the request to allocate\r
369 resources fails, the PCI enumerator can use this notification to\r
370 deallocate previous resources, adjust the requests, and retry\r
371 allocation.\r
372 EfiPciHostBridgeEndResourceAllocation- The resource allocation phase is completed. No specific action is\r
373 required here. This notification can be used to perform any chipsetspecific\r
374 programming.\r
375 \r
376 @param[in] PciResAlloc The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
377 @param[in] Phase The phase during enumeration\r
378 \r
379 @retval EFI_NOT_READY This phase cannot be entered at this time. For example, this error\r
380 is valid for a Phase of EfiPciHostBridgeAllocateResources if\r
381 SubmitResources() has not been called for one or more\r
382 PCI root bridges before this call\r
383 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. This error is valid\r
384 for a Phase of EfiPciHostBridgeSetResources.\r
385 @retval EFI_INVALID_PARAMETER Invalid phase parameter\r
386 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
387 This error is valid for a Phase of EfiPciHostBridgeAllocateResources if the\r
388 previously submitted resource requests cannot be fulfilled or\r
389 were only partially fulfilled.\r
390 @retval EFI_SUCCESS The notification was accepted without any errors.\r
391\r
392**/\r
393EFI_STATUS\r
394NotifyPhase (\r
395 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,\r
396 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase\r
397 );\r
398\r
399/**\r
400 Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various\r
401 stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual\r
402 PCI controllers before enumeration.\r
403\r
404 This function is called during the PCI enumeration process. No specific action is expected from this\r
405 member function. It allows the host bridge driver to preinitialize individual PCI controllers before\r
406 enumeration.\r
407\r
408 @param Bridge Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r
409 @param Bus The bus number of the pci device. \r
410 @param Device The device number of the pci device. \r
411 @param Func The function number of the pci device. \r
412 @param Phase The phase of the PCI device enumeration. \r
413 \r
414 @retval EFI_SUCCESS The requested parameters were returned.\r
415 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
416 @retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in\r
417 EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.\r
418 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. The PCI enumerator should\r
419 not enumerate this device, including its child devices if it is a PCI-to-PCI\r
420 bridge.\r
421\r
422**/\r
423EFI_STATUS\r
424PreprocessController (\r
425 IN PCI_IO_DEVICE *Bridge,\r
426 IN UINT8 Bus,\r
427 IN UINT8 Device,\r
428 IN UINT8 Func,\r
429 IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase\r
430 );\r
431\r
432/**\r
433 Hot plug request notify.\r
434 \r
435 @param This - A pointer to the hot plug request protocol.\r
436 @param Operation - The operation.\r
437 @param Controller - A pointer to the controller.\r
438 @param RemainingDevicePath - A pointer to the device path.\r
439 @param NumberOfChildren - A the number of child handle in the ChildHandleBuffer.\r
440 @param ChildHandleBuffer - A pointer to the array contain the child handle.\r
441 \r
442 @retval EFI_NOT_FOUND Can not find bridge according to controller handle.\r
443 @retval EFI_SUCCESS Success operating.\r
444**/\r
445EFI_STATUS\r
446EFIAPI\r
447PciHotPlugRequestNotify (\r
448 IN EFI_PCI_HOTPLUG_REQUEST_PROTOCOL * This,\r
449 IN EFI_PCI_HOTPLUG_OPERATION Operation,\r
450 IN EFI_HANDLE Controller,\r
451 IN EFI_DEVICE_PATH_PROTOCOL * RemainingDevicePath OPTIONAL,\r
452 IN OUT UINT8 *NumberOfChildren,\r
453 IN OUT EFI_HANDLE * ChildHandleBuffer\r
454 );\r
455\r
456/**\r
457 Search hostbridge according to given handle\r
458 \r
459 @param RootBridgeHandle - Host bridge handle.\r
460\r
461 @return TRUE Found.\r
462 @return FALSE Not found.\r
463**/\r
464BOOLEAN\r
465SearchHostBridgeHandle (\r
466 IN EFI_HANDLE RootBridgeHandle\r
467 );\r
468\r
469/**\r
470 Add host bridge handle to global variable for enumating.\r
471 \r
472 @param HostBridgeHandle host bridge handle.\r
473**/\r
474EFI_STATUS\r
475AddHostBridgeEnumerator (\r
476 IN EFI_HANDLE HostBridgeHandle\r
477 );\r
478\r
479#endif\r