Rename PI SMM definitions which has same name with those of Framework SMM spec but...

[mirror_edk2.git] / IntelFrameworkPkg / Include / Framework / SmmCis.h

/** @file\r
  Include file for definitions in the Intel Platform Innovation Framework for EFI\r
  System Management Mode Core Interface Specification (SMM CIS) version 0.90.\r
\r
  Copyright (c) 2007 - 2009, Intel Corporation\r
  All rights reserved. This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#ifndef _SMM_CIS_H_\r
#define _SMM_CIS_H_\r
\r
//\r
// Share some common definitions with PI SMM\r
//\r
#include <Pi/PiSmmCis.h>\r
#include <Protocol/SmmCpuIo.h>\r
\r
#define EFI_SMM_CPU_IO_GUID \\r
  { \\r
    0x5f439a0b, 0x45d8, 0x4682, {0xa4, 0xf4, 0xf0, 0x57, 0x6b, 0x51, 0x34, 0x41 } \\r
  }\r
\r
typedef struct _EFI_SMM_SYSTEM_TABLE      EFI_SMM_SYSTEM_TABLE;\r
typedef struct _EFI_SMM_CPU_IO_INTERFACE  EFI_SMM_CPU_IO_INTERFACE;\r
\r
\r
//\r
// SMM Base specification constant and types\r
//\r
#define EFI_SMM_SYSTEM_TABLE_REVISION (0 << 16) | (0x09)\r
\r
/**\r
  Provides the basic memory and I/O interfaces that are used to\r
  abstract accesses to devices.\r
\r
  @param  This             The EFI_SMM_CPU_IO_INTERFACE instance.\r
  @param  Width            Signifies the width of the I/O operations.\r
  @param  Address          The base address of the I/O operations.\r
  @param  Count            The number of I/O operations to perform.\r
  @param  Buffer           For read operations, the destination buffer to store the results (out parameter).\r
                           For write operations, the source buffer from which to write data (in parameter).\r
\r
  @retval EFI_SUCCESS           The data was read from or written to the device.\r
  @retval EFI_UNSUPPORTED       The Address is not valid for this system.\r
  @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.\r
  @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SMM_CPU_IO)(\r
  IN EFI_SMM_CPU_IO_INTERFACE         *This,\r
  IN EFI_SMM_IO_WIDTH                 Width,\r
  IN UINT64                           Address,\r
  IN UINTN                            Count,\r
  IN OUT VOID                         *Buffer\r
  );\r
\r
typedef struct {\r
  EFI_SMM_CPU_IO  Read;  ///< This service provides the various modalities of memory and I/O read.\r
  EFI_SMM_CPU_IO  Write; ///< This service provides the various modalities of memory and I/O write.\r
} EFI_SMM_IO_ACCESS;\r
\r
///\r
/// The EFI_SMM_CPU_IO_INTERFACE service provides the basic memory, I/O, and PCI\r
/// interfaces that are used to abstract accesses to devices.\r
///\r
struct _EFI_SMM_CPU_IO_INTERFACE {\r
  ///\r
  /// Allows reads and writes to memory-mapped I/O space. \r
  ///\r
  EFI_SMM_IO_ACCESS Mem;\r
  ///\r
  /// Allows reads and writes to I/O space. \r
  ///\r
  EFI_SMM_IO_ACCESS Io;\r
};\r
\r
/**\r
  Allocates pool memory from SMRAM for IA-32 or runtime memory for\r
  the Itanium processor family.\r
\r
  @param  PoolType         The type of pool to allocate. The only supported type is EfiRuntimeServicesData\r
  @param  Size             The number of bytes to allocate from the pool.\r
  @param  Buffer           A pointer to a pointer to the allocated buffer if the call\r
                           succeeds; undefined otherwise.\r
\r
  @retval EFI_SUCCESS           The requested number of bytes was allocated.\r
  @retval EFI_OUT_OF_RESOURCES  The pool requested could not be allocated.\r
  @retval EFI_UNSUPPORTED       In runtime.\r
  @note: Inconsistent with specification here:\r
         In Framework Spec, this definition is named EFI_SMM_ALLOCATE_POOL.  \r
         To avoid a naming conflict, the definition is renamed.\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SMMCORE_ALLOCATE_POOL)(\r
  IN EFI_MEMORY_TYPE                PoolType,\r
  IN UINTN                          Size,\r
  OUT VOID                          **Buffer\r
  );\r
\r
/**\r
  Returns pool memory to the system.\r
\r
  @param  Buffer           Pointer to the buffer to free.\r
\r
  @retval EFI_SUCCESS           The memory was returned to the system.\r
  @retval EFI_INVALID_PARAMETER Buffer was invalid.\r
  @retval EFI_UNSUPPORTED       In runtime.\r
  @note: Inconsistent with specification here:\r
         In Framework Spec, this definition is named EFI_SMM_FREE_POOL.  \r
         To avoid a naming conflict, the definition is renamed. \r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SMMCORE_FREE_POOL)(\r
  IN VOID                   *Buffer\r
  );\r
\r
/**\r
  Allocates memory pages from the system.\r
\r
  @param  Type             The type of allocation to perform.\r
  @param  MemoryType       The only supported type is EfiRuntimeServicesData\r
  @param  NumberofPages    The number of contiguous 4 KB pages to allocate\r
  @param  Memory           Pointer to a physical address. On input, the way in which\r
                           the address is used depends on the value of Type. On output, the address\r
                           is set to the base of the page range that was allocated.\r
\r
  @retval EFI_SUCCESS           The requested pages were allocated.\r
  @retval EFI_OUT_OF_RESOURCES  The pages requested could not be allocated.\r
  @retval EFI_NOT_FOUND         The requested pages could not be found.\r
  @retval EFI_INVALID_PARAMETER Type is not AllocateAnyPages or AllocateMaxAddress\r
                                or AllocateAddress. Or MemoryType is in the range EfiMaxMemoryType..0x7FFFFFFF.\r
  @note: Inconsistent with specification here:\r
         In the Framework Spec, this definition is named EFI_SMM_ALLOCATE_PAGES.  \r
         To avoid a naming conflict, the definition here is renamed.\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SMMCORE_ALLOCATE_PAGES)(\r
  IN EFI_ALLOCATE_TYPE      Type,\r
  IN EFI_MEMORY_TYPE        MemoryType,\r
  IN UINTN                  NumberOfPages,\r
  OUT EFI_PHYSICAL_ADDRESS  *Memory\r
  );\r
\r
/**\r
  Frees memory pages for the system.\r
\r
  @param  Memory           The base physical address of the pages to be freed\r
  @param  NumberOfPages    The number of contiguous 4 KB pages to free.\r
\r
  @retval EFI_SUCCESS           The requested memory pages were freed.\r
  @retval EFI_INVALID_PARAMETER Memory is not a page-aligned address or NumberOfPages is invalid.\r
  @retval EFI_NOT_FOUND         The requested memory pages were not allocated with SmmAllocatePages().\r
  \r
  @note: Inconsistent with specification here:\r
         In the Framework Spec, this definition is named EFI_SMM_FREE_PAGES.  \r
         To avoid a naming conflict, the definition here is renamed.\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SMMCORE_FREE_PAGES)(\r
  IN EFI_PHYSICAL_ADDRESS   Memory,\r
  IN UINTN                  NumberOfPages\r
  );\r
\r
///\r
/// The processor save-state information for IA-32 processors. This information is important in that the\r
/// SMM drivers may need to ascertain the state of the processor before invoking the SMI.\r
///\r
typedef struct {\r
  ///\r
  /// Reserved for future processors. As such, software should not attempt to interpret or\r
  /// write to this region.\r
  ///\r
  UINT8                 Reserved1[248];\r
  ///\r
  /// The location of the processor SMBASE, which is the location where the processor\r
  /// will pass control upon receipt of an SMI.\r
  ///\r
  UINT32                SMBASE;\r
  ///\r
  /// The revision of the SMM save state. This value is set by the processor.\r
  ///\r
  UINT32                SMMRevId;\r
  ///\r
  /// The value of the I/O restart field. Allows for restarting an in-process I/O instruction.\r
  ///\r
  UINT16                IORestart;\r
  ///\r
  /// Describes behavior that should be commenced in response to a halt instruction.\r
  ///\r
  UINT16                AutoHALTRestart;\r
  ///\r
  /// Reserved for future processors. As such, software should not attempt to interpret or\r
  /// write to this region.\r
  ///\r
  UINT8                 Reserved2[164];\r
\r
  //\r
  // Registers in IA-32 processors. \r
  //\r
  UINT32                ES;\r
  UINT32                CS;\r
  UINT32                SS;\r
  UINT32                DS;\r
  UINT32                FS;\r
  UINT32                GS;\r
  UINT32                LDTBase;\r
  UINT32                TR;\r
  UINT32                DR7;\r
  UINT32                DR6;\r
  UINT32                EAX;\r
  UINT32                ECX;\r
  UINT32                EDX;\r
  UINT32                EBX;\r
  UINT32                ESP;\r
  UINT32                EBP;\r
  UINT32                ESI;\r
  UINT32                EDI;\r
  UINT32                EIP;\r
  UINT32                EFLAGS;\r
  UINT32                CR3;\r
  UINT32                CR0;\r
} EFI_SMI_CPU_SAVE_STATE;\r
\r
///\r
/// The processor save-state information for the Itanium processor family. This information is\r
/// important in that the SMM drivers may need to ascertain the state of the processor before invoking\r
/// the PMI. This structure is mandatory and must be 512 byte aligned.\r
/// \r
typedef struct {\r
  UINT64   reserved;\r
  UINT64   r1;\r
  UINT64   r2;\r
  UINT64   r3;\r
  UINT64   r4;\r
  UINT64   r5;\r
  UINT64   r6;\r
  UINT64   r7;\r
  UINT64   r8;\r
  UINT64   r9;\r
  UINT64   r10;\r
  UINT64   r11;\r
  UINT64   r12;\r
  UINT64   r13;\r
  UINT64   r14;\r
  UINT64   r15;\r
  UINT64   r16;\r
  UINT64   r17;\r
  UINT64   r18;\r
  UINT64   r19;\r
  UINT64   r20;\r
  UINT64   r21;\r
  UINT64   r22;\r
  UINT64   r23;\r
  UINT64   r24;\r
  UINT64   r25;\r
  UINT64   r26;\r
  UINT64   r27;\r
  UINT64   r28;\r
  UINT64   r29;\r
  UINT64   r30;\r
  UINT64   r31;\r
\r
  UINT64   pr;\r
\r
  UINT64   b0;\r
  UINT64   b1;\r
  UINT64   b2;\r
  UINT64   b3;\r
  UINT64   b4;\r
  UINT64   b5;\r
  UINT64   b6;\r
  UINT64   b7;\r
\r
  // application registers\r
  UINT64   ar_rsc;\r
  UINT64   ar_bsp;\r
  UINT64   ar_bspstore;\r
  UINT64   ar_rnat;\r
\r
  UINT64   ar_fcr;\r
\r
  UINT64   ar_eflag;\r
  UINT64   ar_csd;\r
  UINT64   ar_ssd;\r
  UINT64   ar_cflg;\r
  UINT64   ar_fsr;\r
  UINT64   ar_fir;\r
  UINT64   ar_fdr;\r
\r
  UINT64   ar_ccv;\r
\r
  UINT64   ar_unat;\r
\r
  UINT64   ar_fpsr;\r
\r
  UINT64   ar_pfs;\r
  UINT64   ar_lc;\r
  UINT64   ar_ec;\r
\r
  // control registers\r
  UINT64   cr_dcr;\r
  UINT64   cr_itm;\r
  UINT64   cr_iva;\r
  UINT64   cr_pta;\r
  UINT64   cr_ipsr;\r
  UINT64   cr_isr;\r
  UINT64   cr_iip;\r
  UINT64   cr_ifa;\r
  UINT64   cr_itir;\r
  UINT64   cr_iipa;\r
  UINT64   cr_ifs;\r
  UINT64   cr_iim;\r
  UINT64   cr_iha;\r
\r
  // debug registers\r
  UINT64   dbr0;\r
  UINT64   dbr1;\r
  UINT64   dbr2;\r
  UINT64   dbr3;\r
  UINT64   dbr4;\r
  UINT64   dbr5;\r
  UINT64   dbr6;\r
  UINT64   dbr7;\r
\r
  UINT64   ibr0;\r
  UINT64   ibr1;\r
  UINT64   ibr2;\r
  UINT64   ibr3;\r
  UINT64   ibr4;\r
  UINT64   ibr5;\r
  UINT64   ibr6;\r
  UINT64   ibr7;\r
\r
  // virtual registers\r
  UINT64   int_nat;         // nat bits for R1-R31\r
\r
} EFI_PMI_SYSTEM_CONTEXT;\r
\r
///\r
/// The processor save-state information for IA-32 and Itanium processors. This information is\r
/// important in that the SMM drivers may need to ascertain the state of the processor before invoking\r
/// the SMI or PMI.\r
///\r
typedef union {\r
  ///\r
  /// The processor save-state information for IA-32 processors. \r
  ///\r
  EFI_SMI_CPU_SAVE_STATE     Ia32SaveState;\r
  ///\r
  /// The processor save-state information for Itanium processors.\r
  ///\r
  EFI_PMI_SYSTEM_CONTEXT     ItaniumSaveState;\r
} EFI_SMM_CPU_SAVE_STATE;\r
\r
///\r
/// The optional floating point save-state information for IA-32 processors. If the optional floating\r
/// point save is indicated for any handler, the following data structure must be preserved.\r
///\r
typedef struct {\r
  UINT16                Fcw;\r
  UINT16                Fsw;\r
  UINT16                Ftw;\r
  UINT16                Opcode;\r
  UINT32                Eip;\r
  UINT16                Cs;\r
  UINT16                Rsvd1;\r
  UINT32                DataOffset;\r
  UINT16                Ds;\r
  UINT8                 Rsvd2[10];\r
  UINT8                 St0Mm0[10], Rsvd3[6];\r
  UINT8                 St0Mm1[10], Rsvd4[6];\r
  UINT8                 St0Mm2[10], Rsvd5[6];\r
  UINT8                 St0Mm3[10], Rsvd6[6];\r
  UINT8                 St0Mm4[10], Rsvd7[6];\r
  UINT8                 St0Mm5[10], Rsvd8[6];\r
  UINT8                 St0Mm6[10], Rsvd9[6];\r
  UINT8                 St0Mm7[10], Rsvd10[6];\r
  UINT8                 Rsvd11[22*16];\r
} EFI_SMI_OPTIONAL_FPSAVE_STATE;\r
\r
///\r
/// The optional floating point save-state information for the Itanium processor family. If the optional\r
/// floating point save is indicated for any handler, then this data structure must be preserved. \r
/// \r
typedef struct {\r
  UINT64   f2[2];\r
  UINT64   f3[2];\r
  UINT64   f4[2];\r
  UINT64   f5[2];\r
  UINT64   f6[2];\r
  UINT64   f7[2];\r
  UINT64   f8[2];\r
  UINT64   f9[2];\r
  UINT64   f10[2];\r
  UINT64   f11[2];\r
  UINT64   f12[2];\r
  UINT64   f13[2];\r
  UINT64   f14[2];\r
  UINT64   f15[2];\r
  UINT64   f16[2];\r
  UINT64   f17[2];\r
  UINT64   f18[2];\r
  UINT64   f19[2];\r
  UINT64   f20[2];\r
  UINT64   f21[2];\r
  UINT64   f22[2];\r
  UINT64   f23[2];\r
  UINT64   f24[2];\r
  UINT64   f25[2];\r
  UINT64   f26[2];\r
  UINT64   f27[2];\r
  UINT64   f28[2];\r
  UINT64   f29[2];\r
  UINT64   f30[2];\r
  UINT64   f31[2];\r
} EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT;\r
\r
///\r
/// The processor save-state information for IA-32 and Itanium processors. If the optional floating\r
/// point save is indicated for any handler, then this data structure must be preserved.\r
///\r
typedef union {\r
  /// \r
  /// The optional floating point save-state information for IA-32 processors. \r
  ///\r
  EFI_SMI_OPTIONAL_FPSAVE_STATE             Ia32FpSave;\r
  ///\r
  /// The optional floating point save-state information for Itanium processors. \r
  ///\r
  EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT   ItaniumFpSave;\r
} EFI_SMM_FLOATING_POINT_SAVE_STATE;\r
\r
/**\r
  This function is the main entry point for an SMM handler dispatch\r
  or communicate-based callback.\r
\r
  @param  SmmImageHandle   A unique value returned by the SMM infrastructure\r
                           in response to registration for a communicate-based callback or dispatch.\r
  @param  CommunicationBuffer\r
                           An optional buffer that will be populated\r
                           by the SMM infrastructure in response to a non-SMM agent (preboot or runtime)\r
                           invoking the EFI_SMM_BASE_PROTOCOL.Communicate() service.\r
  @param  SourceSize       If CommunicationBuffer is non-NULL, this field\r
                           indicates the size of the data payload in this buffer.\r
\r
  @return Status Code\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SMM_HANDLER_ENTRY_POINT)(\r
  IN EFI_HANDLE             SmmImageHandle,\r
  IN OUT VOID               *CommunicationBuffer OPTIONAL,\r
  IN OUT UINTN              *SourceSize OPTIONAL\r
  );\r
\r
/**\r
  The SmmInstallConfigurationTable() function is used to maintain the list\r
  of configuration tables that are stored in the System Management System\r
  Table.  The list is stored as an array of (GUID, Pointer) pairs.  The list\r
  must be allocated from pool memory with PoolType set to EfiRuntimeServicesData.\r
\r
  @param  SystemTable      A pointer to the SMM System Table.\r
  @param  Guid             A pointer to the GUID for the entry to add, update, or remove.\r
  @param  Table            A pointer to the buffer of the table to add.\r
  @param  TableSize        The size of the table to install.\r
\r
  @retval EFI_SUCCESS           The (Guid, Table) pair was added, updated, or removed.\r
  @retval EFI_INVALID_PARAMETER Guid is not valid.\r
  @retval EFI_NOT_FOUND         An attempt was made to delete a non-existent entry.\r
  @retval EFI_OUT_OF_RESOURCES  There is not enough memory available to complete the operation.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SMM_INSTALL_CONFIGURATION_TABLE)(\r
  IN EFI_SMM_SYSTEM_TABLE         *SystemTable,\r
  IN EFI_GUID                     *Guid,\r
  IN VOID                         *Table,\r
  IN UINTN                        TableSize\r
  );\r
\r
//\r
// System Management System Table (SMST)\r
//\r
struct _EFI_SMM_SYSTEM_TABLE {\r
  ///\r
  /// The table header for the System Management System Table (SMST). \r
  ///\r
  EFI_TABLE_HEADER                    Hdr;\r
\r
  ///\r
  /// A pointer to a NULL-terminated Unicode string containing the vendor name. It is\r
  /// permissible for this pointer to be NULL.\r
  ///\r
  CHAR16                              *SmmFirmwareVendor;\r
  ///\r
  /// The particular revision of the firmware.\r
  ///\r
  UINT32                              SmmFirmwareRevision;\r
\r
  ///\r
  /// Adds, updates, or removes a configuration table entry from the SMST. \r
  ///\r
  EFI_SMM_INSTALL_CONFIGURATION_TABLE SmmInstallConfigurationTable;\r
\r
  //\r
  // I/O Services\r
  //\r
  ///\r
  /// A GUID that designates the particular CPU I/O services. \r
  ///\r
  EFI_GUID                            EfiSmmCpuIoGuid;\r
  ///\r
  /// Provides the basic memory and I/O interfaces that are used to abstract accesses to\r
  /// devices.\r
  ///\r
  EFI_SMM_CPU_IO_INTERFACE            SmmIo;\r
\r
  //\r
  // Runtime memory service\r
  //\r
  ///\r
  ///\r
  /// Allocates pool memory from SMRAM for IA-32 or runtime memory for the\r
  /// Itanium processor family.\r
  ///\r
  EFI_SMMCORE_ALLOCATE_POOL           SmmAllocatePool;\r
  ///\r
  /// Returns pool memory to the system. \r
  ///\r
  EFI_SMMCORE_FREE_POOL               SmmFreePool;\r
  ///\r
  /// Allocates memory pages from the system. \r
  ///\r
  EFI_SMMCORE_ALLOCATE_PAGES          SmmAllocatePages;\r
  ///\r
  /// Frees memory pages for the system.\r
  ///\r
  EFI_SMMCORE_FREE_PAGES              SmmFreePages;\r
\r
  //\r
  // MP service\r
  //\r
  \r
  ///Inconsistent with specification here:\r
  ///  In Framework Spec, this definition does not exist. This method is introduced in PI1.1 spec for \r
  ///  implementation needed.\r
  EFI_SMM_STARTUP_THIS_AP             SmmStartupThisAp;\r
\r
  //\r
  // CPU information records\r
  //\r
  ///\r
  /// A 1-relative number between 1 and the NumberOfCpus field. This field designates\r
  /// which processor is executing the SMM infrastructure. This number also serves as an\r
  /// index into the CpuSaveState and CpuOptionalFloatingPointState\r
  /// fields.\r
  ///\r
  UINTN                               CurrentlyExecutingCpu;\r
  ///\r
  /// The number of EFI Configuration Tables in the buffer\r
  /// SmmConfigurationTable.\r
  ///\r
  UINTN                               NumberOfCpus;\r
  ///\r
  /// A pointer to the EFI Configuration Tables. The number of entries in the table is\r
  /// NumberOfTableEntries.\r
  ///\r
  EFI_SMM_CPU_SAVE_STATE              *CpuSaveState;\r
  ///\r
  /// A pointer to a catenation of the EFI_SMM_FLOATING_POINT_SAVE_STATE.\r
  /// The size of this entire table is NumberOfCpus* size of the\r
  /// EFI_SMM_FLOATING_POINT_SAVE_STATE. These fields are populated only if\r
  /// there is at least one SMM driver that has registered for a callback with the\r
  /// FloatingPointSave field in EFI_SMM_BASE_PROTOCOL.RegisterCallback() set to TRUE.\r
  ///\r
  EFI_SMM_FLOATING_POINT_SAVE_STATE   *CpuOptionalFloatingPointState;\r
\r
  //\r
  // Extensibility table\r
  //\r
  ///\r
  /// The number of EFI Configuration Tables in the buffer\r
  /// SmmConfigurationTable.\r
  ///\r
  UINTN                               NumberOfTableEntries;\r
  ///\r
  /// A pointer to the EFI Configuration Tables. The number of entries in the table is\r
  /// NumberOfTableEntries.\r
  ///\r
  EFI_CONFIGURATION_TABLE             *SmmConfigurationTable;\r
};\r
\r
#endif\r