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1 | /** @file\r | |
2 | This protocol abstracts the PIRQ programming from the generic EFI Compatibility Support Modules (CSMs).\r | |
3 | \r | |
4 | Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r | |
5 | This program and the accompanying materials are licensed and made available under \r | |
6 | the terms and conditions of the BSD License that accompanies this distribution. \r | |
7 | The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php. \r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | @par Revision Reference:\r | |
14 | This protocol is defined in Framework for the EFI Compatibility Support Module specification.\r | |
15 | Version 0.97.\r | |
16 | \r | |
17 | **/\r | |
18 | \r | |
19 | #ifndef _EFI_LEGACY_INTERRUPT_H_\r | |
20 | #define _EFI_LEGACY_INTERRUPT_H_\r | |
21 | \r | |
22 | \r | |
23 | #define EFI_LEGACY_INTERRUPT_PROTOCOL_GUID \\r | |
24 | { \\r | |
25 | 0x31ce593d, 0x108a, 0x485d, {0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe } \\r | |
26 | }\r | |
27 | \r | |
28 | typedef struct _EFI_LEGACY_INTERRUPT_PROTOCOL EFI_LEGACY_INTERRUPT_PROTOCOL;\r | |
29 | \r | |
30 | /**\r | |
31 | Get the number of PIRQs this hardware supports.\r | |
32 | \r | |
33 | @param This The protocol instance pointer.\r | |
34 | @param NumberPirsq The number of PIRQs that are supported.\r | |
35 | \r | |
36 | @retval EFI_SUCCESS The number of PIRQs was returned successfully.\r | |
37 | \r | |
38 | **/\r | |
39 | typedef\r | |
40 | EFI_STATUS\r | |
41 | (EFIAPI *EFI_LEGACY_INTERRUPT_GET_NUMBER_PIRQS)(\r | |
42 | IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,\r | |
43 | OUT UINT8 *NumberPirqs\r | |
44 | );\r | |
45 | \r | |
46 | /**\r | |
47 | Gets the PCI location associated with this protocol.\r | |
48 | \r | |
49 | @param This The Protocol instance pointer.\r | |
50 | @param Bus The PCI Bus.\r | |
51 | @param Device The PCI Device.\r | |
52 | @param Function The PCI Function.\r | |
53 | \r | |
54 | @retval EFI_SUCCESS The Bus, Device, and Function were returned successfully.\r | |
55 | \r | |
56 | **/\r | |
57 | typedef\r | |
58 | EFI_STATUS\r | |
59 | (EFIAPI *EFI_LEGACY_INTERRUPT_GET_LOCATION)(\r | |
60 | IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,\r | |
61 | OUT UINT8 *Bus,\r | |
62 | OUT UINT8 *Device,\r | |
63 | OUT UINT8 *Function\r | |
64 | );\r | |
65 | \r | |
66 | /**\r | |
67 | Read the PIRQ register and return the data\r | |
68 | \r | |
69 | @param This The protocol instance pointer.\r | |
70 | @param PirqNumber The PIRQ register to read.\r | |
71 | @param PirqData The data read.\r | |
72 | \r | |
73 | @retval EFI_SUCCESS The data was read.\r | |
74 | @retval EFI_INVALID_PARAMETER Invalid PIRQ number.\r | |
75 | \r | |
76 | **/\r | |
77 | typedef\r | |
78 | EFI_STATUS\r | |
79 | (EFIAPI *EFI_LEGACY_INTERRUPT_READ_PIRQ)(\r | |
80 | IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,\r | |
81 | IN UINT8 PirqNumber,\r | |
82 | OUT UINT8 *PirqData\r | |
83 | );\r | |
84 | \r | |
85 | /**\r | |
86 | Write the specified PIRQ register with the given data.\r | |
87 | \r | |
88 | @param This The protocol instance pointer.\r | |
89 | @param PirqNumber A PIRQ register to read.\r | |
90 | @param PirqData The data to write.\r | |
91 | \r | |
92 | @retval EFI_SUCCESS The PIRQ was programmed.\r | |
93 | @retval EFI_INVALID_PARAMETER Invalid PIRQ number.\r | |
94 | \r | |
95 | **/\r | |
96 | typedef\r | |
97 | EFI_STATUS\r | |
98 | (EFIAPI *EFI_LEGACY_INTERRUPT_WRITE_PIRQ)(\r | |
99 | IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,\r | |
100 | IN UINT8 PirqNumber,\r | |
101 | IN UINT8 PirqData\r | |
102 | );\r | |
103 | \r | |
104 | struct _EFI_LEGACY_INTERRUPT_PROTOCOL {\r | |
105 | ///\r | |
106 | /// Gets the number of PIRQs supported.\r | |
107 | ///\r | |
108 | EFI_LEGACY_INTERRUPT_GET_NUMBER_PIRQS GetNumberPirqs;\r | |
109 | \r | |
110 | ///\r | |
111 | /// Gets the PCI bus, device, and function that is associated with this protocol.\r | |
112 | ///\r | |
113 | EFI_LEGACY_INTERRUPT_GET_LOCATION GetLocation;\r | |
114 | \r | |
115 | ///\r | |
116 | /// Reads the indicated PIRQ register.\r | |
117 | ///\r | |
118 | EFI_LEGACY_INTERRUPT_READ_PIRQ ReadPirq;\r | |
119 | \r | |
120 | ///\r | |
121 | /// Writes to the indicated PIRQ register.\r | |
122 | ///\r | |
123 | EFI_LEGACY_INTERRUPT_WRITE_PIRQ WritePirq;\r | |
124 | };\r | |
125 | \r | |
126 | extern EFI_GUID gEfiLegacyInterruptProtocolGuid;\r | |
127 | \r | |
128 | #endif\r |