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1 | /** @file\r | |
2 | This file declares PlatfromOpRom protocols which provides the interface between \r | |
3 | the PCI bus driver/PCI Host Bridge Resource Allocation driver and a platform-specific \r | |
4 | driver to describe the unique features of a platform. This\r | |
5 | protocol is optional.\r | |
6 | \r | |
7 | Copyright (c) 2007, Intel Corporation\r | |
8 | All rights reserved. This program and the accompanying materials\r | |
9 | are licensed and made available under the terms and conditions of the BSD License\r | |
10 | which accompanies this distribution. The full text of the license may be found at\r | |
11 | http://opensource.org/licenses/bsd-license.php\r | |
12 | \r | |
13 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
14 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
15 | \r | |
16 | @par Revision Reference:\r | |
17 | This protocol is defined in PCI Platform Support Specification\r | |
18 | Version 0.9\r | |
19 | \r | |
20 | **/\r | |
21 | \r | |
22 | #ifndef _PCI_PLATFORM_H_\r | |
23 | #define _PCI_PLATFORM_H_\r | |
24 | \r | |
25 | #include <PiDxe.h>\r | |
26 | #include <Protocol/PciHostBridgeResourceAllocation.h>\r | |
27 | \r | |
28 | //\r | |
29 | // Protocol for GUID.\r | |
30 | //\r | |
31 | \r | |
32 | #define EFI_PCI_PLATFORM_PROTOCOL_GUID \\r | |
33 | { 0x7d75280, 0x27d4, 0x4d69, {0x90, 0xd0, 0x56, 0x43, 0xe2, 0x38, 0xb3, 0x41} }\r | |
34 | \r | |
35 | typedef struct _EFI_PCI_PLATFORM_PROTOCOL EFI_PCI_PLATFORM_PROTOCOL;\r | |
36 | \r | |
37 | typedef UINT32 EFI_PCI_PLATFORM_POLICY;\r | |
38 | \r | |
39 | \r | |
40 | #define EFI_RESERVE_NONE_IO_ALIAS 0x0000\r | |
41 | #define EFI_RESERVE_ISA_IO_ALIAS 0x0001\r | |
42 | #define EFI_RESERVE_ISA_IO_NO_ALIAS 0x0002\r | |
43 | #define EFI_RESERVE_VGA_IO_ALIAS 0x0004\r | |
44 | #define EFI_RESERVE_VGA_IO_NO_ALIAS 0x0008\r | |
45 | \r | |
46 | \r | |
47 | typedef enum {\r | |
48 | ChipsetEntry,\r | |
49 | ChipsetExit,\r | |
50 | MaximumChipsetPhase\r | |
51 | } EFI_PCI_CHIPSET_EXECUTION_PHASE;\r | |
52 | \r | |
53 | \r | |
54 | /**\r | |
55 | The PlatformNotify() function can be used to notify the platform driver so that\r | |
56 | it can perform platform-specific actions. No specific actions are required.\r | |
57 | Eight notification points are defined at this time. More synchronization points\r | |
58 | may be added as required in the future. The PCI bus driver calls the platform driver\r | |
59 | twice for every Phase-once before the PCI Host Bridge Resource Allocation Protocol\r | |
60 | driver is notified, and once after the PCI Host Bridge Resource Allocation Protocol\r | |
61 | driver has been notified.\r | |
62 | This member function may not perform any error checking on the input parameters. It\r | |
63 | also does not return any error codes. If this member function detects any error condition,\r | |
64 | it needs to handle those errors on its own because there is no way to surface any\r | |
65 | errors to the caller.\r | |
66 | \r | |
67 | @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.\r | |
68 | @param HostBridge The handle of the host bridge controller.\r | |
69 | @param Phase The phase of the PCI bus enumeration.\r | |
70 | @param ChipsetPhase Defines the execution phase of the PCI chipset driver.\r | |
71 | \r | |
72 | @retval EFI_SUCCESS The function completed successfully.\r | |
73 | \r | |
74 | **/\r | |
75 | typedef\r | |
76 | EFI_STATUS\r | |
77 | (EFIAPI *EFI_PCI_PLATFORM_PHASE_NOTIFY)(\r | |
78 | IN EFI_PCI_PLATFORM_PROTOCOL *This,\r | |
79 | IN EFI_HANDLE HostBridge,\r | |
80 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase,\r | |
81 | IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase\r | |
82 | );\r | |
83 | \r | |
84 | \r | |
85 | /**\r | |
86 | The PlatformPrepController() function can be used to notify the platform driver so that\r | |
87 | it can perform platform-specific actions. No specific actions are required.\r | |
88 | Several notification points are defined at this time. More synchronization points may be\r | |
89 | added as required in the future. The PCI bus driver calls the platform driver twice for\r | |
90 | every PCI controller-once before the PCI Host Bridge Resource Allocation Protocol driver\r | |
91 | is notified, and once after the PCI Host Bridge Resource Allocation Protocol driver has\r | |
92 | been notified.\r | |
93 | This member function may not perform any error checking on the input parameters. It also\r | |
94 | does not return any error codes. If this member function detects any error condition, it\r | |
95 | needs to handle those errors on its own because there is no way to surface any errors to\r | |
96 | the caller.\r | |
97 | \r | |
98 | @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.\r | |
99 | @param HostBridge The associated PCI host bridge handle.\r | |
100 | @param RootBridge The associated PCI root bridge handle.\r | |
101 | @param PciAddress The address of the PCI device on the PCI bus.\r | |
102 | @param Phase The phase of the PCI controller enumeration.\r | |
103 | @param ChipsetPhase Defines the execution phase of the PCI chipset driver.\r | |
104 | \r | |
105 | @retval EFI_SUCCESS The function completed successfully.\r | |
106 | \r | |
107 | **/\r | |
108 | typedef\r | |
109 | EFI_STATUS\r | |
110 | (EFIAPI *EFI_PCI_PLATFORM_PREPROCESS_CONTROLLER)(\r | |
111 | IN EFI_PCI_PLATFORM_PROTOCOL *This,\r | |
112 | IN EFI_HANDLE HostBridge,\r | |
113 | IN EFI_HANDLE RootBridge,\r | |
114 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r | |
115 | IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase,\r | |
116 | IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase\r | |
117 | );\r | |
118 | \r | |
119 | \r | |
120 | /**\r | |
121 | The GetPlatformPolicy() function retrieves the platform policy regarding PCI\r | |
122 | enumeration. The PCI bus driver and the PCI Host Bridge Resource Allocation Protocol\r | |
123 | driver can call this member function to retrieve the policy.\r | |
124 | \r | |
125 | @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.\r | |
126 | @param PciPolicy The platform policy with respect to VGA and ISA aliasing.\r | |
127 | \r | |
128 | @retval EFI_SUCCESS The function completed successfully.\r | |
129 | @retval EFI_INVALID_PARAMETER PciPolicy is NULL.\r | |
130 | \r | |
131 | **/\r | |
132 | typedef\r | |
133 | EFI_STATUS\r | |
134 | (EFIAPI *EFI_PCI_PLATFORM_GET_PLATFORM_POLICY)(\r | |
135 | IN EFI_PCI_PLATFORM_PROTOCOL *This,\r | |
136 | OUT EFI_PCI_PLATFORM_POLICY *PciPolicy\r | |
137 | );\r | |
138 | \r | |
139 | \r | |
140 | /**\r | |
141 | The GetPciRom() function gets the PCI device's option ROM from a platform-specific location.\r | |
142 | The option ROM will be loaded into memory. This member function is used to return an image\r | |
143 | that is packaged as a PCI 2.2 option ROM. The image may contain both legacy and EFI option\r | |
144 | ROMs. See the UEFI 2.0 Specification for details. This member function can be used to return\r | |
145 | option ROM images for embedded controllers. Option ROMs for embedded controllers are typically\r | |
146 | stored in platform-specific storage, and this member function can retrieve it from that storage\r | |
147 | and return it to the PCI bus driver. The PCI bus driver will call this member function before\r | |
148 | scanning the ROM that is attached to any controller, which allows a platform to specify a ROM\r | |
149 | image that is different from the ROM image on a PCI card.\r | |
150 | \r | |
151 | @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.\r | |
152 | @param PciHandle The handle of the PCI device.\r | |
153 | @param RomImage If the call succeeds, the pointer to the pointer to the option ROM image.\r | |
154 | Otherwise, this field is undefined. The memory for RomImage is allocated\r | |
155 | by EFI_PCI_PLATFORM_PROTOCOL.GetPciRom() using the EFI Boot Service AllocatePool().\r | |
156 | It is the caller's responsibility to free the memory using the EFI Boot Service\r | |
157 | FreePool(), when the caller is done with the option ROM.\r | |
158 | @param RomSize If the call succeeds, a pointer to the size of the option ROM size. Otherwise,\r | |
159 | this field is undefined.\r | |
160 | \r | |
161 | @retval EFI_SUCCESS The option ROM was available for this device and loaded into memory.\r | |
162 | @retval EFI_NOT_FOUND No option ROM was available for this device.\r | |
163 | @retval EFI_OUT_OF_RESOURCES No memory was available to load the option ROM.\r | |
164 | @retval EFI_DEVICE_ERROR An error occurred in getting the option ROM.\r | |
165 | \r | |
166 | **/\r | |
167 | typedef\r | |
168 | EFI_STATUS\r | |
169 | (EFIAPI *EFI_PCI_PLATFORM_GET_PCI_ROM)(\r | |
170 | IN EFI_PCI_PLATFORM_PROTOCOL *This,\r | |
171 | IN EFI_HANDLE PciHandle,\r | |
172 | OUT VOID **RomImage,\r | |
173 | OUT UINTN *RomSize\r | |
174 | );\r | |
175 | \r | |
176 | /**\r | |
177 | @par Protocol Description:\r | |
178 | This protocol provides the interface between the PCI bus driver/PCI Host\r | |
179 | Bridge Resource Allocation driver and a platform-specific driver to describe\r | |
180 | the unique features of a platform.\r | |
181 | \r | |
182 | @param PlatformNotify\r | |
183 | The notification from the PCI bus enumerator to the platform that it is\r | |
184 | about to enter a certain phase during the enumeration process.\r | |
185 | \r | |
186 | @param PlatformPrepController\r | |
187 | The notification from the PCI bus enumerator to the platform for each PCI\r | |
188 | controller at several predefined points during PCI controller initialization.\r | |
189 | \r | |
190 | @param GetPlatformPolicy\r | |
191 | Retrieves the platform policy regarding enumeration.\r | |
192 | \r | |
193 | @param GetPciRom\r | |
194 | Gets the PCI device's option ROM from a platform-specific location.\r | |
195 | \r | |
196 | **/\r | |
197 | struct _EFI_PCI_PLATFORM_PROTOCOL {\r | |
198 | EFI_PCI_PLATFORM_PHASE_NOTIFY PhaseNotify;\r | |
199 | EFI_PCI_PLATFORM_PREPROCESS_CONTROLLER PlatformPrepController;\r | |
200 | EFI_PCI_PLATFORM_GET_PLATFORM_POLICY GetPlatformPolicy;\r | |
201 | EFI_PCI_PLATFORM_GET_PCI_ROM GetPciRom;\r | |
202 | };\r | |
203 | \r | |
204 | extern EFI_GUID gEfiPciPlatformProtocolGuid;\r | |
205 | \r | |
206 | #endif\r |