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1 | /** @file\r | |
2 | \r | |
3 | Copyright (c) 2006 - 2007, Intel Corporation\r | |
4 | All rights reserved. This program and the accompanying materials\r | |
5 | are licensed and made available under the terms and conditions of the BSD License\r | |
6 | which accompanies this distribution. The full text of the license may be found at\r | |
7 | http://opensource.org/licenses/bsd-license.php\r | |
8 | \r | |
9 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
10 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
11 | \r | |
12 | Module Name:\r | |
13 | \r | |
14 | Ehci.h\r | |
15 | \r | |
16 | Abstract:\r | |
17 | \r | |
18 | \r | |
19 | Revision History\r | |
20 | \r | |
21 | **/\r | |
22 | \r | |
23 | #ifndef _EFI_EHCI_H_\r | |
24 | #define _EFI_EHCI_H_\r | |
25 | \r | |
26 | //\r | |
27 | // The package level header files this module uses\r | |
28 | //\r | |
29 | #include <PiDxe.h>\r | |
30 | //\r | |
31 | // The protocols, PPI and GUID defintions for this module\r | |
32 | //\r | |
33 | #include <Protocol/Usb2HostController.h>\r | |
34 | #include <Protocol/PciIo.h>\r | |
35 | //\r | |
36 | // The Library classes this module consumes\r | |
37 | //\r | |
38 | #include <Library/DebugLib.h>\r | |
39 | #include <Library/BaseMemoryLib.h>\r | |
40 | #include <Library/UefiDriverEntryPoint.h>\r | |
41 | #include <Library/UefiBootServicesTableLib.h>\r | |
42 | #include <Library/UefiLib.h>\r | |
43 | #include <Library/BaseLib.h>\r | |
44 | #include <Library/MemoryAllocationLib.h>\r | |
45 | \r | |
46 | \r | |
47 | #include <IndustryStandard/Pci22.h>\r | |
48 | \r | |
49 | typedef struct _USB2_HC_DEV USB2_HC_DEV;\r | |
50 | \r | |
51 | #include "UsbHcMem.h"\r | |
52 | #include "EhciReg.h"\r | |
53 | #include "EhciUrb.h"\r | |
54 | #include "EhciSched.h"\r | |
55 | #include "EhciDebug.h"\r | |
56 | \r | |
57 | enum {\r | |
58 | USB2_HC_DEV_SIGNATURE = EFI_SIGNATURE_32 ('e', 'h', 'c', 'i'),\r | |
59 | EHC_STALL_1_MICROSECOND = 1,\r | |
60 | EHC_STALL_1_MILLISECOND = 1000 * EHC_STALL_1_MICROSECOND,\r | |
61 | EHC_STALL_1_SECOND = 1000 * EHC_STALL_1_MILLISECOND,\r | |
62 | \r | |
63 | EHC_SET_PORT_RESET_TIME = 50 * EHC_STALL_1_MILLISECOND,\r | |
64 | EHC_CLEAR_PORT_RESET_TIME = EHC_STALL_1_MILLISECOND,\r | |
65 | EHC_GENERIC_TIME = 10 * EHC_STALL_1_MILLISECOND,\r | |
66 | EHC_SYNC_POLL_TIME = 20 * EHC_STALL_1_MICROSECOND,\r | |
67 | EHC_ASYNC_POLL_TIME = 50 * 10000UL, // The unit of time is 100us\r | |
68 | \r | |
69 | EHC_TPL = TPL_NOTIFY,\r | |
70 | };\r | |
71 | \r | |
72 | //\r | |
73 | //Iterate through the doule linked list. NOT delete safe\r | |
74 | //\r | |
75 | #define EFI_LIST_FOR_EACH(Entry, ListHead) \\r | |
76 | for(Entry = (ListHead)->ForwardLink; Entry != (ListHead); Entry = Entry->ForwardLink)\r | |
77 | \r | |
78 | //\r | |
79 | //Iterate through the doule linked list. This is delete-safe.\r | |
80 | //Don't touch NextEntry\r | |
81 | //\r | |
82 | #define EFI_LIST_FOR_EACH_SAFE(Entry, NextEntry, ListHead) \\r | |
83 | for(Entry = (ListHead)->ForwardLink, NextEntry = Entry->ForwardLink;\\r | |
84 | Entry != (ListHead); Entry = NextEntry, NextEntry = Entry->ForwardLink)\r | |
85 | \r | |
86 | #define EFI_LIST_CONTAINER(Entry, Type, Field) _CR(Entry, Type, Field)\r | |
87 | \r | |
88 | \r | |
89 | #define EHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))\r | |
90 | #define EHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))\r | |
91 | #define EHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))\r | |
92 | \r | |
93 | #define EHC_REG_BIT_IS_SET(Ehc, Offset, Bit) \\r | |
94 | (EHC_BIT_IS_SET(EhcReadOpReg ((Ehc), (Offset)), (Bit)))\r | |
95 | \r | |
96 | #define EHC_FROM_THIS(a) CR(a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)\r | |
97 | \r | |
98 | typedef struct _USB2_HC_DEV {\r | |
99 | UINTN Signature;\r | |
100 | EFI_USB2_HC_PROTOCOL Usb2Hc;\r | |
101 | \r | |
102 | EFI_PCI_IO_PROTOCOL *PciIo;\r | |
103 | USBHC_MEM_POOL *MemPool;\r | |
104 | \r | |
105 | //\r | |
106 | // Schedule data shared between asynchronous and periodic\r | |
107 | // transfers:\r | |
108 | // ShortReadStop, as its name indicates, is used to terminate\r | |
109 | // the short read except the control transfer. EHCI follows\r | |
110 | // the alternative next QTD point when a short read happens.\r | |
111 | // For control transfer, even the short read happens, try the\r | |
112 | // status stage.\r | |
113 | //\r | |
114 | EHC_QTD *ShortReadStop;\r | |
115 | EFI_EVENT PollTimer;\r | |
116 | \r | |
117 | //\r | |
118 | // Asynchronous(bulk and control) transfer schedule data:\r | |
119 | // ReclaimHead is used as the head of the asynchronous transfer\r | |
120 | // list. It acts as the reclamation header.\r | |
121 | //\r | |
122 | EHC_QH *ReclaimHead;\r | |
123 | \r | |
124 | //\r | |
125 | // Peroidic (interrupt) transfer schedule data:\r | |
126 | //\r | |
127 | VOID *PeriodFrame; // Mapped as common buffer\r | |
128 | VOID *PeriodFrameHost;\r | |
129 | VOID *PeriodFrameMap;\r | |
130 | \r | |
131 | EHC_QH *PeriodOne;\r | |
132 | LIST_ENTRY AsyncIntTransfers;\r | |
133 | \r | |
134 | //\r | |
135 | // EHCI configuration data\r | |
136 | //\r | |
137 | UINT32 HcStructParams; // Cache of HC structure parameter, EHC_HCSPARAMS_OFFSET\r | |
138 | UINT32 HcCapParams; // Cache of HC capability parameter, HCCPARAMS\r | |
139 | UINT32 CapLen; // Capability length\r | |
140 | UINT32 High32bitAddr;\r | |
141 | \r | |
142 | //\r | |
143 | // Misc\r | |
144 | //\r | |
145 | EFI_UNICODE_STRING_TABLE *ControllerNameTable;\r | |
146 | } USB2_HC_DEV;\r | |
147 | \r | |
148 | \r | |
149 | extern EFI_DRIVER_BINDING_PROTOCOL gEhciDriverBinding;\r | |
150 | extern EFI_COMPONENT_NAME_PROTOCOL gEhciComponentName;\r | |
151 | \r | |
152 | #endif\r |