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1 | /** @file\r | |
2 | \r | |
3 | Provides some data struct used by EHCI controller driver.\r | |
4 | \r | |
5 | Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r | |
6 | This program and the accompanying materials\r | |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
14 | **/\r | |
15 | \r | |
16 | #ifndef _EFI_EHCI_H_\r | |
17 | #define _EFI_EHCI_H_\r | |
18 | \r | |
19 | \r | |
20 | #include <Uefi.h>\r | |
21 | \r | |
22 | #include <Protocol/Usb2HostController.h>\r | |
23 | #include <Protocol/PciIo.h>\r | |
24 | \r | |
25 | #include <Guid/EventGroup.h>\r | |
26 | \r | |
27 | #include <Library/DebugLib.h>\r | |
28 | #include <Library/BaseMemoryLib.h>\r | |
29 | #include <Library/UefiDriverEntryPoint.h>\r | |
30 | #include <Library/UefiBootServicesTableLib.h>\r | |
31 | #include <Library/UefiLib.h>\r | |
32 | #include <Library/BaseLib.h>\r | |
33 | #include <Library/MemoryAllocationLib.h>\r | |
34 | #include <Library/PcdLib.h>\r | |
35 | #include <Library/ReportStatusCodeLib.h>\r | |
36 | \r | |
37 | #include <IndustryStandard/Pci.h>\r | |
38 | \r | |
39 | typedef struct _USB2_HC_DEV USB2_HC_DEV;\r | |
40 | \r | |
41 | #include "UsbHcMem.h"\r | |
42 | #include "EhciReg.h"\r | |
43 | #include "EhciUrb.h"\r | |
44 | #include "EhciSched.h"\r | |
45 | #include "EhciDebug.h"\r | |
46 | #include "ComponentName.h"\r | |
47 | \r | |
48 | //\r | |
49 | // EHC timeout experience values\r | |
50 | //\r | |
51 | \r | |
52 | #define EHC_1_MICROSECOND 1\r | |
53 | #define EHC_1_MILLISECOND (1000 * EHC_1_MICROSECOND)\r | |
54 | #define EHC_1_SECOND (1000 * EHC_1_MILLISECOND)\r | |
55 | \r | |
56 | //\r | |
57 | // EHCI register operation timeout, set by experience\r | |
58 | //\r | |
59 | #define EHC_RESET_TIMEOUT (1 * EHC_1_SECOND)\r | |
60 | #define EHC_GENERIC_TIMEOUT (10 * EHC_1_MILLISECOND)\r | |
61 | \r | |
62 | //\r | |
63 | // Wait for roothub port power stable, refers to Spec[EHCI1.0-2.3.9]\r | |
64 | //\r | |
65 | #define EHC_ROOT_PORT_RECOVERY_STALL (20 * EHC_1_MILLISECOND)\r | |
66 | \r | |
67 | //\r | |
68 | // Sync and Async transfer polling interval, set by experience,\r | |
69 | // and the unit of Async is 100us, means 1ms as interval.\r | |
70 | //\r | |
71 | #define EHC_SYNC_POLL_INTERVAL (1 * EHC_1_MILLISECOND)\r | |
72 | #define EHC_ASYNC_POLL_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)\r | |
73 | \r | |
74 | //\r | |
75 | // EHCI debug port control status register bit definition\r | |
76 | //\r | |
77 | #define USB_DEBUG_PORT_IN_USE BIT10\r | |
78 | #define USB_DEBUG_PORT_ENABLE BIT28\r | |
79 | #define USB_DEBUG_PORT_OWNER BIT30\r | |
80 | \r | |
81 | //\r | |
82 | // EHC raises TPL to TPL_NOTIFY to serialize all its operations\r | |
83 | // to protect shared data structures.\r | |
84 | //\r | |
85 | #define EHC_TPL TPL_NOTIFY\r | |
86 | \r | |
87 | //\r | |
88 | //Iterate through the doule linked list. NOT delete safe\r | |
89 | //\r | |
90 | #define EFI_LIST_FOR_EACH(Entry, ListHead) \\r | |
91 | for(Entry = (ListHead)->ForwardLink; Entry != (ListHead); Entry = Entry->ForwardLink)\r | |
92 | \r | |
93 | //\r | |
94 | //Iterate through the doule linked list. This is delete-safe.\r | |
95 | //Don't touch NextEntry\r | |
96 | //\r | |
97 | #define EFI_LIST_FOR_EACH_SAFE(Entry, NextEntry, ListHead) \\r | |
98 | for(Entry = (ListHead)->ForwardLink, NextEntry = Entry->ForwardLink;\\r | |
99 | Entry != (ListHead); Entry = NextEntry, NextEntry = Entry->ForwardLink)\r | |
100 | \r | |
101 | #define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field)\r | |
102 | \r | |
103 | \r | |
104 | #define EHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))\r | |
105 | #define EHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))\r | |
106 | #define EHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))\r | |
107 | \r | |
108 | #define EHC_REG_BIT_IS_SET(Ehc, Offset, Bit) \\r | |
109 | (EHC_BIT_IS_SET(EhcReadOpReg ((Ehc), (Offset)), (Bit)))\r | |
110 | \r | |
111 | #define USB2_HC_DEV_SIGNATURE SIGNATURE_32 ('e', 'h', 'c', 'i')\r | |
112 | #define EHC_FROM_THIS(a) CR(a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)\r | |
113 | \r | |
114 | struct _USB2_HC_DEV {\r | |
115 | UINTN Signature;\r | |
116 | EFI_USB2_HC_PROTOCOL Usb2Hc;\r | |
117 | \r | |
118 | EFI_PCI_IO_PROTOCOL *PciIo;\r | |
119 | EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r | |
120 | UINT64 OriginalPciAttributes;\r | |
121 | USBHC_MEM_POOL *MemPool;\r | |
122 | \r | |
123 | //\r | |
124 | // Schedule data shared between asynchronous and periodic\r | |
125 | // transfers:\r | |
126 | // ShortReadStop, as its name indicates, is used to terminate\r | |
127 | // the short read except the control transfer. EHCI follows\r | |
128 | // the alternative next QTD point when a short read happens.\r | |
129 | // For control transfer, even the short read happens, try the\r | |
130 | // status stage.\r | |
131 | //\r | |
132 | EHC_QTD *ShortReadStop;\r | |
133 | EFI_EVENT PollTimer;\r | |
134 | \r | |
135 | //\r | |
136 | // ExitBootServicesEvent is used to stop the EHC DMA operation \r | |
137 | // after exit boot service.\r | |
138 | //\r | |
139 | EFI_EVENT ExitBootServiceEvent;\r | |
140 | \r | |
141 | //\r | |
142 | // Asynchronous(bulk and control) transfer schedule data:\r | |
143 | // ReclaimHead is used as the head of the asynchronous transfer\r | |
144 | // list. It acts as the reclamation header.\r | |
145 | //\r | |
146 | EHC_QH *ReclaimHead;\r | |
147 | \r | |
148 | //\r | |
149 | // Peroidic (interrupt) transfer schedule data:\r | |
150 | //\r | |
151 | VOID *PeriodFrame; // the buffer pointed by this pointer is used to store pci bus address of the QH descriptor.\r | |
152 | VOID *PeriodFrameHost; // the buffer pointed by this pointer is used to store host memory address of the QH descriptor.\r | |
153 | VOID *PeriodFrameMap;\r | |
154 | \r | |
155 | EHC_QH *PeriodOne;\r | |
156 | LIST_ENTRY AsyncIntTransfers;\r | |
157 | \r | |
158 | //\r | |
159 | // EHCI configuration data\r | |
160 | //\r | |
161 | UINT32 HcStructParams; // Cache of HC structure parameter, EHC_HCSPARAMS_OFFSET\r | |
162 | UINT32 HcCapParams; // Cache of HC capability parameter, HCCPARAMS\r | |
163 | UINT32 CapLen; // Capability length\r | |
164 | \r | |
165 | //\r | |
166 | // Misc\r | |
167 | //\r | |
168 | EFI_UNICODE_STRING_TABLE *ControllerNameTable;\r | |
169 | \r | |
170 | //\r | |
171 | // EHCI debug port info\r | |
172 | //\r | |
173 | UINT16 DebugPortOffset; // The offset of debug port mmio register\r | |
174 | UINT8 DebugPortBarNum; // The bar number of debug port mmio register\r | |
175 | UINT8 DebugPortNum; // The port number of usb debug port\r | |
176 | };\r | |
177 | \r | |
178 | \r | |
179 | extern EFI_DRIVER_BINDING_PROTOCOL gEhciDriverBinding;\r | |
180 | extern EFI_COMPONENT_NAME_PROTOCOL gEhciComponentName;\r | |
181 | extern EFI_COMPONENT_NAME2_PROTOCOL gEhciComponentName2;\r | |
182 | \r | |
183 | /**\r | |
184 | Test to see if this driver supports ControllerHandle. Any\r | |
185 | ControllerHandle that has Usb2HcProtocol installed will\r | |
186 | be supported.\r | |
187 | \r | |
188 | @param This Protocol instance pointer.\r | |
189 | @param Controller Handle of device to test.\r | |
190 | @param RemainingDevicePath Not used.\r | |
191 | \r | |
192 | @return EFI_SUCCESS This driver supports this device.\r | |
193 | @return EFI_UNSUPPORTED This driver does not support this device.\r | |
194 | \r | |
195 | **/\r | |
196 | EFI_STATUS\r | |
197 | EFIAPI\r | |
198 | EhcDriverBindingSupported (\r | |
199 | IN EFI_DRIVER_BINDING_PROTOCOL *This,\r | |
200 | IN EFI_HANDLE Controller,\r | |
201 | IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r | |
202 | );\r | |
203 | \r | |
204 | /**\r | |
205 | Starting the Usb EHCI Driver.\r | |
206 | \r | |
207 | @param This Protocol instance pointer.\r | |
208 | @param Controller Handle of device to test.\r | |
209 | @param RemainingDevicePath Not used.\r | |
210 | \r | |
211 | @return EFI_SUCCESS supports this device.\r | |
212 | @return EFI_UNSUPPORTED do not support this device.\r | |
213 | @return EFI_DEVICE_ERROR cannot be started due to device Error.\r | |
214 | @return EFI_OUT_OF_RESOURCES cannot allocate resources.\r | |
215 | \r | |
216 | **/\r | |
217 | EFI_STATUS\r | |
218 | EFIAPI\r | |
219 | EhcDriverBindingStart (\r | |
220 | IN EFI_DRIVER_BINDING_PROTOCOL *This,\r | |
221 | IN EFI_HANDLE Controller,\r | |
222 | IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r | |
223 | );\r | |
224 | \r | |
225 | /**\r | |
226 | Stop this driver on ControllerHandle. Support stoping any child handles\r | |
227 | created by this driver.\r | |
228 | \r | |
229 | @param This Protocol instance pointer.\r | |
230 | @param Controller Handle of device to stop driver on.\r | |
231 | @param NumberOfChildren Number of Children in the ChildHandleBuffer.\r | |
232 | @param ChildHandleBuffer List of handles for the children we need to stop.\r | |
233 | \r | |
234 | @return EFI_SUCCESS Success.\r | |
235 | @return EFI_DEVICE_ERROR Fail.\r | |
236 | \r | |
237 | **/\r | |
238 | EFI_STATUS\r | |
239 | EFIAPI\r | |
240 | EhcDriverBindingStop (\r | |
241 | IN EFI_DRIVER_BINDING_PROTOCOL *This,\r | |
242 | IN EFI_HANDLE Controller,\r | |
243 | IN UINTN NumberOfChildren,\r | |
244 | IN EFI_HANDLE *ChildHandleBuffer\r | |
245 | );\r | |
246 | \r | |
247 | #endif\r | |
248 | \r |