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1/** @file\r
2 Task priority (TPL) functions.\r
3\r
4Copyright (c) 2006 - 2010, Intel Corporation. <BR>\r
5All rights reserved. This program and the accompanying materials\r
6are licensed and made available under the terms and conditions of the BSD License\r
7which accompanies this distribution. The full text of the license may be found at\r
8http://opensource.org/licenses/bsd-license.php\r
9\r
10THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#include "DxeMain.h"\r
16#include "Event.h"\r
17\r
18/**\r
19 Set Interrupt State.\r
20\r
21 @param Enable The state of enable or disable interrupt\r
22\r
23**/\r
24VOID\r
25CoreSetInterruptState (\r
26 IN BOOLEAN Enable\r
27 )\r
28{\r
29 EFI_STATUS Status;\r
30 BOOLEAN InSmm;\r
31 \r
32 if (gCpu == NULL) {\r
33 return;\r
34 }\r
35 if (!Enable) {\r
36 gCpu->DisableInterrupt (gCpu);\r
37 return;\r
38 }\r
39 if (gSmmBase2 == NULL) {\r
40 gCpu->EnableInterrupt (gCpu);\r
41 return;\r
42 }\r
43 Status = gSmmBase2->InSmm (gSmmBase2, &InSmm);\r
44 if (!EFI_ERROR (Status) && !InSmm) {\r
45 gCpu->EnableInterrupt(gCpu);\r
46 }\r
47}\r
48\r
49\r
50/**\r
51 Raise the task priority level to the new level.\r
52 High level is implemented by disabling processor interrupts.\r
53\r
54 @param NewTpl New task priority level\r
55\r
56 @return The previous task priority level\r
57\r
58**/\r
59EFI_TPL\r
60EFIAPI\r
61CoreRaiseTpl (\r
62 IN EFI_TPL NewTpl\r
63 )\r
64{\r
65 EFI_TPL OldTpl;\r
66\r
67 OldTpl = gEfiCurrentTpl;\r
68 ASSERT (OldTpl <= NewTpl);\r
69 ASSERT (VALID_TPL (NewTpl));\r
70\r
71 //\r
72 // If raising to high level, disable interrupts\r
73 //\r
74 if (NewTpl >= TPL_HIGH_LEVEL && OldTpl < TPL_HIGH_LEVEL) {\r
75 CoreSetInterruptState (FALSE);\r
76 }\r
77\r
78 //\r
79 // Set the new value\r
80 //\r
81 gEfiCurrentTpl = NewTpl;\r
82\r
83 return OldTpl;\r
84}\r
85\r
86\r
87\r
88\r
89/**\r
90 Lowers the task priority to the previous value. If the new\r
91 priority unmasks events at a higher priority, they are dispatched.\r
92\r
93 @param NewTpl New, lower, task priority\r
94\r
95**/\r
96VOID\r
97EFIAPI\r
98CoreRestoreTpl (\r
99 IN EFI_TPL NewTpl\r
100 )\r
101{\r
102 EFI_TPL OldTpl;\r
103\r
104 OldTpl = gEfiCurrentTpl;\r
105 ASSERT (NewTpl <= OldTpl);\r
106 ASSERT (VALID_TPL (NewTpl));\r
107\r
108 //\r
109 // If lowering below HIGH_LEVEL, make sure\r
110 // interrupts are enabled\r
111 //\r
112\r
113 if (OldTpl >= TPL_HIGH_LEVEL && NewTpl < TPL_HIGH_LEVEL) {\r
114 gEfiCurrentTpl = TPL_HIGH_LEVEL;\r
115 }\r
116\r
117 //\r
118 // Dispatch any pending events\r
119 //\r
120 while (((-2 << NewTpl) & gEventPending) != 0) {\r
121 gEfiCurrentTpl = HighBitSet64 (gEventPending);\r
122 if (gEfiCurrentTpl < TPL_HIGH_LEVEL) {\r
123 CoreSetInterruptState (TRUE);\r
124 }\r
125 CoreDispatchEventNotifies (gEfiCurrentTpl);\r
126 }\r
127\r
128 //\r
129 // Set the new value\r
130 //\r
131\r
132 gEfiCurrentTpl = NewTpl;\r
133\r
134 //\r
135 // If lowering below HIGH_LEVEL, make sure\r
136 // interrupts are enabled\r
137 //\r
138 if (gEfiCurrentTpl < TPL_HIGH_LEVEL) {\r
139 CoreSetInterruptState (TRUE);\r
140 }\r
141\r
142}\r