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1 | /** @file\r | |
2 | Ia32-specific functionality for DxeLoad.\r | |
3 | \r | |
4 | Copyright (c) 2006 - 2010, Intel Corporation. <BR>\r | |
5 | All rights reserved. This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #include "DxeIpl.h"\r | |
16 | #include "VirtualMemory.h"\r | |
17 | \r | |
18 | #define IDT_ENTRY_COUNT 32\r | |
19 | \r | |
20 | //\r | |
21 | // Global Descriptor Table (GDT)\r | |
22 | //\r | |
23 | GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT gGdtEntries[] = {\r | |
24 | /* selector { Global Segment Descriptor } */\r | |
25 | /* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //null descriptor\r | |
26 | /* 0x08 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear data segment descriptor\r | |
27 | /* 0x10 */ {{0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear code segment descriptor\r | |
28 | /* 0x18 */ {{0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r | |
29 | /* 0x20 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system code segment descriptor\r | |
30 | /* 0x28 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r | |
31 | /* 0x30 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r | |
32 | /* 0x38 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}}, //system code segment descriptor\r | |
33 | /* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r | |
34 | };\r | |
35 | \r | |
36 | //\r | |
37 | // IA32 Gdt register\r | |
38 | //\r | |
39 | GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR gGdt = {\r | |
40 | sizeof (gGdtEntries) - 1,\r | |
41 | (UINTN) gGdtEntries\r | |
42 | };\r | |
43 | \r | |
44 | GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR gLidtDescriptor = {\r | |
45 | sizeof (X64_IDT_GATE_DESCRIPTOR) * IDT_ENTRY_COUNT - 1,\r | |
46 | 0\r | |
47 | };\r | |
48 | \r | |
49 | /**\r | |
50 | Transfers control to DxeCore.\r | |
51 | \r | |
52 | This function performs a CPU architecture specific operations to execute\r | |
53 | the entry point of DxeCore with the parameters of HobList.\r | |
54 | It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.\r | |
55 | \r | |
56 | @param DxeCoreEntryPoint The entry point of DxeCore.\r | |
57 | @param HobList The start of HobList passed to DxeCore.\r | |
58 | \r | |
59 | **/\r | |
60 | VOID\r | |
61 | HandOffToDxeCore (\r | |
62 | IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,\r | |
63 | IN EFI_PEI_HOB_POINTERS HobList\r | |
64 | )\r | |
65 | {\r | |
66 | EFI_STATUS Status;\r | |
67 | EFI_PHYSICAL_ADDRESS BaseOfStack;\r | |
68 | EFI_PHYSICAL_ADDRESS TopOfStack;\r | |
69 | UINTN PageTables;\r | |
70 | X64_IDT_GATE_DESCRIPTOR *IdtTable;\r | |
71 | UINTN SizeOfTemplate;\r | |
72 | VOID *TemplateBase;\r | |
73 | EFI_PHYSICAL_ADDRESS VectorAddress;\r | |
74 | UINT32 Index;\r | |
75 | \r | |
76 | Status = PeiServicesAllocatePages (EfiBootServicesData, EFI_SIZE_TO_PAGES (STACK_SIZE), &BaseOfStack);\r | |
77 | ASSERT_EFI_ERROR (Status);\r | |
78 | \r | |
79 | if (FeaturePcdGet(PcdDxeIplSwitchToLongMode)) {\r | |
80 | //\r | |
81 | // Compute the top of the stack we were allocated, which is used to load X64 dxe core.\r | |
82 | // Pre-allocate a 32 bytes which confroms to x64 calling convention.\r | |
83 | //\r | |
84 | // The first four parameters to a function are passed in rcx, rdx, r8 and r9.\r | |
85 | // Any further parameters are pushed on the stack. Furthermore, space (4 * 8bytes) for the\r | |
86 | // register parameters is reserved on the stack, in case the called function\r | |
87 | // wants to spill them; this is important if the function is variadic.\r | |
88 | //\r | |
89 | TopOfStack = BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - 32;\r | |
90 | \r | |
91 | //\r | |
92 | // x64 Calling Conventions requires that the stack must be aligned to 16 bytes\r | |
93 | //\r | |
94 | TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, 16);\r | |
95 | \r | |
96 | //\r | |
97 | // Load the GDT of Go64. Since the GDT of 32-bit Tiano locates in the BS_DATA\r | |
98 | // memory, it may be corrupted when copying FV to high-end memory\r | |
99 | //\r | |
100 | AsmWriteGdtr (&gGdt);\r | |
101 | //\r | |
102 | // Create page table and save PageMapLevel4 to CR3\r | |
103 | //\r | |
104 | PageTables = CreateIdentityMappingPageTables ();\r | |
105 | \r | |
106 | //\r | |
107 | // End of PEI phase signal\r | |
108 | //\r | |
109 | Status = PeiServicesInstallPpi (&gEndOfPeiSignalPpi);\r | |
110 | ASSERT_EFI_ERROR (Status);\r | |
111 | \r | |
112 | AsmWriteCr3 (PageTables);\r | |
113 | \r | |
114 | //\r | |
115 | // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r | |
116 | //\r | |
117 | UpdateStackHob (BaseOfStack, STACK_SIZE);\r | |
118 | \r | |
119 | SizeOfTemplate = AsmGetVectorTemplatInfo (&TemplateBase);\r | |
120 | \r | |
121 | Status = PeiServicesAllocatePages (\r | |
122 | EfiBootServicesData,\r | |
123 | EFI_SIZE_TO_PAGES((SizeOfTemplate + sizeof (X64_IDT_GATE_DESCRIPTOR)) * IDT_ENTRY_COUNT),\r | |
124 | &VectorAddress\r | |
125 | );\r | |
126 | ASSERT_EFI_ERROR (Status);\r | |
127 | \r | |
128 | IdtTable = (X64_IDT_GATE_DESCRIPTOR *) (UINTN) (VectorAddress + SizeOfTemplate * IDT_ENTRY_COUNT);\r | |
129 | for (Index = 0; Index < IDT_ENTRY_COUNT; Index++) {\r | |
130 | IdtTable[Index].Ia32IdtEntry.Bits.GateType = 0x8e;\r | |
131 | IdtTable[Index].Ia32IdtEntry.Bits.Reserved_0 = 0;\r | |
132 | IdtTable[Index].Ia32IdtEntry.Bits.Selector = SYS_CODE64_SEL;\r | |
133 | \r | |
134 | IdtTable[Index].Ia32IdtEntry.Bits.OffsetLow = (UINT16) VectorAddress;\r | |
135 | IdtTable[Index].Ia32IdtEntry.Bits.OffsetHigh = (UINT16) (RShiftU64 (VectorAddress, 16));\r | |
136 | IdtTable[Index].Offset32To63 = (UINT32) (RShiftU64 (VectorAddress, 32));\r | |
137 | IdtTable[Index].Reserved = 0;\r | |
138 | \r | |
139 | CopyMem ((VOID *) (UINTN) VectorAddress, TemplateBase, SizeOfTemplate);\r | |
140 | AsmVectorFixup ((VOID *) (UINTN) VectorAddress, (UINT8) Index);\r | |
141 | \r | |
142 | VectorAddress += SizeOfTemplate;\r | |
143 | }\r | |
144 | \r | |
145 | gLidtDescriptor.Base = (UINTN) IdtTable;\r | |
146 | \r | |
147 | //\r | |
148 | // Disable interrupt of Debug timer, since new IDT table cannot handle it.\r | |
149 | //\r | |
150 | SaveAndSetDebugTimerInterrupt (FALSE);\r | |
151 | \r | |
152 | AsmWriteIdtr (&gLidtDescriptor);\r | |
153 | \r | |
154 | //\r | |
155 | // Go to Long Mode and transfer control to DxeCore.\r | |
156 | // Interrupts will not get turned on until the CPU AP is loaded.\r | |
157 | // Call x64 drivers passing in single argument, a pointer to the HOBs.\r | |
158 | //\r | |
159 | AsmEnablePaging64 (\r | |
160 | SYS_CODE64_SEL,\r | |
161 | DxeCoreEntryPoint,\r | |
162 | (EFI_PHYSICAL_ADDRESS)(UINTN)(HobList.Raw),\r | |
163 | 0,\r | |
164 | TopOfStack\r | |
165 | );\r | |
166 | } else {\r | |
167 | //\r | |
168 | // Compute the top of the stack we were allocated. Pre-allocate a UINTN\r | |
169 | // for safety.\r | |
170 | //\r | |
171 | TopOfStack = BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT;\r | |
172 | TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);\r | |
173 | \r | |
174 | //\r | |
175 | // End of PEI phase signal\r | |
176 | //\r | |
177 | Status = PeiServicesInstallPpi (&gEndOfPeiSignalPpi);\r | |
178 | ASSERT_EFI_ERROR (Status);\r | |
179 | \r | |
180 | //\r | |
181 | // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r | |
182 | //\r | |
183 | UpdateStackHob (BaseOfStack, STACK_SIZE);\r | |
184 | \r | |
185 | //\r | |
186 | // Transfer the control to the entry point of DxeCore.\r | |
187 | //\r | |
188 | SwitchStack (\r | |
189 | (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,\r | |
190 | HobList.Raw,\r | |
191 | NULL,\r | |
192 | (VOID *) (UINTN) TopOfStack\r | |
193 | );\r | |
194 | }\r | |
195 | }\r | |
196 | \r |