]>
Commit | Line | Data |
---|---|---|
1 | /** @file\r | |
2 | 16550 UART Serial Port library functions\r | |
3 | \r | |
4 | Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r | |
5 | This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #include <Base.h>\r | |
16 | #include <Library/SerialPortLib.h>\r | |
17 | #include <Library/PcdLib.h>\r | |
18 | #include <Library/IoLib.h>\r | |
19 | #include <Library/PlatformHookLib.h>\r | |
20 | \r | |
21 | //\r | |
22 | // 16550 UART register offsets and bitfields\r | |
23 | //\r | |
24 | #define R_UART_RXBUF 0\r | |
25 | #define R_UART_TXBUF 0\r | |
26 | #define R_UART_BAUD_LOW 0\r | |
27 | #define R_UART_BAUD_HIGH 1\r | |
28 | #define R_UART_FCR 2\r | |
29 | #define B_UART_FCR_FIFOE BIT0\r | |
30 | #define B_UART_FCR_FIFO64 BIT5\r | |
31 | #define R_UART_LCR 3\r | |
32 | #define B_UART_LCR_DLAB BIT7\r | |
33 | #define R_UART_MCR 4\r | |
34 | #define B_UART_MCR_RTS BIT1\r | |
35 | #define R_UART_LSR 5\r | |
36 | #define B_UART_LSR_RXRDY BIT0\r | |
37 | #define B_UART_LSR_TXRDY BIT5\r | |
38 | #define B_UART_LSR_TEMT BIT6\r | |
39 | #define R_UART_MSR 6\r | |
40 | #define B_UART_MSR_CTS BIT4\r | |
41 | #define B_UART_MSR_DSR BIT5\r | |
42 | \r | |
43 | /**\r | |
44 | Read an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is read from \r | |
45 | MMIO space. If PcdSerialUseMmio is FALSE, then the value is read from I/O space. The\r | |
46 | parameter Offset is added to the base address of the 16550 registers that is specified \r | |
47 | by PcdSerialRegisterBase. \r | |
48 | \r | |
49 | @param Offset The offset of the 16550 register to read.\r | |
50 | \r | |
51 | @return The value read from the 16550 register.\r | |
52 | \r | |
53 | **/\r | |
54 | UINT8\r | |
55 | SerialPortReadRegister (\r | |
56 | UINTN Offset\r | |
57 | )\r | |
58 | {\r | |
59 | if (PcdGetBool (PcdSerialUseMmio)) {\r | |
60 | return MmioRead8 ((UINTN)PcdGet64 (PcdSerialRegisterBase) + Offset);\r | |
61 | } else {\r | |
62 | return IoRead8 ((UINT16)PcdGet64 (PcdSerialRegisterBase) + Offset);\r | |
63 | }\r | |
64 | }\r | |
65 | \r | |
66 | /**\r | |
67 | Write an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is written to\r | |
68 | MMIO space. If PcdSerialUseMmio is FALSE, then the value is written to I/O space. The\r | |
69 | parameter Offset is added to the base address of the 16550 registers that is specified \r | |
70 | by PcdSerialRegisterBase. \r | |
71 | \r | |
72 | @param Offset The offset of the 16550 register to write.\r | |
73 | @param Value The value to write to the 16550 register specified by Offset.\r | |
74 | \r | |
75 | @return The value written to the 16550 register.\r | |
76 | \r | |
77 | **/\r | |
78 | UINT8\r | |
79 | SerialPortWriteRegister (\r | |
80 | UINTN Offset,\r | |
81 | UINT8 Value\r | |
82 | )\r | |
83 | {\r | |
84 | if (PcdGetBool (PcdSerialUseMmio)) {\r | |
85 | return MmioWrite8 ((UINTN)PcdGet64 (PcdSerialRegisterBase) + Offset, Value);\r | |
86 | } else {\r | |
87 | return IoWrite8 ((UINT16)PcdGet64 (PcdSerialRegisterBase) + Offset, Value);\r | |
88 | }\r | |
89 | }\r | |
90 | \r | |
91 | /**\r | |
92 | Return whether the hardware flow control signal allows writing.\r | |
93 | \r | |
94 | @retval TRUE The serial port is writable.\r | |
95 | @retval FALSE The serial port is not writable.\r | |
96 | **/\r | |
97 | BOOLEAN\r | |
98 | SerialPortWritable (\r | |
99 | VOID\r | |
100 | )\r | |
101 | {\r | |
102 | if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {\r | |
103 | if (PcdGetBool (PcdSerialDetectCable)) {\r | |
104 | //\r | |
105 | // Wait for both DSR and CTS to be set\r | |
106 | // DSR is set if a cable is connected.\r | |
107 | // CTS is set if it is ok to transmit data\r | |
108 | //\r | |
109 | // DSR CTS Description Action\r | |
110 | // === === ======================================== ========\r | |
111 | // 0 0 No cable connected. Wait\r | |
112 | // 0 1 No cable connected. Wait\r | |
113 | // 1 0 Cable connected, but not clear to send. Wait\r | |
114 | // 1 1 Cable connected, and clear to send. Transmit\r | |
115 | //\r | |
116 | return (BOOLEAN) ((SerialPortReadRegister (R_UART_MSR) & (B_UART_MSR_DSR | B_UART_MSR_CTS)) == (B_UART_MSR_DSR | B_UART_MSR_CTS));\r | |
117 | } else {\r | |
118 | //\r | |
119 | // Wait for both DSR and CTS to be set OR for DSR to be clear. \r | |
120 | // DSR is set if a cable is connected.\r | |
121 | // CTS is set if it is ok to transmit data\r | |
122 | //\r | |
123 | // DSR CTS Description Action\r | |
124 | // === === ======================================== ========\r | |
125 | // 0 0 No cable connected. Transmit\r | |
126 | // 0 1 No cable connected. Transmit\r | |
127 | // 1 0 Cable connected, but not clear to send. Wait\r | |
128 | // 1 1 Cable connected, and clar to send. Transmit\r | |
129 | //\r | |
130 | return (BOOLEAN) ((SerialPortReadRegister (R_UART_MSR) & (B_UART_MSR_DSR | B_UART_MSR_CTS)) != (B_UART_MSR_DSR));\r | |
131 | }\r | |
132 | }\r | |
133 | \r | |
134 | return TRUE;\r | |
135 | }\r | |
136 | \r | |
137 | /**\r | |
138 | Initialize the serial device hardware.\r | |
139 | \r | |
140 | If no initialization is required, then return RETURN_SUCCESS.\r | |
141 | If the serial device was successfully initialized, then return RETURN_SUCCESS.\r | |
142 | If the serial device could not be initialized, then return RETURN_DEVICE_ERROR.\r | |
143 | \r | |
144 | @retval RETURN_SUCCESS The serial device was initialized.\r | |
145 | @retval RETURN_DEVICE_ERROR The serial device could not be initialized.\r | |
146 | \r | |
147 | **/\r | |
148 | RETURN_STATUS\r | |
149 | EFIAPI\r | |
150 | SerialPortInitialize (\r | |
151 | VOID\r | |
152 | )\r | |
153 | {\r | |
154 | RETURN_STATUS Status;\r | |
155 | UINTN Divisor;\r | |
156 | BOOLEAN Initialized;\r | |
157 | \r | |
158 | //\r | |
159 | // Perform platform specific initialization required to enable use of the 16550 device\r | |
160 | // at the location specified by PcdSerialUseMmio and PcdSerialRegisterBase.\r | |
161 | //\r | |
162 | Status = PlatformHookSerialPortInitialize ();\r | |
163 | if (RETURN_ERROR (Status)) {\r | |
164 | return Status;\r | |
165 | }\r | |
166 | \r | |
167 | //\r | |
168 | // See if the serial port is already initialized\r | |
169 | //\r | |
170 | Initialized = TRUE;\r | |
171 | if ((SerialPortReadRegister (R_UART_FCR) & (B_UART_FCR_FIFOE | B_UART_FCR_FIFO64)) !=\r | |
172 | (PcdGet8 (PcdSerialFifoControl) & (B_UART_FCR_FIFOE | B_UART_FCR_FIFO64)) ) {\r | |
173 | Initialized = FALSE;\r | |
174 | }\r | |
175 | if ((SerialPortReadRegister (R_UART_LCR) & 0x3F) != (PcdGet8 (PcdSerialLineControl) & 0x3F)) {\r | |
176 | Initialized = FALSE;\r | |
177 | }\r | |
178 | SerialPortWriteRegister (R_UART_LCR, (UINT8)(SerialPortReadRegister (R_UART_LCR) | B_UART_LCR_DLAB));\r | |
179 | Divisor = SerialPortReadRegister (R_UART_BAUD_HIGH) << 8;\r | |
180 | Divisor |= (UINTN)SerialPortReadRegister (R_UART_BAUD_LOW);\r | |
181 | SerialPortWriteRegister (R_UART_LCR, (UINT8)(SerialPortReadRegister (R_UART_LCR) & ~B_UART_LCR_DLAB));\r | |
182 | if (Divisor != 115200 / PcdGet32 (PcdSerialBaudRate)) {\r | |
183 | Initialized = FALSE;\r | |
184 | }\r | |
185 | if (Initialized) {\r | |
186 | return RETURN_SUCCESS;\r | |
187 | }\r | |
188 | \r | |
189 | //\r | |
190 | // Configure baud rate\r | |
191 | //\r | |
192 | Divisor = 115200 / PcdGet32 (PcdSerialBaudRate);\r | |
193 | SerialPortWriteRegister (R_UART_LCR, B_UART_LCR_DLAB);\r | |
194 | SerialPortWriteRegister (R_UART_BAUD_HIGH, (UINT8) (Divisor >> 8));\r | |
195 | SerialPortWriteRegister (R_UART_BAUD_LOW, (UINT8) (Divisor & 0xff));\r | |
196 | \r | |
197 | //\r | |
198 | // Clear DLAB and configure Data Bits, Parity, and Stop Bits.\r | |
199 | // Strip reserved bits from PcdSerialLineControl\r | |
200 | //\r | |
201 | SerialPortWriteRegister (R_UART_LCR, (UINT8)(PcdGet8 (PcdSerialLineControl) & 0x3F));\r | |
202 | \r | |
203 | //\r | |
204 | // Enable and reset FIFOs\r | |
205 | // Strip reserved bits from PcdSerialFifoControl\r | |
206 | //\r | |
207 | SerialPortWriteRegister (R_UART_FCR, (UINT8)(PcdGet8 (PcdSerialFifoControl) & 0x27));\r | |
208 | \r | |
209 | //\r | |
210 | // Put Modem Control Register(MCR) into its reset state of 0x00.\r | |
211 | // \r | |
212 | SerialPortWriteRegister (R_UART_MCR, 0x00);\r | |
213 | \r | |
214 | return RETURN_SUCCESS;\r | |
215 | }\r | |
216 | \r | |
217 | /**\r | |
218 | Write data from buffer to serial device. \r | |
219 | \r | |
220 | Writes NumberOfBytes data bytes from Buffer to the serial device. \r | |
221 | The number of bytes actually written to the serial device is returned.\r | |
222 | If the return value is less than NumberOfBytes, then the write operation failed.\r | |
223 | \r | |
224 | If Buffer is NULL, then ASSERT(). \r | |
225 | \r | |
226 | If NumberOfBytes is zero, then return 0.\r | |
227 | \r | |
228 | @param Buffer Pointer to the data buffer to be written.\r | |
229 | @param NumberOfBytes Number of bytes to written to the serial device.\r | |
230 | \r | |
231 | @retval 0 NumberOfBytes is 0.\r | |
232 | @retval >0 The number of bytes written to the serial device. \r | |
233 | If this value is less than NumberOfBytes, then the read operation failed.\r | |
234 | \r | |
235 | **/\r | |
236 | UINTN\r | |
237 | EFIAPI\r | |
238 | SerialPortWrite (\r | |
239 | IN UINT8 *Buffer,\r | |
240 | IN UINTN NumberOfBytes\r | |
241 | )\r | |
242 | {\r | |
243 | UINTN Result;\r | |
244 | UINTN Index;\r | |
245 | UINTN FifoSize;\r | |
246 | \r | |
247 | if (Buffer == NULL) {\r | |
248 | return 0;\r | |
249 | }\r | |
250 | \r | |
251 | if (NumberOfBytes == 0) {\r | |
252 | //\r | |
253 | // Flush the hardware\r | |
254 | //\r | |
255 | \r | |
256 | //\r | |
257 | // Wait for both the transmit FIFO and shift register empty.\r | |
258 | //\r | |
259 | while ((SerialPortReadRegister (R_UART_LSR) & B_UART_LSR_TEMT) == 0);\r | |
260 | \r | |
261 | //\r | |
262 | // Wait for the hardware flow control signal\r | |
263 | //\r | |
264 | while (!SerialPortWritable ());\r | |
265 | return 0;\r | |
266 | }\r | |
267 | \r | |
268 | //\r | |
269 | // Compute the maximum size of the Tx FIFO\r | |
270 | //\r | |
271 | FifoSize = 1;\r | |
272 | if ((PcdGet8 (PcdSerialFifoControl) & B_UART_FCR_FIFOE) != 0) {\r | |
273 | if ((PcdGet8 (PcdSerialFifoControl) & B_UART_FCR_FIFO64) == 0) {\r | |
274 | FifoSize = 16;\r | |
275 | } else {\r | |
276 | FifoSize = 64;\r | |
277 | }\r | |
278 | }\r | |
279 | \r | |
280 | Result = NumberOfBytes;\r | |
281 | while (NumberOfBytes != 0) {\r | |
282 | //\r | |
283 | // Wait for the serial port to be ready, to make sure both the transmit FIFO\r | |
284 | // and shift register empty.\r | |
285 | //\r | |
286 | while ((SerialPortReadRegister (R_UART_LSR) & B_UART_LSR_TEMT) == 0);\r | |
287 | \r | |
288 | //\r | |
289 | // Fill then entire Tx FIFO\r | |
290 | //\r | |
291 | for (Index = 0; Index < FifoSize && NumberOfBytes != 0; Index++, NumberOfBytes--, Buffer++) {\r | |
292 | //\r | |
293 | // Wait for the hardware flow control signal\r | |
294 | //\r | |
295 | while (!SerialPortWritable ());\r | |
296 | \r | |
297 | //\r | |
298 | // Write byte to the transmit buffer.\r | |
299 | //\r | |
300 | SerialPortWriteRegister (R_UART_TXBUF, *Buffer);\r | |
301 | }\r | |
302 | }\r | |
303 | return Result;\r | |
304 | }\r | |
305 | \r | |
306 | /**\r | |
307 | Reads data from a serial device into a buffer.\r | |
308 | \r | |
309 | @param Buffer Pointer to the data buffer to store the data read from the serial device.\r | |
310 | @param NumberOfBytes Number of bytes to read from the serial device.\r | |
311 | \r | |
312 | @retval 0 NumberOfBytes is 0.\r | |
313 | @retval >0 The number of bytes read from the serial device. \r | |
314 | If this value is less than NumberOfBytes, then the read operation failed.\r | |
315 | \r | |
316 | **/\r | |
317 | UINTN\r | |
318 | EFIAPI\r | |
319 | SerialPortRead (\r | |
320 | OUT UINT8 *Buffer,\r | |
321 | IN UINTN NumberOfBytes\r | |
322 | )\r | |
323 | {\r | |
324 | UINTN Result;\r | |
325 | UINT8 Mcr;\r | |
326 | \r | |
327 | if (NULL == Buffer) {\r | |
328 | return 0;\r | |
329 | }\r | |
330 | \r | |
331 | Mcr = (UINT8)(SerialPortReadRegister (R_UART_MCR) & ~B_UART_MCR_RTS);\r | |
332 | \r | |
333 | for (Result = 0; NumberOfBytes-- != 0; Result++, Buffer++) {\r | |
334 | //\r | |
335 | // Wait for the serial port to have some data.\r | |
336 | //\r | |
337 | while ((SerialPortReadRegister (R_UART_LSR) & B_UART_LSR_RXRDY) == 0) {\r | |
338 | if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {\r | |
339 | //\r | |
340 | // Set RTS to let the peer send some data\r | |
341 | //\r | |
342 | SerialPortWriteRegister (R_UART_MCR, (UINT8)(Mcr | B_UART_MCR_RTS));\r | |
343 | }\r | |
344 | }\r | |
345 | if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {\r | |
346 | //\r | |
347 | // Clear RTS to prevent peer from sending data\r | |
348 | //\r | |
349 | SerialPortWriteRegister (R_UART_MCR, Mcr);\r | |
350 | }\r | |
351 | \r | |
352 | //\r | |
353 | // Read byte from the receive buffer.\r | |
354 | //\r | |
355 | *Buffer = SerialPortReadRegister (R_UART_RXBUF);\r | |
356 | }\r | |
357 | \r | |
358 | return Result;\r | |
359 | }\r | |
360 | \r | |
361 | /**\r | |
362 | Polls a serial device to see if there is any data waiting to be read.\r | |
363 | \r | |
364 | Polls aserial device to see if there is any data waiting to be read.\r | |
365 | If there is data waiting to be read from the serial device, then TRUE is returned.\r | |
366 | If there is no data waiting to be read from the serial device, then FALSE is returned.\r | |
367 | \r | |
368 | @retval TRUE Data is waiting to be read from the serial device.\r | |
369 | @retval FALSE There is no data waiting to be read from the serial device.\r | |
370 | \r | |
371 | **/\r | |
372 | BOOLEAN\r | |
373 | EFIAPI\r | |
374 | SerialPortPoll (\r | |
375 | VOID\r | |
376 | )\r | |
377 | {\r | |
378 | //\r | |
379 | // Read the serial port status\r | |
380 | //\r | |
381 | if ((SerialPortReadRegister (R_UART_LSR) & B_UART_LSR_RXRDY) != 0) {\r | |
382 | if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {\r | |
383 | //\r | |
384 | // Clear RTS to prevent peer from sending data\r | |
385 | //\r | |
386 | SerialPortWriteRegister (R_UART_MCR, (UINT8)(SerialPortReadRegister (R_UART_MCR) & ~B_UART_MCR_RTS));\r | |
387 | }\r | |
388 | return TRUE;\r | |
389 | } \r | |
390 | \r | |
391 | if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {\r | |
392 | //\r | |
393 | // Set RTS to let the peer send some data\r | |
394 | //\r | |
395 | SerialPortWriteRegister (R_UART_MCR, (UINT8)(SerialPortReadRegister (R_UART_MCR) | B_UART_MCR_RTS));\r | |
396 | }\r | |
397 | \r | |
398 | return FALSE;\r | |
399 | }\r |