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1 | /** @file\r | |
2 | Support for the PCI Express 3.0 standard.\r | |
3 | \r | |
4 | This header file may not define all structures. Please extend as required.\r | |
5 | \r | |
6 | Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r | |
7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
8 | \r | |
9 | **/\r | |
10 | \r | |
11 | #ifndef _PCIEXPRESS30_H_\r | |
12 | #define _PCIEXPRESS30_H_\r | |
13 | \r | |
14 | #include <IndustryStandard/PciExpress21.h>\r | |
15 | \r | |
16 | #pragma pack(1)\r | |
17 | \r | |
18 | #define PCI_EXPRESS_EXTENDED_CAPABILITY_SECONDARY_PCIE_ID 0x0019\r | |
19 | #define PCI_EXPRESS_EXTENDED_CAPABILITY_SECONDARY_PCIE_VER1 0x1\r | |
20 | \r | |
21 | typedef union {\r | |
22 | struct {\r | |
23 | UINT32 PerformEqualization : 1;\r | |
24 | UINT32 LinkEqualizationRequestInterruptEnable : 1;\r | |
25 | UINT32 Reserved : 30;\r | |
26 | } Bits;\r | |
27 | UINT32 Uint32;\r | |
28 | } PCI_EXPRESS_REG_LINK_CONTROL3;\r | |
29 | \r | |
30 | typedef union {\r | |
31 | struct {\r | |
32 | UINT16 DownstreamPortTransmitterPreset : 4;\r | |
33 | UINT16 DownstreamPortReceiverPresetHint : 3;\r | |
34 | UINT16 Reserved : 1;\r | |
35 | UINT16 UpstreamPortTransmitterPreset : 4;\r | |
36 | UINT16 UpstreamPortReceiverPresetHint : 3;\r | |
37 | UINT16 Reserved2 : 1;\r | |
38 | } Bits;\r | |
39 | UINT16 Uint16;\r | |
40 | } PCI_EXPRESS_REG_LANE_EQUALIZATION_CONTROL;\r | |
41 | \r | |
42 | typedef struct {\r | |
43 | PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;\r | |
44 | PCI_EXPRESS_REG_LINK_CONTROL3 LinkControl3;\r | |
45 | UINT32 LaneErrorStatus;\r | |
46 | PCI_EXPRESS_REG_LANE_EQUALIZATION_CONTROL EqualizationControl[2];\r | |
47 | } PCI_EXPRESS_EXTENDED_CAPABILITIES_SECONDARY_PCIE;\r | |
48 | \r | |
49 | #pragma pack()\r | |
50 | \r | |
51 | #endif\r |