]> git.proxmox.com Git - mirror_edk2.git/blame_incremental - MdePkg/Include/IndustryStandard/SmBios.h
projects / mirror_edk2.git / blame_incremental
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (non-incremental) | history | HEAD
Remove some unrecognized unicode characters.
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / SmBios.h
... / ...
CommitLineData
1/** @file\r
2 Industry Standard Definitions of SMBIOS Table Specification v2.6\r
3\r
4 Copyright (c) 2006 - 2009, Intel Corporation All rights\r
5 reserved. This program and the accompanying materials are\r
6 licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at \r
8 http://opensource.org/licenses/bsd-license.php \r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
12\r
13**/\r
14\r
15#ifndef __SMBIOS_STANDARD_H__\r
16#define __SMBIOS_STANDARD_H__\r
17\r
18///\r
19/// Smbios Table Entry Point Structure\r
20///\r
21#pragma pack(1)\r
22typedef struct {\r
23 UINT8 AnchorString[4];\r
24 UINT8 EntryPointStructureChecksum;\r
25 UINT8 EntryPointLength;\r
26 UINT8 MajorVersion;\r
27 UINT8 MinorVersion;\r
28 UINT16 MaxStructureSize;\r
29 UINT8 EntryPointRevision;\r
30 UINT8 FormattedArea[5];\r
31 UINT8 IntermediateAnchorString[5];\r
32 UINT8 IntermediateChecksum;\r
33 UINT16 TableLength;\r
34 UINT32 TableAddress;\r
35 UINT16 NumberOfSmbiosStructures;\r
36 UINT8 SmbiosBcdRevision;\r
37} SMBIOS_TABLE_ENTRY_POINT;\r
38\r
39///\r
40/// The Smbios structure header\r
41///\r
42typedef struct {\r
43 UINT8 Type;\r
44 UINT8 Length;\r
45 UINT16 Handle;\r
46} SMBIOS_STRUCTURE;\r
47\r
48///\r
49/// String Number for a Null terminated string, 00h stands for no string available.\r
50///\r
51typedef UINT8 SMBIOS_TABLE_STRING;\r
52\r
53///\r
54/// BIOS Characteristics \r
55/// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc. \r
56///\r
57typedef struct {\r
58 UINT32 Reserved :2; //Bits 0-1\r
59 UINT32 Unknown :1; \r
60 UINT32 BiosCharacteristicsNotSupported :1; \r
61 UINT32 IsaIsSupported :1; \r
62 UINT32 McaIsSupported :1;\r
63 UINT32 EisaIsSupported :1;\r
64 UINT32 PciIsSupported :1;\r
65 UINT32 PcmciaIsSupported :1;\r
66 UINT32 PlugAndPlayIsSupported :1;\r
67 UINT32 ApmIsSupported :1;\r
68 UINT32 BiosIsUpgradable :1;\r
69 UINT32 BiosShadowingAllowed :1;\r
70 UINT32 VlVesaIsSupported :1;\r
71 UINT32 EscdSupportIsAvailable :1;\r
72 UINT32 BootFromCdIsSupported :1;\r
73 UINT32 SelectableBootIsSupported :1;\r
74 UINT32 RomBiosIsSocketed :1;\r
75 UINT32 BootFromPcmciaIsSupported :1;\r
76 UINT32 EDDSpecificationIsSupported :1;\r
77 UINT32 JapaneseNecFloppyIsSupported :1;\r
78 UINT32 JapaneseToshibaFloppyIsSupported :1;\r
79 UINT32 Floppy525_360IsSupported :1;\r
80 UINT32 Floppy525_12IsSupported :1;\r
81 UINT32 Floppy35_720IsSupported :1;\r
82 UINT32 Floppy35_288IsSupported :1;\r
83 UINT32 PrintScreenIsSupported :1;\r
84 UINT32 Keyboard8042IsSupported :1;\r
85 UINT32 SerialIsSupported :1;\r
86 UINT32 PrinterIsSupported :1;\r
87 UINT32 CgaMonoIsSupported :1;\r
88 UINT32 NecPc98 :1;\r
89 UINT32 ReservedForVendor :32; // Bits 32-63. Bits 32-47 reserved for BIOS vendor \r
90 // and bits 48-63 reserved for System Vendor. \r
91} MISC_BIOS_CHARACTERISTICS;\r
92\r
93///\r
94/// BIOS Characteristics Extension Byte 1 \r
95/// This information, available for SMBIOS version 2.1 and later, appears at offset 12h \r
96/// within the BIOS Information structure.\r
97///\r
98typedef struct {\r
99 UINT8 AcpiIsSupported :1;\r
100 UINT8 UsbLegacyIsSupported :1; \r
101 UINT8 AgpIsSupported :1; \r
102 UINT8 I20BootIsSupported :1;\r
103 UINT8 Ls120BootIsSupported :1;\r
104 UINT8 AtapiZipDriveBootIsSupported :1;\r
105 UINT8 Boot1394IsSupported :1;\r
106 UINT8 SmartBatteryIsSupported :1;\r
107} MBCE_BIOS_RESERVED;\r
108\r
109///\r
110/// BIOS Characteristics Extension Byte 2\r
111/// This information, available for SMBIOS version 2.3 and later, appears at offset 13h \r
112/// within the BIOS Information structure.\r
113///\r
114typedef struct {\r
115 UINT8 BiosBootSpecIsSupported :1;\r
116 UINT8 FunctionKeyNetworkBootIsSupported :1; \r
117 UINT8 TargetContentDistributionEnabled :1; \r
118 UINT8 ExtensionByte2Reserved :1; //Bits 3-7\r
119} MBCE_SYSTEM_RESERVED;\r
120\r
121///\r
122/// BIOS Characteristics Extension Bytes\r
123///\r
124typedef struct {\r
125 MBCE_BIOS_RESERVED BiosReserved;\r
126 MBCE_SYSTEM_RESERVED SystemReserved;\r
127 UINT8 Reserved;\r
128} MISC_BIOS_CHARACTERISTICS_EXTENSION;\r
129\r
130///\r
131/// BIOS Information (Type 0)\r
132///\r
133typedef struct {\r
134 SMBIOS_STRUCTURE Hdr;\r
135 SMBIOS_TABLE_STRING Vendor;\r
136 SMBIOS_TABLE_STRING BiosVersion;\r
137 UINT16 BiosSegment;\r
138 SMBIOS_TABLE_STRING BiosReleaseDate;\r
139 UINT8 BiosSize;\r
140 MISC_BIOS_CHARACTERISTICS BiosCharacteristics;\r
141 UINT8 BIOSCharacteristicsExtensionBytes[2];\r
142 UINT8 SystemBiosMajorRelease;\r
143 UINT8 SystemBiosMinorRelease;\r
144 UINT8 EmbeddedControllerFirmwareMajorRelease;\r
145 UINT8 EmbeddedControllerFirmwareMinorRelease;\r
146} SMBIOS_TABLE_TYPE0;\r
147\r
148///\r
149/// System Wake-up Type \r
150///\r
151typedef enum { \r
152 SystemWakeupTypeReserved = 0x00,\r
153 SystemWakeupTypeOther = 0x01,\r
154 SystemWakeupTypeUnknown = 0x02,\r
155 SystemWakeupTypeApmTimer = 0x03,\r
156 SystemWakeupTypeModemRing = 0x04,\r
157 SystemWakeupTypeLanRemote = 0x05,\r
158 SystemWakeupTypePowerSwitch = 0x06,\r
159 SystemWakeupTypePciPme = 0x07,\r
160 SystemWakeupTypeAcPowerRestored = 0x08\r
161} MISC_SYSTEM_WAKEUP_TYPE;\r
162\r
163///\r
164/// System Information (Type 1)\r
165/// \r
166/// The information in this structure defines attributes of the overall system and is \r
167/// intended to be associated with the Component ID group of the system's MIF.\r
168/// An SMBIOS implementation is associated with a single system instance and contains \r
169/// one and only one System Information (Type 1) structure.\r
170///\r
171typedef struct {\r
172 SMBIOS_STRUCTURE Hdr;\r
173 SMBIOS_TABLE_STRING Manufacturer;\r
174 SMBIOS_TABLE_STRING ProductName;\r
175 SMBIOS_TABLE_STRING Version;\r
176 SMBIOS_TABLE_STRING SerialNumber;\r
177 GUID Uuid;\r
178 MISC_SYSTEM_WAKEUP_TYPE WakeUpType;\r
179 SMBIOS_TABLE_STRING SKUNumber;\r
180 SMBIOS_TABLE_STRING Family;\r
181} SMBIOS_TABLE_TYPE1;\r
182\r
183///\r
184/// Base Board - Feature Flags \r
185///\r
186typedef struct {\r
187 UINT8 Motherboard :1;\r
188 UINT8 RequiresDaughterCard :1;\r
189 UINT8 Removable :1;\r
190 UINT8 Replaceable :1;\r
191 UINT8 HotSwappable :1;\r
192 UINT8 Reserved :3;\r
193} BASE_BOARD_FEATURE_FLAGS;\r
194\r
195///\r
196/// Base Board - Board Type\r
197///\r
198typedef enum { \r
199 BaseBoardTypeUnknown = 0x1,\r
200 BaseBoardTypeOther = 0x2,\r
201 BaseBoardTypeServerBlade = 0x3,\r
202 BaseBoardTypeConnectivitySwitch = 0x4,\r
203 BaseBoardTypeSystemManagementModule = 0x5,\r
204 BaseBoardTypeProcessorModule = 0x6,\r
205 BaseBoardTypeIOModule = 0x7,\r
206 BaseBoardTypeMemoryModule = 0x8,\r
207 BaseBoardTypeDaughterBoard = 0x9,\r
208 BaseBoardTypeMotherBoard = 0xA,\r
209 BaseBoardTypeProcessorMemoryModule = 0xB,\r
210 BaseBoardTypeProcessorIOModule = 0xC,\r
211 BaseBoardTypeInterconnectBoard = 0xD\r
212} BASE_BOARD_TYPE;\r
213\r
214///\r
215/// Base Board (or Module) Information (Type 2)\r
216///\r
217/// The information in this structure defines attributes of a system baseboard - \r
218/// for example a motherboard, planar, or server blade or other standard system module.\r
219///\r
220typedef struct {\r
221 SMBIOS_STRUCTURE Hdr;\r
222 SMBIOS_TABLE_STRING Manufacturer;\r
223 SMBIOS_TABLE_STRING ProductName;\r
224 SMBIOS_TABLE_STRING Version;\r
225 SMBIOS_TABLE_STRING SerialNumber;\r
226 SMBIOS_TABLE_STRING AssetTag;\r
227 BASE_BOARD_FEATURE_FLAGS FeatureFlag;\r
228 SMBIOS_TABLE_STRING LocationInChassis;\r
229 UINT16 ChassisHandle;\r
230 BASE_BOARD_TYPE BoardType;\r
231 UINT8 NumberOfContainedObjectHandles;\r
232 UINT16 ContainedObjectHandles[1];\r
233} SMBIOS_TABLE_TYPE2;\r
234\r
235///\r
236/// System Enclosure or Chassis Types\r
237///\r
238typedef enum { \r
239 MiscChassisTypeOther = 0x01,\r
240 MiscChassisTypeUnknown = 0x02,\r
241 MiscChassisTypeDeskTop = 0x03,\r
242 MiscChassisTypeLowProfileDesktop = 0x04,\r
243 MiscChassisTypePizzaBox = 0x05,\r
244 MiscChassisTypeMiniTower = 0x06,\r
245 MiscChassisTypeTower = 0x07,\r
246 MiscChassisTypePortable = 0x08,\r
247 MiscChassisTypeLapTop = 0x09,\r
248 MiscChassisTypeNotebook = 0x0A,\r
249 MiscChassisTypeHandHeld = 0x0B,\r
250 MiscChassisTypeDockingStation = 0x0C,\r
251 MiscChassisTypeAllInOne = 0x0D,\r
252 MiscChassisTypeSubNotebook = 0x0E,\r
253 MiscChassisTypeSpaceSaving = 0x0F,\r
254 MiscChassisTypeLunchBox = 0x10,\r
255 MiscChassisTypeMainServerChassis = 0x11,\r
256 MiscChassisTypeExpansionChassis = 0x12,\r
257 MiscChassisTypeSubChassis = 0x13,\r
258 MiscChassisTypeBusExpansionChassis = 0x14,\r
259 MiscChassisTypePeripheralChassis = 0x15,\r
260 MiscChassisTypeRaidChassis = 0x16,\r
261 MiscChassisTypeRackMountChassis = 0x17,\r
262 MiscChassisTypeSealedCasePc = 0x18,\r
263 MiscChassisMultiSystemChassis = 0x19,\r
264 MiscChassisCompactPCI = 0x1A,\r
265 MiscChassisAdvancedTCA = 0x1B,\r
266 MiscChassisBlade = 0x1C,\r
267 MiscChassisBladeEnclosure = 0x1D\r
268} MISC_CHASSIS_TYPE;\r
269\r
270///\r
271/// System Enclosure or Chassis States \r
272///\r
273typedef enum { \r
274 ChassisStateOther = 0x01,\r
275 ChassisStateUnknown = 0x02,\r
276 ChassisStateSafe = 0x03,\r
277 ChassisStateWarning = 0x04,\r
278 ChassisStateCritical = 0x05,\r
279 ChassisStateNonRecoverable = 0x06\r
280} MISC_CHASSIS_STATE;\r
281\r
282///\r
283/// System Enclosure or Chassis Security Status \r
284///\r
285typedef enum { \r
286 ChassisSecurityStatusOther = 0x01,\r
287 ChassisSecurityStatusUnknown = 0x02,\r
288 ChassisSecurityStatusNone = 0x03,\r
289 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,\r
290 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05\r
291} MISC_CHASSIS_SECURITY_STATE;\r
292\r
293///\r
294/// Contained Element record\r
295///\r
296typedef struct {\r
297 UINT8 ContainedElementType;\r
298 UINT8 ContainedElementMinimum;\r
299 UINT8 ContainedElementMaximum;\r
300} CONTAINED_ELEMENT;\r
301\r
302\r
303///\r
304/// System Enclosure or Chassis (Type 3)\r
305///\r
306/// The information in this structure defines attributes of the system's mechanical enclosure(s). \r
307/// For example, if a system included a separate enclosure for its peripheral devices, \r
308/// two structures would be returned: one for the main, system enclosure and the second for\r
309/// the peripheral device enclosure. The additions to this structure in v2.1 of this specification\r
310/// support the population of the CIM_Chassis class. \r
311///\r
312typedef struct {\r
313 SMBIOS_STRUCTURE Hdr;\r
314 SMBIOS_TABLE_STRING Manufacturer;\r
315 UINT8 Type;\r
316 SMBIOS_TABLE_STRING Version;\r
317 SMBIOS_TABLE_STRING SerialNumber;\r
318 SMBIOS_TABLE_STRING AssetTag;\r
319 MISC_CHASSIS_STATE BootupState;\r
320 MISC_CHASSIS_STATE PowerSupplyState;\r
321 MISC_CHASSIS_STATE ThermalState;\r
322 MISC_CHASSIS_SECURITY_STATE SecurityStatus;\r
323 UINT8 OemDefined[4];\r
324 UINT8 Height;\r
325 UINT8 NumberofPowerCords;\r
326 UINT8 ContainedElementCount;\r
327 UINT8 ContainedElementRecordLength;\r
328 CONTAINED_ELEMENT ContainedElements[1];\r
329} SMBIOS_TABLE_TYPE3;\r
330\r
331///\r
332/// Processor Information - Processor Type\r
333///\r
334typedef enum {\r
335 ProcessorOther = 0x01,\r
336 ProcessorUnknown = 0x02,\r
337 CentralProcessor = 0x03,\r
338 MathProcessor = 0x04,\r
339 DspProcessor = 0x05,\r
340 VideoProcessor = 0x06\r
341} PROCESSOR_TYPE_DATA;\r
342\r
343///\r
344/// Processor Information - Processor Family\r
345///\r
346typedef enum {\r
347 ProcessorFamilyOther = 0x01, \r
348 ProcessorFamilyUnknown = 0x02,\r
349 ProcessorFamily8086 = 0x03, \r
350 ProcessorFamily80286 = 0x04,\r
351 ProcessorFamilyIntel386 = 0x05, \r
352 ProcessorFamilyIntel486 = 0x06,\r
353 ProcessorFamily8087 = 0x07,\r
354 ProcessorFamily80287 = 0x08,\r
355 ProcessorFamily80387 = 0x09, \r
356 ProcessorFamily80487 = 0x0A,\r
357 ProcessorFamilyPentium = 0x0B, \r
358 ProcessorFamilyPentiumPro = 0x0C,\r
359 ProcessorFamilyPentiumII = 0x0D,\r
360 ProcessorFamilyPentiumMMX = 0x0E,\r
361 ProcessorFamilyCeleron = 0x0F,\r
362 ProcessorFamilyPentiumIIXeon = 0x10,\r
363 ProcessorFamilyPentiumIII = 0x11, \r
364 ProcessorFamilyM1 = 0x12,\r
365 ProcessorFamilyM2 = 0x13,\r
366 ProcessorFamilyM1Reserved2 = 0x14,\r
367 ProcessorFamilyM1Reserved3 = 0x15,\r
368 ProcessorFamilyM1Reserved4 = 0x16,\r
369 ProcessorFamilyM1Reserved5 = 0x17,\r
370 ProcessorFamilyAmdDuron = 0x18,\r
371 ProcessorFamilyK5 = 0x19, \r
372 ProcessorFamilyK6 = 0x1A,\r
373 ProcessorFamilyK6_2 = 0x1B,\r
374 ProcessorFamilyK6_3 = 0x1C,\r
375 ProcessorFamilyAmdAthlon = 0x1D,\r
376 ProcessorFamilyAmd29000 = 0x1E,\r
377 ProcessorFamilyK6_2Plus = 0x1F,\r
378 ProcessorFamilyPowerPC = 0x20,\r
379 ProcessorFamilyPowerPC601 = 0x21,\r
380 ProcessorFamilyPowerPC603 = 0x22,\r
381 ProcessorFamilyPowerPC603Plus = 0x23,\r
382 ProcessorFamilyPowerPC604 = 0x24,\r
383 ProcessorFamilyPowerPC620 = 0x25,\r
384 ProcessorFamilyPowerPCx704 = 0x26,\r
385 ProcessorFamilyPowerPC750 = 0x27,\r
386 ProcessorFamilyAlpha3 = 0x30,\r
387 ProcessorFamilyAlpha21064 = 0x31,\r
388 ProcessorFamilyAlpha21066 = 0x32,\r
389 ProcessorFamilyAlpha21164 = 0x33,\r
390 ProcessorFamilyAlpha21164PC = 0x34,\r
391 ProcessorFamilyAlpha21164a = 0x35,\r
392 ProcessorFamilyAlpha21264 = 0x36,\r
393 ProcessorFamilyAlpha21364 = 0x37,\r
394 ProcessorFamilyMips = 0x40,\r
395 ProcessorFamilyMIPSR4000 = 0x41,\r
396 ProcessorFamilyMIPSR4200 = 0x42,\r
397 ProcessorFamilyMIPSR4400 = 0x43,\r
398 ProcessorFamilyMIPSR4600 = 0x44,\r
399 ProcessorFamilyMIPSR10000 = 0x45,\r
400 ProcessorFamilySparc = 0x50,\r
401 ProcessorFamilySuperSparc = 0x51,\r
402 ProcessorFamilymicroSparcII = 0x52,\r
403 ProcessorFamilymicroSparcIIep = 0x53,\r
404 ProcessorFamilyUltraSparc = 0x54,\r
405 ProcessorFamilyUltraSparcII = 0x55,\r
406 ProcessorFamilyUltraSparcIIi = 0x56,\r
407 ProcessorFamilyUltraSparcIII = 0x57,\r
408 ProcessorFamilyUltraSparcIIIi = 0x58,\r
409 ProcessorFamily68040 = 0x60,\r
410 ProcessorFamily68xxx = 0x61,\r
411 ProcessorFamily68000 = 0x62,\r
412 ProcessorFamily68010 = 0x63,\r
413 ProcessorFamily68020 = 0x64,\r
414 ProcessorFamily68030 = 0x65,\r
415 ProcessorFamilyHobbit = 0x70,\r
416 ProcessorFamilyCrusoeTM5000 = 0x78,\r
417 ProcessorFamilyCrusoeTM3000 = 0x79,\r
418 ProcessorFamilyEfficeonTM8000 = 0x7A,\r
419 ProcessorFamilyWeitek = 0x80,\r
420 ProcessorFamilyItanium = 0x82,\r
421 ProcessorFamilyAmdAthlon64 = 0x83,\r
422 ProcessorFamilyAmdOpteron = 0x84,\r
423 ProcessorFamilyAmdSempron = 0x85,\r
424 ProcessorFamilyAmdTurion64Mobile = 0x86,\r
425 ProcessorFamilyDualCoreAmdOpteron = 0x87,\r
426 ProcessorFamilyAmdAthlon64X2DualCore = 0x88,\r
427 ProcessorFamilyAmdTurion64X2Mobile = 0x89,\r
428 ProcessorFamilyPARISC = 0x90,\r
429 ProcessorFamilyPaRisc8500 = 0x91,\r
430 ProcessorFamilyPaRisc8000 = 0x92,\r
431 ProcessorFamilyPaRisc7300LC = 0x93,\r
432 ProcessorFamilyPaRisc7200 = 0x94,\r
433 ProcessorFamilyPaRisc7100LC = 0x95,\r
434 ProcessorFamilyPaRisc7100 = 0x96,\r
435 ProcessorFamilyV30 = 0xA0,\r
436 ProcessorFamilyPentiumIIIXeon = 0xB0,\r
437 ProcessorFamilyPentiumIIISpeedStep = 0xB1,\r
438 ProcessorFamilyPentium4 = 0xB2,\r
439 ProcessorFamilyIntelXeon = 0xB3,\r
440 ProcessorFamilyAS400 = 0xB4,\r
441 ProcessorFamilyIntelXeonMP = 0xB5,\r
442 ProcessorFamilyAMDAthlonXP = 0xB6,\r
443 ProcessorFamilyAMDAthlonMP = 0xB7,\r
444 ProcessorFamilyIntelItanium2 = 0xB8,\r
445 ProcessorFamilyIntelPentiumM = 0xB9,\r
446 ProcessorFamilyIntelCeleronD = 0xBA,\r
447 ProcessorFamilyIntelPentiumD = 0xBB,\r
448 ProcessorFamilyIntelPentiumEx = 0xBC,\r
449 ProcessorFamilyIntelCoreSolo = 0xBD, // SMBIOS spec 2.6 correct this value\r
450 ProcessorFamilyReserved = 0xBE,\r
451 ProcessorFamilyIntelCore2 = 0xBF,\r
452 ProcessorFamilyIBM390 = 0xC8,\r
453 ProcessorFamilyG4 = 0xC9,\r
454 ProcessorFamilyG5 = 0xCA,\r
455 ProcessorFamilyG6 = 0xCB,\r
456 ProcessorFamilyzArchitectur = 0xCC,\r
457 ProcessorFamilyViaC7M = 0xD2,\r
458 ProcessorFamilyViaC7D = 0xD3,\r
459 ProcessorFamilyViaC7 = 0xD4,\r
460 ProcessorFamilyViaEden = 0xD5,\r
461 ProcessorFamilyi860 = 0xFA,\r
462 ProcessorFamilyi960 = 0xFB,\r
463 ProcessorFamilyIndicatorFamily2 = 0xFE,\r
464 ProcessorFamilyReserved1 = 0xFF\r
465} PROCESSOR_FAMILY_DATA;\r
466\r
467///\r
468/// Processor Information - Voltage \r
469///\r
470typedef struct {\r
471 UINT8 ProcessorVoltageCapability5V :1; // Bit 0\r
472 UINT8 ProcessorVoltageCapability3_3V :1; // Bit 1\r
473 UINT8 ProcessorVoltageCapability2_9V :1; // Bit 2\r
474 UINT8 ProcessorVoltageCapabilityReserved :1; // Bit 3 ,must be zero.\r
475 UINT8 ProcessorVoltageReserved :3; // Bits 4-6, must be zero.\r
476 UINT8 ProcessorVoltageIndicateLegacy :1; // Bit 7.\r
477} PROCESSOR_VOLTAGE;\r
478\r
479///\r
480/// Processor Information - Processor Upgrade \r
481///\r
482typedef enum {\r
483 ProcessorUpgradeOther = 0x01,\r
484 ProcessorUpgradeUnknown = 0x02,\r
485 ProcessorUpgradeDaughterBoard = 0x03,\r
486 ProcessorUpgradeZIFSocket = 0x04,\r
487 ProcessorUpgradePiggyBack = 0x05, // Replaceable\r
488 ProcessorUpgradeNone = 0x06,\r
489 ProcessorUpgradeLIFSocket = 0x07,\r
490 ProcessorUpgradeSlot1 = 0x08,\r
491 ProcessorUpgradeSlot2 = 0x09,\r
492 ProcessorUpgrade370PinSocket = 0x0A,\r
493 ProcessorUpgradeSlotA = 0x0B,\r
494 ProcessorUpgradeSlotM = 0x0C,\r
495 ProcessorUpgradeSocket423 = 0x0D,\r
496 ProcessorUpgradeSocketA = 0x0E, // Socket 462\r
497 ProcessorUpgradeSocket478 = 0x0F,\r
498 ProcessorUpgradeSocket754 = 0x10,\r
499 ProcessorUpgradeSocket940 = 0x11,\r
500 ProcessorUpgradeSocket939 = 0x12,\r
501 ProcessorUpgradeSocketmPGA604 = 0x13,\r
502 ProcessorUpgradeSocketLGA771 = 0x14,\r
503 ProcessorUpgradeSocketLGA775 = 0x15,\r
504 ProcessorUpgradeSocketS1 = 0x16,\r
505 ProcessorUpgradeAM2 = 0x17,\r
506 ProcessorUpgradeF1207 = 0x18\r
507} PROCESSOR_UPGRADE;\r
508\r
509///\r
510/// Processor ID Field Description\r
511///\r
512typedef struct {\r
513 UINT32 ProcessorSteppingId:4;\r
514 UINT32 ProcessorModel: 4;\r
515 UINT32 ProcessorFamily: 4;\r
516 UINT32 ProcessorType: 2;\r
517 UINT32 ProcessorReserved1: 2;\r
518 UINT32 ProcessorXModel: 4;\r
519 UINT32 ProcessorXFamily: 8;\r
520 UINT32 ProcessorReserved2: 4;\r
521} PROCESSOR_SIGNATURE;\r
522\r
523typedef struct {\r
524 UINT32 ProcessorBrandIndex :8;\r
525 UINT32 ProcessorClflush :8;\r
526 UINT32 ProcessorReserved :8;\r
527 UINT32 ProcessorDfltApicId :8;\r
528} PROCESSOR_MISC_INFO;\r
529\r
530typedef struct {\r
531 UINT32 ProcessorFpu :1;\r
532 UINT32 ProcessorVme :1;\r
533 UINT32 ProcessorDe :1;\r
534 UINT32 ProcessorPse :1;\r
535 UINT32 ProcessorTsc :1;\r
536 UINT32 ProcessorMsr :1;\r
537 UINT32 ProcessorPae :1;\r
538 UINT32 ProcessorMce :1;\r
539 UINT32 ProcessorCx8 :1;\r
540 UINT32 ProcessorApic :1;\r
541 UINT32 ProcessorReserved1 :1;\r
542 UINT32 ProcessorSep :1;\r
543 UINT32 ProcessorMtrr :1;\r
544 UINT32 ProcessorPge :1;\r
545 UINT32 ProcessorMca :1;\r
546 UINT32 ProcessorCmov :1;\r
547 UINT32 ProcessorPat :1;\r
548 UINT32 ProcessorPse36 :1;\r
549 UINT32 ProcessorPsn :1;\r
550 UINT32 ProcessorClfsh :1;\r
551 UINT32 ProcessorReserved2 :1;\r
552 UINT32 ProcessorDs :1;\r
553 UINT32 ProcessorAcpi :1;\r
554 UINT32 ProcessorMmx :1;\r
555 UINT32 ProcessorFxsr :1;\r
556 UINT32 ProcessorSse :1;\r
557 UINT32 ProcessorSse2 :1;\r
558 UINT32 ProcessorSs :1;\r
559 UINT32 ProcessorReserved3 :1;\r
560 UINT32 ProcessorTm :1;\r
561 UINT32 ProcessorReserved4 :2;\r
562} PROCESSOR_FEATURE_FLAGS;\r
563\r
564typedef struct {\r
565 PROCESSOR_SIGNATURE Signature;\r
566 PROCESSOR_MISC_INFO MiscInfo;\r
567 UINT32 Reserved;\r
568 PROCESSOR_FEATURE_FLAGS FeatureFlags;\r
569} PROCESSOR_ID_DATA; // 4*4 bytes \r
570\r
571///\r
572/// Processor Information (Type 4)\r
573///\r
574/// The information in this structure defines the attributes of a single processor; \r
575/// a separate structure instance is provided for each system processor socket/slot. \r
576/// For example, a system with an IntelDX2 processor would have a single \r
577/// structure instance while a system with an IntelSX2 processor would have a structure\r
578/// to describe the main CPU and a second structure to describe the 80487 co-processor. \r
579///\r
580typedef struct { \r
581 SMBIOS_STRUCTURE Hdr;\r
582 UINT8 Socket;\r
583 PROCESSOR_TYPE_DATA ProcessorType;\r
584 PROCESSOR_FAMILY_DATA ProcessorFamily;\r
585 SMBIOS_TABLE_STRING ProcessorManufacture;\r
586 PROCESSOR_ID_DATA ProcessorId;\r
587 SMBIOS_TABLE_STRING ProcessorVersion;\r
588 PROCESSOR_VOLTAGE Voltage;\r
589 UINT16 ExternalClock;\r
590 UINT16 MaxSpeed;\r
591 UINT16 CurrentSpeed;\r
592 UINT8 Status;\r
593 PROCESSOR_UPGRADE ProcessorUpgrade;\r
594 UINT16 L1CacheHandle;\r
595 UINT16 L2CacheHandle;\r
596 UINT16 L3CacheHandle;\r
597 SMBIOS_TABLE_STRING SerialNumber;\r
598 SMBIOS_TABLE_STRING AssetTag;\r
599 SMBIOS_TABLE_STRING PartNumber;\r
600 //\r
601 // Add for smbios 2.5\r
602 //\r
603 UINT8 CoreCount;\r
604 UINT8 EnabledCoreCount;\r
605 UINT8 ThreadCount;\r
606 UINT16 ProcessorCharacteristics;\r
607 //\r
608 // Add for smbios 2.6\r
609 //\r
610 UINT16 ProcessorFamily2;\r
611} SMBIOS_TABLE_TYPE4;\r
612\r
613///\r
614/// Memory Controller Error Detecting Method \r
615///\r
616typedef enum { \r
617 ErrorDetectingMethodOther = 0x01,\r
618 ErrorDetectingMethodUnknown = 0x02,\r
619 ErrorDetectingMethodNone = 0x03,\r
620 ErrorDetectingMethodParity = 0x04,\r
621 ErrorDetectingMethod32Ecc = 0x05,\r
622 ErrorDetectingMethod64Ecc = 0x06,\r
623 ErrorDetectingMethod128Ecc = 0x07,\r
624 ErrorDetectingMethodCrc = 0x08\r
625} MEMORY_ERROR_DETECT_METHOD;\r
626\r
627///\r
628/// Memory Controller Error Correcting Capability\r
629///\r
630typedef struct {\r
631 UINT8 Other :1;\r
632 UINT8 Unknown :1;\r
633 UINT8 None :1;\r
634 UINT8 SingleBitErrorCorrect :1;\r
635 UINT8 DoubleBitErrorCorrect :1;\r
636 UINT8 ErrorScrubbing :1;\r
637 UINT8 Reserved :2;\r
638} MEMORY_ERROR_CORRECT_CAPABILITY;\r
639\r
640///\r
641/// Memory Controller Information - Interleave Support\r
642///\r
643typedef enum { \r
644 MemoryInterleaveOther = 0x01,\r
645 MemoryInterleaveUnknown = 0x02,\r
646 MemoryInterleaveOneWay = 0x03,\r
647 MemoryInterleaveTwoWay = 0x04,\r
648 MemoryInterleaveFourWay = 0x05,\r
649 MemoryInterleaveEightWay = 0x06,\r
650 MemoryInterleaveSixteenWay = 0x07\r
651} MEMORY_SUPPORT_INTERLEAVE_TYPE;\r
652\r
653///\r
654/// Memory Controller Information - Memory Speeds\r
655///\r
656typedef struct {\r
657 UINT16 Other :1;\r
658 UINT16 Unknown :1;\r
659 UINT16 SeventyNs:1;\r
660 UINT16 SixtyNs :1;\r
661 UINT16 FiftyNs :1;\r
662 UINT16 Reserved :11;\r
663} MEMORY_SPEED_TYPE;\r
664\r
665///\r
666/// Memory Controller Information (Type 5, Obsolete)\r
667///\r
668/// The information in this structure defines the attributes of the system's memory controller(s) \r
669/// and the supported attributes of any memory-modules present in the sockets controlled by \r
670/// this controller. \r
671/// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete), \r
672/// are obsolete starting with version 2.1 of this specification; the Physical Memory Array (Type 16)\r
673/// and Memory Device (Type 17) structures should be used instead. BIOS providers might\r
674/// choose to implement both memory description types to allow existing DMI browsers\r
675/// to properly display the system's memory attributes.\r
676///\r
677typedef struct {\r
678 SMBIOS_STRUCTURE Hdr;\r
679 MEMORY_ERROR_DETECT_METHOD ErrDetectMethod;\r
680 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;\r
681 MEMORY_SUPPORT_INTERLEAVE_TYPE SupportInterleave;\r
682 UINT8 CurrentInterleave;\r
683 UINT8 MaxMemoryModuleSize;\r
684 MEMORY_SPEED_TYPE SupportSpeed;\r
685 UINT16 SupportMemoryType;\r
686 UINT8 MemoryModuleVoltage;\r
687 UINT8 AssociatedMemorySlotNum;\r
688 UINT16 MemoryModuleConfigHandles[1];\r
689} SMBIOS_TABLE_TYPE5;\r
690\r
691///\r
692/// Memory Module Information - Memory Types\r
693///\r
694typedef struct {\r
695 UINT16 Other :1;\r
696 UINT16 Unknown :1;\r
697 UINT16 Standard :1;\r
698 UINT16 FastPageMode:1;\r
699 UINT16 EDO :1;\r
700 UINT16 Parity :1;\r
701 UINT16 ECC :1;\r
702 UINT16 SIMM :1;\r
703 UINT16 DIMM :1;\r
704 UINT16 BurstEdo :1;\r
705 UINT16 SDRAM :1;\r
706 UINT16 Reserved :5;\r
707} MEMORY_CURRENT_TYPE;\r
708\r
709///\r
710/// Memory Module Information - Memory Size\r
711///\r
712typedef struct {\r
713 UINT8 InstalledOrEnabledSize :7;// Size (n), where 2**n is the size in MB.\r
714 UINT8 SingleOrDoubleBank :1;\r
715} MEMORY_INSTALLED_ENABLED_SIZE;\r
716\r
717///\r
718/// Memory Module Information (Type 6, Obsolete)\r
719///\r
720/// One Memory Module Information structure is included for each memory-module socket \r
721/// in the system. The structure describes the speed, type, size, and error status\r
722/// of each system memory module. The supported attributes of each module are described \r
723/// by the "owning" Memory Controller Information structure. \r
724/// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete), \r
725/// are obsolete starting with version 2.1 of this specification; the Physical Memory Array (Type 16)\r
726/// and Memory Device (Type 17) structures should be used instead.\r
727///\r
728typedef struct {\r
729 SMBIOS_STRUCTURE Hdr;\r
730 SMBIOS_TABLE_STRING SocketDesignation;\r
731 UINT8 BankConnections;\r
732 UINT8 CurrentSpeed;\r
733 MEMORY_CURRENT_TYPE CurrentMemoryType;\r
734 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;\r
735 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;\r
736 UINT8 ErrorStatus;\r
737} SMBIOS_TABLE_TYPE6;\r
738\r
739///\r
740/// Cache Information - SRAM Type\r
741///\r
742typedef struct {\r
743 UINT16 Other :1;\r
744 UINT16 Unknown :1;\r
745 UINT16 NonBurst :1;\r
746 UINT16 Burst :1;\r
747 UINT16 PipelineBurst :1;\r
748 UINT16 Asynchronous :1;\r
749 UINT16 Synchronous :1;\r
750 UINT16 Reserved :9;\r
751} CACHE_SRAM_TYPE_DATA;\r
752\r
753///\r
754/// Cache Information - Error Correction Type \r
755///\r
756typedef enum {\r
757 CacheErrorOther = 0x01,\r
758 CacheErrorUnknown = 0x02,\r
759 CacheErrorNone = 0x03,\r
760 CacheErrorParity = 0x04,\r
761 CacheErrorSingleBit = 0x05, // ECC\r
762 CacheErrorMultiBit = 0x06 // ECC\r
763} CACHE_ERROR_TYPE_DATA;\r
764\r
765///\r
766/// Cache Information - System Cache Type \r
767///\r
768typedef enum {\r
769 CacheTypeOther = 0x01,\r
770 CacheTypeUnknown = 0x02,\r
771 CacheTypeInstruction = 0x03,\r
772 CacheTypeData = 0x04,\r
773 CacheTypeUnified = 0x05\r
774} CACHE_TYPE_DATA;\r
775\r
776///\r
777/// Cache Information - Associativity \r
778///\r
779typedef enum {\r
780 CacheAssociativityOther = 0x01,\r
781 CacheAssociativityUnknown = 0x02,\r
782 CacheAssociativityDirectMapped = 0x03,\r
783 CacheAssociativity2Way = 0x04,\r
784 CacheAssociativity4Way = 0x05,\r
785 CacheAssociativityFully = 0x06,\r
786 CacheAssociativity8Way = 0x07,\r
787 CacheAssociativity16Way = 0x08,\r
788 CacheAssociativity24Way = 0x09\r
789} CACHE_ASSOCIATIVITY_DATA;\r
790\r
791///\r
792/// Cache Information (Type 7)\r
793///\r
794/// he information in this structure defines the attributes of CPU cache device in the system. \r
795/// One structure is specified for each such device, whether the device is internal to\r
796/// or external to the CPU module. Cache modules can be associated with a processor structure\r
797/// in one or two ways depending on the SMBIOS version.\r
798///\r
799typedef struct {\r
800 SMBIOS_STRUCTURE Hdr;\r
801 SMBIOS_TABLE_STRING SocketDesignation;\r
802 UINT16 CacheConfiguration;\r
803 UINT16 MaximumCacheSize;\r
804 UINT16 InstalledSize;\r
805 CACHE_SRAM_TYPE_DATA SupportedSRAMType;\r
806 CACHE_SRAM_TYPE_DATA CurrentSRAMType;\r
807 UINT8 CacheSpeed;\r
808 CACHE_ERROR_TYPE_DATA ErrorCorrectionType;\r
809 CACHE_TYPE_DATA SystemCacheType;\r
810 CACHE_ASSOCIATIVITY_DATA Associativity;\r
811} SMBIOS_TABLE_TYPE7;\r
812\r
813///\r
814/// Port Connector Information - Connector Types \r
815///\r
816typedef enum {\r
817 PortConnectorTypeNone = 0x00,\r
818 PortConnectorTypeCentronics = 0x01,\r
819 PortConnectorTypeMiniCentronics = 0x02,\r
820 PortConnectorTypeProprietary = 0x03,\r
821 PortConnectorTypeDB25Male = 0x04,\r
822 PortConnectorTypeDB25Female = 0x05,\r
823 PortConnectorTypeDB15Male = 0x06,\r
824 PortConnectorTypeDB15Female = 0x07,\r
825 PortConnectorTypeDB9Male = 0x08,\r
826 PortConnectorTypeDB9Female = 0x09,\r
827 PortConnectorTypeRJ11 = 0x0A,\r
828 PortConnectorTypeRJ45 = 0x0B,\r
829 PortConnectorType50PinMiniScsi = 0x0C,\r
830 PortConnectorTypeMiniDin = 0x0D,\r
831 PortConnectorTypeMicriDin = 0x0E,\r
832 PortConnectorTypePS2 = 0x0F,\r
833 PortConnectorTypeInfrared = 0x10,\r
834 PortConnectorTypeHpHil = 0x11,\r
835 PortConnectorTypeUsb = 0x12,\r
836 PortConnectorTypeSsaScsi = 0x13,\r
837 PortConnectorTypeCircularDin8Male = 0x14,\r
838 PortConnectorTypeCircularDin8Female = 0x15,\r
839 PortConnectorTypeOnboardIde = 0x16,\r
840 PortConnectorTypeOnboardFloppy = 0x17,\r
841 PortConnectorType9PinDualInline = 0x18,\r
842 PortConnectorType25PinDualInline = 0x19,\r
843 PortConnectorType50PinDualInline = 0x1A,\r
844 PortConnectorType68PinDualInline = 0x1B,\r
845 PortConnectorTypeOnboardSoundInput = 0x1C,\r
846 PortConnectorTypeMiniCentronicsType14 = 0x1D,\r
847 PortConnectorTypeMiniCentronicsType26 = 0x1E,\r
848 PortConnectorTypeHeadPhoneMiniJack = 0x1F,\r
849 PortConnectorTypeBNC = 0x20,\r
850 PortConnectorType1394 = 0x21,\r
851 PortConnectorTypePC98 = 0xA0,\r
852 PortConnectorTypePC98Hireso = 0xA1,\r
853 PortConnectorTypePCH98 = 0xA2,\r
854 PortConnectorTypePC98Note = 0xA3,\r
855 PortConnectorTypePC98Full = 0xA4,\r
856 PortConnectorTypeOther = 0xFF\r
857} MISC_PORT_CONNECTOR_TYPE;\r
858\r
859///\r
860/// Port Connector Information - Port Types \r
861///\r
862typedef enum {\r
863 PortTypeNone = 0x00,\r
864 PortTypeParallelXtAtCompatible = 0x01,\r
865 PortTypeParallelPortPs2 = 0x02,\r
866 PortTypeParallelPortEcp = 0x03,\r
867 PortTypeParallelPortEpp = 0x04,\r
868 PortTypeParallelPortEcpEpp = 0x05,\r
869 PortTypeSerialXtAtCompatible = 0x06,\r
870 PortTypeSerial16450Compatible = 0x07,\r
871 PortTypeSerial16550Compatible = 0x08,\r
872 PortTypeSerial16550ACompatible = 0x09,\r
873 PortTypeScsi = 0x0A,\r
874 PortTypeMidi = 0x0B,\r
875 PortTypeJoyStick = 0x0C,\r
876 PortTypeKeyboard = 0x0D,\r
877 PortTypeMouse = 0x0E,\r
878 PortTypeSsaScsi = 0x0F,\r
879 PortTypeUsb = 0x10,\r
880 PortTypeFireWire = 0x11,\r
881 PortTypePcmciaTypeI = 0x12,\r
882 PortTypePcmciaTypeII = 0x13,\r
883 PortTypePcmciaTypeIII = 0x14,\r
884 PortTypeCardBus = 0x15,\r
885 PortTypeAccessBusPort = 0x16,\r
886 PortTypeScsiII = 0x17,\r
887 PortTypeScsiWide = 0x18,\r
888 PortTypePC98 = 0x19,\r
889 PortTypePC98Hireso = 0x1A,\r
890 PortTypePCH98 = 0x1B,\r
891 PortTypeVideoPort = 0x1C,\r
892 PortTypeAudioPort = 0x1D,\r
893 PortTypeModemPort = 0x1E,\r
894 PortTypeNetworkPort = 0x1F,\r
895 PortType8251Compatible = 0xA0,\r
896 PortType8251FifoCompatible = 0xA1,\r
897 PortTypeOther = 0xFF\r
898} MISC_PORT_TYPE;\r
899\r
900///\r
901/// Port Connector Information (Type 8)\r
902///\r
903/// The information in this structure defines the attributes of a system port connector, \r
904/// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information \r
905/// are provided. One structure is present for each port provided by the system.\r
906///\r
907typedef struct {\r
908 SMBIOS_STRUCTURE Hdr;\r
909 SMBIOS_TABLE_STRING InternalReferenceDesignator;\r
910 MISC_PORT_CONNECTOR_TYPE InternalConnectorType;\r
911 SMBIOS_TABLE_STRING ExternalReferenceDesignator;\r
912 MISC_PORT_CONNECTOR_TYPE ExternalConnectorType;\r
913 MISC_PORT_TYPE PortType;\r
914} SMBIOS_TABLE_TYPE8;\r
915\r
916///\r
917/// System Slots - Slot Type\r
918///\r
919typedef enum {\r
920 SlotTypeOther = 0x01,\r
921 SlotTypeUnknown = 0x02,\r
922 SlotTypeIsa = 0x03,\r
923 SlotTypeMca = 0x04,\r
924 SlotTypeEisa = 0x05,\r
925 SlotTypePci = 0x06,\r
926 SlotTypePcmcia = 0x07,\r
927 SlotTypeVlVesa = 0x08,\r
928 SlotTypeProprietary = 0x09,\r
929 SlotTypeProcessorCardSlot = 0x0A,\r
930 SlotTypeProprietaryMemoryCardSlot = 0x0B,\r
931 SlotTypeIORiserCardSlot = 0x0C,\r
932 SlotTypeNuBus = 0x0D,\r
933 SlotTypePci66MhzCapable = 0x0E,\r
934 SlotTypeAgp = 0x0F,\r
935 SlotTypeApg2X = 0x10,\r
936 SlotTypeAgp4X = 0x11,\r
937 SlotTypePciX = 0x12,\r
938 SlotTypeAgp4x = 0x13,\r
939 SlotTypePC98C20 = 0xA0,\r
940 SlotTypePC98C24 = 0xA1,\r
941 SlotTypePC98E = 0xA2,\r
942 SlotTypePC98LocalBus = 0xA3,\r
943 SlotTypePC98Card = 0xA4,\r
944 SlotTypePciExpress = 0xA5,\r
945 SlotTypePciExpressX1 = 0xA6,\r
946 SlotTypePciExpressX2 = 0xA7,\r
947 SlotTypePciExpressX4 = 0xA8,\r
948 SlotTypePciExpressX8 = 0xA9,\r
949 SlotTypePciExpressX16 = 0xAA\r
950} MISC_SLOT_TYPE;\r
951\r
952///\r
953/// System Slots - Slot Data Bus Width\r
954///\r
955typedef enum {\r
956 SlotDataBusWidthOther = 0x01,\r
957 SlotDataBusWidthUnknown = 0x02,\r
958 SlotDataBusWidth8Bit = 0x03,\r
959 SlotDataBusWidth16Bit = 0x04,\r
960 SlotDataBusWidth32Bit = 0x05,\r
961 SlotDataBusWidth64Bit = 0x06,\r
962 SlotDataBusWidth128Bit = 0x07,\r
963 SlotDataBusWidth1X = 0x08, // Or X1\r
964 SlotDataBusWidth2X = 0x09, // Or X2\r
965 SlotDataBusWidth4X = 0x0A, // Or X4\r
966 SlotDataBusWidth8X = 0x0B, // Or X8\r
967 SlotDataBusWidth12X = 0x0C, // Or X12\r
968 SlotDataBusWidth16X = 0x0D, // Or X16\r
969 SlotDataBusWidth32X = 0x0E // Or X32\r
970} MISC_SLOT_DATA_BUS_WIDTH;\r
971\r
972///\r
973/// System Slots - Current Usage\r
974///\r
975typedef enum {\r
976 SlotUsageOther = 0x01,\r
977 SlotUsageUnknown = 0x02,\r
978 SlotUsageAvailable = 0x03,\r
979 SlotUsageInUse = 0x04\r
980} MISC_SLOT_USAGE;\r
981\r
982///\r
983/// System Slots - Slot Length \r
984///\r
985typedef enum {\r
986 SlotLengthOther = 0x01,\r
987 SlotLengthUnknown = 0x02,\r
988 SlotLengthShort = 0x03,\r
989 SlotLengthLong = 0x04\r
990} MISC_SLOT_LENGTH;\r
991\r
992///\r
993/// System Slots - Slot Characteristics 1 \r
994///\r
995typedef struct {\r
996 UINT8 CharacteristicsUnknown :1;\r
997 UINT8 Provides50Volts :1;\r
998 UINT8 Provides33Volts :1;\r
999 UINT8 SharedSlot :1;\r
1000 UINT8 PcCard16Supported :1;\r
1001 UINT8 CardBusSupported :1;\r
1002 UINT8 ZoomVideoSupported :1;\r
1003 UINT8 ModemRingResumeSupported:1;\r
1004} MISC_SLOT_CHARACTERISTICS1;\r
1005///\r
1006/// System Slots - Slot Characteristics 2 \r
1007///\r
1008typedef struct {\r
1009 UINT8 PmeSignalSupported :1;\r
1010 UINT8 HotPlugDevicesSupported :1;\r
1011 UINT8 SmbusSignalSupported :1;\r
1012 UINT8 Reserved :5; //Set to 0.\r
1013} MISC_SLOT_CHARACTERISTICS2;\r
1014\r
1015///\r
1016/// System Slots (Type 9)\r
1017///\r
1018/// The information in this structure defines the attributes of a system slot. \r
1019/// One structure is provided for each slot in the system.\r
1020///\r
1021///\r
1022typedef struct {\r
1023 SMBIOS_STRUCTURE Hdr;\r
1024 SMBIOS_TABLE_STRING SlotDesignation;\r
1025 MISC_SLOT_TYPE SlotType;\r
1026 MISC_SLOT_DATA_BUS_WIDTH SlotDataBusWidth;\r
1027 MISC_SLOT_USAGE CurrentUsage;\r
1028 MISC_SLOT_LENGTH SlotLength;\r
1029 UINT16 SlotID;\r
1030 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;\r
1031 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;\r
1032 //\r
1033 // Add for smbios 2.6\r
1034 //\r
1035 UINT16 SegmentGroupNum;\r
1036 UINT8 BusNum;\r
1037 UINT8 DevFuncNum;\r
1038} SMBIOS_TABLE_TYPE9;\r
1039\r
1040///\r
1041/// On Board Devices Information - Device Types \r
1042///\r
1043typedef enum {\r
1044 OnBoardDeviceTypeOther = 0x01,\r
1045 OnBoardDeviceTypeUnknown = 0x02,\r
1046 OnBoardDeviceTypeVideo = 0x03,\r
1047 OnBoardDeviceTypeScsiController = 0x04,\r
1048 OnBoardDeviceTypeEthernet = 0x05,\r
1049 OnBoardDeviceTypeTokenRing = 0x06,\r
1050 OnBoardDeviceTypeSound = 0x07\r
1051} MISC_ONBOARD_DEVICE_TYPE;\r
1052\r
1053///\r
1054/// Device Item Entry\r
1055///\r
1056typedef struct {\r
1057 MISC_ONBOARD_DEVICE_TYPE DeviceType;\r
1058 SMBIOS_TABLE_STRING DescriptionString;\r
1059} DEVICE_STRUCT;\r
1060\r
1061///\r
1062/// On Board Devices Information (Type 10, obsolete)\r
1063///\r
1064/// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended \r
1065/// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both \r
1066/// types to allow existing SMBIOS browsers to properly display the system's onboard devices information. \r
1067/// The information in this structure defines the attributes of devices that are onboard (soldered onto) \r
1068/// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS\r
1069/// has some level of control over the enabling of the associated device for use by the system.\r
1070///\r
1071typedef struct {\r
1072 SMBIOS_STRUCTURE Hdr;\r
1073 DEVICE_STRUCT Device[1];\r
1074} SMBIOS_TABLE_TYPE10;\r
1075\r
1076///\r
1077/// OEM Strings (Type 11)\r
1078/// This structure contains free form strings defined by the OEM. Examples of this are: \r
1079/// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc. \r
1080///\r
1081typedef struct {\r
1082 SMBIOS_STRUCTURE Hdr;\r
1083 UINT8 StringCount;\r
1084} SMBIOS_TABLE_TYPE11;\r
1085\r
1086///\r
1087/// System Configuration Options (Type 12)\r
1088///\r
1089/// This structure contains information required to configure the base board's Jumpers and Switches. \r
1090///\r
1091typedef struct {\r
1092 SMBIOS_STRUCTURE Hdr;\r
1093 UINT8 StringCount;\r
1094} SMBIOS_TABLE_TYPE12;\r
1095\r
1096\r
1097///\r
1098/// BIOS Language Information (Type 13)\r
1099///\r
1100/// The information in this structure defines the installable language attributes of the BIOS. \r
1101/// \r
1102typedef struct {\r
1103 SMBIOS_STRUCTURE Hdr;\r
1104 UINT8 InstallableLanguages;\r
1105 UINT8 Flags;\r
1106 UINT8 Reserved[15];\r
1107 SMBIOS_TABLE_STRING CurrentLanguages;\r
1108} SMBIOS_TABLE_TYPE13;\r
1109\r
1110///\r
1111/// System Event Log - Event Log Types \r
1112/// \r
1113typedef enum {\r
1114 EventLogTypeReserved = 0x00,\r
1115 EventLogTypeSingleBitECC = 0x01,\r
1116 EventLogTypeMultiBitECC = 0x02,\r
1117 EventLogTypeParityMemErr = 0x03,\r
1118 EventLogTypeBusTimeOut = 0x04,\r
1119 EventLogTypeIOChannelCheck = 0x05,\r
1120 EventLogTypeSoftwareNMI = 0x06,\r
1121 EventLogTypePOSTMemResize = 0x07,\r
1122 EventLogTypePOSTErr = 0x08,\r
1123 EventLogTypePCIParityErr = 0x09,\r
1124 EventLogTypePCISystemErr = 0x0A,\r
1125 EventLogTypeCPUFailure = 0x0B,\r
1126 EventLogTypeEISATimeOut = 0x0C,\r
1127 EventLogTypeMemLogDisabled = 0x0D,\r
1128 EventLogTypeLoggingDisabled = 0x0E,\r
1129 EventLogTypeSysLimitExce = 0x10,\r
1130 EventLogTypeAsyncHWTimer = 0x11,\r
1131 EventLogTypeSysConfigInfo = 0x12,\r
1132 EventLogTypeHDInfo = 0x13,\r
1133 EventLogTypeSysReconfig = 0x14,\r
1134 EventLogTypeUncorrectCPUErr = 0x15,\r
1135 EventLogTypeAreaResetAndClr = 0x16,\r
1136 EventLogTypeSystemBoot = 0x17,\r
1137 EventLogTypeUnused = 0x18, // 0x18 - 0x7F\r
1138 EventLogTypeAvailForSys = 0x80, // 0x80 - 0xFE\r
1139 EventLogTypeEndOfLog = 0xFF\r
1140} EVENT_LOG_TYPE_DATA;\r
1141\r
1142///\r
1143/// System Event Log - Variable Data Format Types \r
1144/// \r
1145typedef enum {\r
1146 EventLogVariableNone = 0x00,\r
1147 EventLogVariableHandle = 0x01,\r
1148 EventLogVariableMutilEvent = 0x02,\r
1149 EventLogVariableMutilEventHandle = 0x03,\r
1150 EventLogVariablePOSTResultBitmap = 0x04,\r
1151 EventLogVariableSysManagementType = 0x05,\r
1152 EventLogVariableMutliEventSysManagmentType = 0x06, \r
1153 EventLogVariableUnused = 0x07,\r
1154 EventLogVariableOEMAssigned = 0x80\r
1155} EVENT_LOG_TYPE_DATA;\r
1156\r
1157///\r
1158/// Group Item Entry\r
1159///\r
1160typedef struct {\r
1161 UINT8 ItemType;\r
1162 UINT16 ItemHandle;\r
1163} GROUP_STRUCT;\r
1164\r
1165///\r
1166/// Event Log Type Descriptors\r
1167///\r
1168typedef struct {\r
1169 EVENT_LOG_TYPE_DATA LogType;\r
1170 UINT8 DataFormatType;\r
1171} EVENT_LOG_TYPE;\r
1172\r
1173///\r
1174/// Group Associations (Type 14)\r
1175///\r
1176/// The Group Associations structure is provided for OEMs who want to specify \r
1177/// the arrangement or hierarchy of certain components (including other Group Associations) \r
1178/// within the system. \r
1179///\r
1180typedef struct {\r
1181 SMBIOS_STRUCTURE Hdr;\r
1182 SMBIOS_TABLE_STRING GroupName;\r
1183 GROUP_STRUCT Group[1];\r
1184} SMBIOS_TABLE_TYPE14;\r
1185\r
1186///\r
1187/// System Event Log (Type 15)\r
1188///\r
1189/// The presence of this structure within the SMBIOS data returned for a system indicates \r
1190/// that the system supports an event log. An event log is a fixed-length area within a \r
1191/// non-volatile storage element, starting with a fixed-length (and vendor-specific) header \r
1192/// record, followed by one or more variable-length log records. \r
1193///\r
1194typedef struct {\r
1195 SMBIOS_STRUCTURE Hdr;\r
1196 UINT16 LogAreaLength;\r
1197 UINT16 LogHeaderStartOffset;\r
1198 UINT16 LogDataStartOffset;\r
1199 UINT8 AccessMethod;\r
1200 UINT8 LogStatus;\r
1201 UINT32 LogChangeToken;\r
1202 UINT32 AccessMethodAddress;\r
1203 UINT8 LogHeaderFormat;\r
1204 UINT8 NumberOfSupportedLogTypeDescriptors;\r
1205 UINT8 LengthOfLogTypeDescriptor;\r
1206 EVENT_LOG_TYPE EventLogTypeDescriptors[1];\r
1207} SMBIOS_TABLE_TYPE15;\r
1208\r
1209///\r
1210/// Physical Memory Array - Location\r
1211///\r
1212typedef enum {\r
1213 MemoryArrayLocationOther = 0x01,\r
1214 MemoryArrayLocationUnknown = 0x02,\r
1215 MemoryArrayLocationSystemBoard = 0x03,\r
1216 MemoryArrayLocationIsaAddonCard = 0x04,\r
1217 MemoryArrayLocationEisaAddonCard = 0x05,\r
1218 MemoryArrayLocationPciAddonCard = 0x06,\r
1219 MemoryArrayLocationMcaAddonCard = 0x07,\r
1220 MemoryArrayLocationPcmciaAddonCard = 0x08,\r
1221 MemoryArrayLocationProprietaryAddonCard = 0x09,\r
1222 MemoryArrayLocationNuBus = 0x0A,\r
1223 MemoryArrayLocationPc98C20AddonCard = 0xA0,\r
1224 MemoryArrayLocationPc98C24AddonCard = 0xA1,\r
1225 MemoryArrayLocationPc98EAddonCard = 0xA2,\r
1226 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3\r
1227} MEMORY_ARRAY_LOCATION;\r
1228\r
1229///\r
1230/// Physical Memory Array - Use\r
1231///\r
1232typedef enum {\r
1233 MemoryArrayUseOther = 0x01,\r
1234 MemoryArrayUseUnknown = 0x02,\r
1235 MemoryArrayUseSystemMemory = 0x03,\r
1236 MemoryArrayUseVideoMemory = 0x04,\r
1237 MemoryArrayUseFlashMemory = 0x05,\r
1238 MemoryArrayUseNonVolatileRam = 0x06,\r
1239 MemoryArrayUseCacheMemory = 0x07\r
1240} MEMORY_ARRAY_USE;\r
1241\r
1242///\r
1243/// Physical Memory Array - Error Correction Types \r
1244///\r
1245typedef enum {\r
1246 MemoryErrorCorrectionOther = 0x01,\r
1247 MemoryErrorCorrectionUnknown = 0x02,\r
1248 MemoryErrorCorrectionNone = 0x03,\r
1249 MemoryErrorCorrectionParity = 0x04,\r
1250 MemoryErrorCorrectionSingleBitEcc = 0x05,\r
1251 MemoryErrorCorrectionMultiBitEcc = 0x06,\r
1252 MemoryErrorCorrectionCrc = 0x07\r
1253} MEMORY_ERROR_CORRECTION;\r
1254\r
1255///\r
1256/// Physical Memory Array (Type 16)\r
1257///\r
1258/// This structure describes a collection of memory devices that operate \r
1259/// together to form a memory address space. \r
1260///\r
1261typedef struct {\r
1262 SMBIOS_STRUCTURE Hdr;\r
1263 MEMORY_ARRAY_LOCATION Location;\r
1264 MEMORY_ARRAY_USE Use;\r
1265 MEMORY_ERROR_CORRECTION MemoryErrorCorrection;\r
1266 UINT32 MaximumCapacity;\r
1267 UINT16 MemoryErrorInformationHandle;\r
1268 UINT16 NumberOfMemoryDevices;\r
1269} SMBIOS_TABLE_TYPE16;\r
1270\r
1271///\r
1272/// Memory Device - Form Factor\r
1273///\r
1274typedef enum {\r
1275 MemoryFormFactorOther = 0x01,\r
1276 MemoryFormFactorUnknown = 0x02,\r
1277 MemoryFormFactorSimm = 0x03,\r
1278 MemoryFormFactorSip = 0x04,\r
1279 MemoryFormFactorChip = 0x05,\r
1280 MemoryFormFactorDip = 0x06,\r
1281 MemoryFormFactorZip = 0x07,\r
1282 MemoryFormFactorProprietaryCard = 0x08,\r
1283 MemoryFormFactorDimm = 0x09,\r
1284 MemoryFormFactorTsop = 0x0A,\r
1285 MemoryFormFactorRowOfChips = 0x0B,\r
1286 MemoryFormFactorRimm = 0x0C,\r
1287 MemoryFormFactorSodimm = 0x0D,\r
1288 MemoryFormFactorSrimm = 0x0E,\r
1289 MemoryFormFactorFbDimm = 0x0F\r
1290} MEMORY_FORM_FACTOR;\r
1291\r
1292///\r
1293/// Memory Device - Type\r
1294///\r
1295typedef enum {\r
1296 MemoryTypeOther = 0x01,\r
1297 MemoryTypeUnknown = 0x02,\r
1298 MemoryTypeDram = 0x03,\r
1299 MemoryTypeEdram = 0x04,\r
1300 MemoryTypeVram = 0x05,\r
1301 MemoryTypeSram = 0x06,\r
1302 MemoryTypeRam = 0x07,\r
1303 MemoryTypeRom = 0x08,\r
1304 MemoryTypeFlash = 0x09,\r
1305 MemoryTypeEeprom = 0x0A,\r
1306 MemoryTypeFeprom = 0x0B,\r
1307 MemoryTypeEprom = 0x0C,\r
1308 MemoryTypeCdram = 0x0D,\r
1309 MemoryType3Dram = 0x0E,\r
1310 MemoryTypeSdram = 0x0F,\r
1311 MemoryTypeSgram = 0x10,\r
1312 MemoryTypeRdram = 0x11,\r
1313 MemoryTypeDdr = 0x12,\r
1314 MemoryTypeDdr2 = 0x13,\r
1315 MemoryTypeDdr2FbDimm = 0x14\r
1316} MEMORY_DEVICE_TYPE;\r
1317\r
1318typedef struct {\r
1319 UINT16 Reserved :1;\r
1320 UINT16 Other :1;\r
1321 UINT16 Unknown :1;\r
1322 UINT16 FastPaged :1;\r
1323 UINT16 StaticColumn :1;\r
1324 UINT16 PseudoStatic :1;\r
1325 UINT16 Rambus :1;\r
1326 UINT16 Synchronous :1;\r
1327 UINT16 Cmos :1;\r
1328 UINT16 Edo :1;\r
1329 UINT16 WindowDram :1;\r
1330 UINT16 CacheDram :1;\r
1331 UINT16 Nonvolatile :1;\r
1332 UINT16 Reserved1 :3;\r
1333} MEMORY_DEVICE_TYPE_DETAIL;\r
1334\r
1335///\r
1336/// Memory Device (Type 17)\r
1337///\r
1338/// This structure describes a single memory device that is part of \r
1339/// a larger Physical Memory Array (Type 16).\r
1340/// Note: If a system includes memory-device sockets, the SMBIOS implementation \r
1341/// includes a Memory Device structure instance for each slot whether or not the \r
1342/// socket is currently populated.\r
1343///\r
1344typedef struct {\r
1345 SMBIOS_STRUCTURE Hdr;\r
1346 UINT16 MemoryArrayHandle;\r
1347 UINT16 MemoryErrorInformationHandle;\r
1348 UINT16 TotalWidth;\r
1349 UINT16 DataWidth;\r
1350 UINT16 Size;\r
1351 MEMORY_FORM_FACTOR FormFactor;\r
1352 UINT8 DeviceSet;\r
1353 SMBIOS_TABLE_STRING DeviceLocator;\r
1354 SMBIOS_TABLE_STRING BankLocator;\r
1355 MEMORY_DEVICE_TYPE MemoryType;\r
1356 MEMORY_DEVICE_TYPE_DETAIL TypeDetail;\r
1357 UINT16 Speed;\r
1358 SMBIOS_TABLE_STRING Manufacturer;\r
1359 SMBIOS_TABLE_STRING SerialNumber;\r
1360 SMBIOS_TABLE_STRING AssetTag;\r
1361 SMBIOS_TABLE_STRING PartNumber;\r
1362 //\r
1363 // Add for smbios 2.6\r
1364 // \r
1365 UINT8 Attributes;\r
1366} SMBIOS_TABLE_TYPE17;\r
1367\r
1368///\r
1369/// 32-bit Memory Error Information - Error Type \r
1370///\r
1371typedef enum { \r
1372 MemoryErrorOther = 0x01,\r
1373 MemoryErrorUnknown = 0x02,\r
1374 MemoryErrorOk = 0x03,\r
1375 MemoryErrorBadRead = 0x04,\r
1376 MemoryErrorParity = 0x05,\r
1377 MemoryErrorSigleBit = 0x06,\r
1378 MemoryErrorDoubleBit = 0x07,\r
1379 MemoryErrorMultiBit = 0x08,\r
1380 MemoryErrorNibble = 0x09,\r
1381 MemoryErrorChecksum = 0x0A,\r
1382 MemoryErrorCrc = 0x0B,\r
1383 MemoryErrorCorrectSingleBit = 0x0C,\r
1384 MemoryErrorCorrected = 0x0D,\r
1385 MemoryErrorUnCorrectable = 0x0E\r
1386} MEMORY_ERROR_TYPE;\r
1387\r
1388///\r
1389/// 32-bit Memory Error Information - Error Granularity \r
1390///\r
1391typedef enum { \r
1392 MemoryGranularityOther = 0x01,\r
1393 MemoryGranularityOtherUnknown = 0x02,\r
1394 MemoryGranularityDeviceLevel = 0x03,\r
1395 MemoryGranularityMemPartitionLevel = 0x04\r
1396} MEMORY_ERROR_GRANULARITY;\r
1397\r
1398///\r
1399/// 32-bit Memory Error Information - Error Operation \r
1400///\r
1401typedef enum { \r
1402 MemoryErrorOperationOther = 0x01,\r
1403 MemoryErrorOperationUnknown = 0x02,\r
1404 MemoryErrorOperationRead = 0x03,\r
1405 MemoryErrorOperationWrite = 0x04,\r
1406 MemoryErrorOperationPartialWrite = 0x05\r
1407} MEMORY_ERROR_OPERATION;\r
1408\r
1409///\r
1410/// 32-bit Memory Error Information (Type 18)\r
1411/// \r
1412/// This structure identifies the specifics of an error that might be detected \r
1413/// within a Physical Memory Array.\r
1414///\r
1415typedef struct {\r
1416 SMBIOS_STRUCTURE Hdr;\r
1417 MEMORY_ERROR_TYPE ErrorType;\r
1418 MEMORY_ERROR_GRANULARITY ErrorGranularity;\r
1419 MEMORY_ERROR_OPERATION ErrorOperation;\r
1420 UINT32 VendorSyndrome;\r
1421 UINT32 MemoryArrayErrorAddress;\r
1422 UINT32 DeviceErrorAddress;\r
1423 UINT32 ErrorResolution;\r
1424} SMBIOS_TABLE_TYPE18;\r
1425\r
1426///\r
1427/// Memory Array Mapped Address (Type 19)\r
1428///\r
1429/// This structure provides the address mapping for a Physical Memory Array. \r
1430/// One structure is present for each contiguous address range described.\r
1431///\r
1432typedef struct {\r
1433 SMBIOS_STRUCTURE Hdr;\r
1434 UINT32 StartingAddress;\r
1435 UINT32 EndingAddress;\r
1436 UINT16 MemoryArrayHandle;\r
1437 UINT8 PartitionWidth;\r
1438} SMBIOS_TABLE_TYPE19;\r
1439\r
1440///\r
1441/// Memory Device Mapped Address (Type 20)\r
1442///\r
1443/// This structure maps memory address space usually to a device-level granularity. \r
1444/// One structure is present for each contiguous address range described. \r
1445///\r
1446typedef struct {\r
1447 SMBIOS_STRUCTURE Hdr;\r
1448 UINT32 StartingAddress;\r
1449 UINT32 EndingAddress;\r
1450 UINT16 MemoryDeviceHandle;\r
1451 UINT16 MemoryArrayMappedAddressHandle;\r
1452 UINT8 PartitionRowPosition;\r
1453 UINT8 InterleavePosition;\r
1454 UINT8 InterleavedDataDepth;\r
1455} SMBIOS_TABLE_TYPE20;\r
1456\r
1457///\r
1458/// Built-in Pointing Device - Type\r
1459///\r
1460typedef enum {\r
1461 PointingDeviceTypeOther = 0x01,\r
1462 PointingDeviceTypeUnknown = 0x02,\r
1463 PointingDeviceTypeMouse = 0x03,\r
1464 PointingDeviceTypeTrackBall = 0x04,\r
1465 PointingDeviceTypeTrackPoint = 0x05,\r
1466 PointingDeviceTypeGlidePoint = 0x06,\r
1467 PointingDeviceTouchPad = 0x07,\r
1468 PointingDeviceTouchScreen = 0x08,\r
1469 PointingDeviceOpticalSensor = 0x09\r
1470} BUILTIN_POINTING_DEVICE_TYPE;\r
1471\r
1472///\r
1473/// Built-in Pointing Device - Interface\r
1474///\r
1475typedef enum {\r
1476 PointingDeviceInterfaceOther = 0x01,\r
1477 PointingDeviceInterfaceUnknown = 0x02,\r
1478 PointingDeviceInterfaceSerial = 0x03,\r
1479 PointingDeviceInterfacePs2 = 0x04,\r
1480 PointingDeviceInterfaceInfrared = 0x05,\r
1481 PointingDeviceInterfaceHpHil = 0x06,\r
1482 PointingDeviceInterfaceBusMouse = 0x07,\r
1483 PointingDeviceInterfaceADB = 0x08,\r
1484 PointingDeviceInterfaceBusMouseDB9 = 0xA0,\r
1485 PointingDeviceInterfaceBusMouseMicroDin = 0xA1,\r
1486 PointingDeviceInterfaceUsb = 0xA2\r
1487} BUILTIN_POINTING_DEVICE_INTERFACE;\r
1488\r
1489///\r
1490/// Built-in Pointing Device (Type 21)\r
1491///\r
1492/// This structure describes the attributes of the built-in pointing device for the \r
1493/// system - the presence of this structure does not imply that the built-in\r
1494/// pointing device is active for the system's use! \r
1495///\r
1496typedef struct {\r
1497 SMBIOS_STRUCTURE Hdr;\r
1498 BUILTIN_POINTING_DEVICE_TYPE Type;\r
1499 BUILTIN_POINTING_DEVICE_INTERFACE Interface;\r
1500 UINT8 NumberOfButtons;\r
1501} SMBIOS_TABLE_TYPE21;\r
1502\r
1503///\r
1504/// Portable Battery - Device Chemistry\r
1505///\r
1506typedef enum { \r
1507 PortableBatteryDeviceChemistryOther = 0x01,\r
1508 PortableBatteryDeviceChemistryUnknown = 0x02,\r
1509 PortableBatteryDeviceChemistryLeadAcid = 0x03,\r
1510 PortableBatteryDeviceChemistryNickelCadmium = 0x04,\r
1511 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,\r
1512 PortableBatteryDeviceChemistryLithiumIon = 0x06,\r
1513 PortableBatteryDeviceChemistryZincAir = 0x07,\r
1514 PortableBatteryDeviceChemistryLithiumPolymer = 0x08\r
1515} PORTABLE_BATTERY_DEVICE_CHEMISTRY;\r
1516\r
1517///\r
1518/// Portable Battery (Type 22)\r
1519///\r
1520/// This structure describes the attributes of the portable battery(s) for the system. \r
1521/// The structure contains the static attributes for the group. Each structure describes \r
1522/// a single battery pack's attributes.\r
1523///\r
1524typedef struct {\r
1525 SMBIOS_STRUCTURE Hdr;\r
1526 SMBIOS_TABLE_STRING Location;\r
1527 SMBIOS_TABLE_STRING Manufacturer;\r
1528 SMBIOS_TABLE_STRING ManufactureDate;\r
1529 SMBIOS_TABLE_STRING SerialNumber;\r
1530 SMBIOS_TABLE_STRING DeviceName;\r
1531 PORTABLE_BATTERY_DEVICE_CHEMISTRY DeviceChemistry;\r
1532 UINT16 DeviceCapacity;\r
1533 UINT16 DesignVoltage;\r
1534 SMBIOS_TABLE_STRING SBDSVersionNumber;\r
1535 UINT8 MaximumErrorInBatteryData;\r
1536 UINT16 SBDSSerialNumber;\r
1537 UINT16 SBDSManufactureDate;\r
1538 SMBIOS_TABLE_STRING SBDSDeviceChemistry;\r
1539 UINT8 DesignCapacityMultiplier;\r
1540 UINT32 OEMSpecific;\r
1541} SMBIOS_TABLE_TYPE22;\r
1542\r
1543///\r
1544/// System Reset (Type 23)\r
1545///\r
1546/// This structure describes whether Automatic System Reset functions enabled (Status). \r
1547/// If the system has a watchdog Timer and the timer is not reset (Timer Reset)\r
1548/// before the Interval elapses, an automatic system reset will occur. The system will re-boot \r
1549/// according to the Boot Option. This function may repeat until the Limit is reached, at which time \r
1550/// the system will re-boot according to the Boot Option at Limit. \r
1551///\r
1552typedef struct {\r
1553 SMBIOS_STRUCTURE Hdr;\r
1554 UINT8 Capabilities;\r
1555 UINT16 ResetCount;\r
1556 UINT16 ResetLimit;\r
1557 UINT16 TimerInterval;\r
1558 UINT16 Timeout;\r
1559} SMBIOS_TABLE_TYPE23;\r
1560\r
1561///\r
1562/// Hardware Security (Type 24)\r
1563///\r
1564/// This structure describes the system-wide hardware security settings. \r
1565///\r
1566typedef struct {\r
1567 SMBIOS_STRUCTURE Hdr;\r
1568 UINT8 HardwareSecuritySettings;\r
1569} SMBIOS_TABLE_TYPE24;\r
1570\r
1571///\r
1572/// System Power Controls (Type 25)\r
1573///\r
1574/// This structure describes the attributes for controlling the main power supply to the system. \r
1575/// Software that interprets this structure uses the month, day, hour, minute, and second values \r
1576/// to determine the number of seconds until the next power-on of the system. The presence of \r
1577/// this structure implies that a timed power-on facility is available for the system. \r
1578///\r
1579typedef struct {\r
1580 SMBIOS_STRUCTURE Hdr;\r
1581 UINT8 NextScheduledPowerOnMonth;\r
1582 UINT8 NextScheduledPowerOnDayOfMonth;\r
1583 UINT8 NextScheduledPowerOnHour;\r
1584 UINT8 NextScheduledPowerOnMinute;\r
1585 UINT8 NextScheduledPowerOnSecond;\r
1586} SMBIOS_TABLE_TYPE25;\r
1587\r
1588///\r
1589/// Voltage Probe - Location and Status\r
1590///\r
1591typedef struct {\r
1592 UINT8 VoltageProbeSite :5;\r
1593 UINT8 VoltageProbeStatus :3;\r
1594} MISC_VOLTAGE_PROBE_LOCATION;\r
1595\r
1596///\r
1597/// Voltage Probe (Type 26)\r
1598///\r
1599/// This describes the attributes for a voltage probe in the system. \r
1600/// Each structure describes a single voltage probe.\r
1601///\r
1602typedef struct {\r
1603 SMBIOS_STRUCTURE Hdr;\r
1604 SMBIOS_TABLE_STRING Description;\r
1605 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;\r
1606 UINT16 MaximumValue;\r
1607 UINT16 MinimumValue;\r
1608 UINT16 Resolution;\r
1609 UINT16 Tolerance;\r
1610 UINT16 Accuracy;\r
1611 UINT32 OEMDefined;\r
1612 UINT16 NominalValue;\r
1613} SMBIOS_TABLE_TYPE26;\r
1614\r
1615///\r
1616/// Cooling Device - Device Type and Status\r
1617///\r
1618typedef struct {\r
1619 UINT8 CoolingDevice :5;\r
1620 UINT8 CoolingDeviceStatus :3;\r
1621} MISC_COOLING_DEVICE_TYPE;\r
1622\r
1623///\r
1624/// Cooling Device (Type 27)\r
1625///\r
1626/// This structure describes the attributes for a cooling device in the system. \r
1627/// Each structure describes a single cooling device. \r
1628/// \r
1629typedef struct {\r
1630 SMBIOS_STRUCTURE Hdr;\r
1631 UINT16 TemperatureProbeHandle;\r
1632 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;\r
1633 UINT8 CoolingUnitGroup;\r
1634 UINT32 OEMDefined;\r
1635 UINT16 NominalSpeed;\r
1636} SMBIOS_TABLE_TYPE27;\r
1637\r
1638///\r
1639/// Temperature Probe - Location and Status\r
1640///\r
1641typedef struct {\r
1642 UINT8 TemperatureProbeSite :5;\r
1643 UINT8 TemperatureProbeStatus :3;\r
1644} MISC_TEMPERATURE_PROBE_LOCATION;\r
1645\r
1646///\r
1647/// Temperature Probe (Type 28)\r
1648///\r
1649/// This structure describes the attributes for a temperature probe in the system. \r
1650/// Each structure describes a single temperature probe. \r
1651///\r
1652typedef struct {\r
1653 SMBIOS_STRUCTURE Hdr;\r
1654 SMBIOS_TABLE_STRING Description;\r
1655 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;\r
1656 UINT16 MaximumValue;\r
1657 UINT16 MinimumValue;\r
1658 UINT16 Resolution;\r
1659 UINT16 Tolerance;\r
1660 UINT16 Accuracy;\r
1661 UINT32 OEMDefined;\r
1662 UINT16 NominalValue;\r
1663} SMBIOS_TABLE_TYPE28;\r
1664\r
1665///\r
1666/// Electrical Current Probe - Location and Status\r
1667///\r
1668typedef struct {\r
1669 UINT8 ElectricalCurrentProbeSite :5;\r
1670 UINT8 ElectricalCurrentProbeStatus :3;\r
1671} MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;\r
1672\r
1673///\r
1674/// Electrical Current Probe (Type 29)\r
1675///\r
1676/// This structure describes the attributes for an electrical current probe in the system.\r
1677/// Each structure describes a single electrical current probe. \r
1678///\r
1679typedef struct {\r
1680 SMBIOS_STRUCTURE Hdr;\r
1681 SMBIOS_TABLE_STRING Description;\r
1682 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;\r
1683 UINT16 MaximumValue;\r
1684 UINT16 MinimumValue;\r
1685 UINT16 Resolution;\r
1686 UINT16 Tolerance;\r
1687 UINT16 Accuracy;\r
1688 UINT32 OEMDefined;\r
1689 UINT16 NominalValue;\r
1690} SMBIOS_TABLE_TYPE29;\r
1691\r
1692///\r
1693/// Out-of-Band Remote Access (Type 30)\r
1694///\r
1695/// This structure describes the attributes and policy settings of a hardware facility \r
1696/// that may be used to gain remote access to a hardware system when the operating system \r
1697/// is not available due to power-down status, hardware failures, or boot failures. \r
1698///\r
1699typedef struct {\r
1700 SMBIOS_STRUCTURE Hdr;\r
1701 SMBIOS_TABLE_STRING ManufacturerName;\r
1702 UINT8 Connections;\r
1703} SMBIOS_TABLE_TYPE30;\r
1704\r
1705///\r
1706/// Boot Integrity Services (BIS) Entry Point (Type 31)\r
1707///\r
1708/// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS). \r
1709/// \r
1710typedef struct {\r
1711 SMBIOS_STRUCTURE Hdr;\r
1712 UINT8 Checksum;\r
1713 UINT8 Reserved1;\r
1714 UINT16 Reserved2;\r
1715 UINT32 BisEntry16;\r
1716 UINT32 BisEntry32;\r
1717 UINT64 Reserved3;\r
1718 UINT32 Reserved4;\r
1719} SMBIOS_TABLE_TYPE31;\r
1720\r
1721///\r
1722/// System Boot Information - System Boot Status\r
1723///\r
1724typedef enum {\r
1725 BootInformationStatusNoError = 0x00,\r
1726 BootInformationStatusNoBootableMedia = 0x01,\r
1727 BootInformationStatusNormalOSFailedLoading = 0x02,\r
1728 BootInformationStatusFirmwareDetectedFailure = 0x03,\r
1729 BootInformationStatusOSDetectedFailure = 0x04,\r
1730 BootInformationStatusUserRequestedBoot = 0x05,\r
1731 BootInformationStatusSystemSecurityViolation = 0x06,\r
1732 BootInformationStatusPreviousRequestedImage = 0x07,\r
1733 BootInformationStatusWatchdogTimerExpired = 0x08,\r
1734 BootInformationStatusStartReserved = 0x09,\r
1735 BootInformationStatusStartOemSpecific = 0x80,\r
1736 BootInformationStatusStartProductSpecific = 0xC0\r
1737} MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;\r
1738\r
1739///\r
1740/// System Boot Information (Type 32)\r
1741///\r
1742/// The client system firmware, e.g. BIOS, communicates the System Boot Status to the \r
1743/// client's Pre-boot Execution Environment (PXE) boot image or OS-present management \r
1744/// application via this structure. When used in the PXE environment, for example, \r
1745/// this code identifies the reason the PXE was initiated and can be used by boot-image \r
1746/// software to further automate an enterprise's PXE sessions. For example, an enterprise \r
1747/// could choose to automatically download a hardware-diagnostic image to a client whose \r
1748/// reason code indicated either a firmware- or operating system-detected hardware failure.\r
1749///\r
1750typedef struct {\r
1751 SMBIOS_STRUCTURE Hdr;\r
1752 UINT8 Reserved[6];\r
1753 MISC_BOOT_INFORMATION_STATUS_DATA_TYPE BootStatus;\r
1754} SMBIOS_TABLE_TYPE32;\r
1755\r
1756///\r
1757/// 64-bit Memory Error Information (Type 33)\r
1758///\r
1759/// This structure describes an error within a Physical Memory Array, \r
1760/// when the error address is above 4G (0xFFFFFFFF).\r
1761/// \r
1762typedef struct {\r
1763 SMBIOS_STRUCTURE Hdr;\r
1764 MEMORY_ERROR_TYPE ErrorType; // Same as Type 18\r
1765 MEMORY_ERROR_GRANULARITY ErrorGranularity; // Same as Type 18\r
1766 MEMORY_ERROR_OPERATION ErrorOperation; // Same as Type 18\r
1767 UINT32 VendorSyndrome;\r
1768 UINT64 MemoryArrayErrorAddress;\r
1769 UINT64 DeviceErrorAddress;\r
1770 UINT32 ErrorResolution;\r
1771} SMBIOS_TABLE_TYPE33;\r
1772\r
1773///\r
1774/// Management Device - Type \r
1775///\r
1776typedef enum {\r
1777 ManagementDeviceTypeOther = 0x01,\r
1778 ManagementDeviceTypeUnknown = 0x02,\r
1779 ManagementDeviceTypeLm75 = 0x03,\r
1780 ManagementDeviceTypeLm78 = 0x04,\r
1781 ManagementDeviceTypeLm79 = 0x05,\r
1782 ManagementDeviceTypeLm80 = 0x06,\r
1783 ManagementDeviceTypeLm81 = 0x07,\r
1784 ManagementDeviceTypeAdm9240 = 0x08,\r
1785 ManagementDeviceTypeDs1780 = 0x09,\r
1786 ManagementDeviceTypeMaxim1617 = 0x0A,\r
1787 ManagementDeviceTypeGl518Sm = 0x0B,\r
1788 ManagementDeviceTypeW83781D = 0x0C,\r
1789 ManagementDeviceTypeHt82H791 = 0x0D\r
1790} MISC_MANAGEMENT_DEVICE_TYPE;\r
1791\r
1792///\r
1793/// Management Device - Address Type \r
1794///\r
1795typedef enum {\r
1796 ManagementDeviceAddressTypeOther = 0x01,\r
1797 ManagementDeviceAddressTypeUnknown = 0x02,\r
1798 ManagementDeviceAddressTypeIOPort = 0x03,\r
1799 ManagementDeviceAddressTypeMemory = 0x04,\r
1800 ManagementDeviceAddressTypeSmbus = 0x05\r
1801} MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;\r
1802\r
1803///\r
1804/// Management Device (Type 34)\r
1805///\r
1806/// The information in this structure defines the attributes of a Management Device. \r
1807/// A Management Device might control one or more fans or voltage, current, or temperature\r
1808/// probes as defined by one or more Management Device Component structures.\r
1809///\r
1810typedef struct {\r
1811 SMBIOS_STRUCTURE Hdr;\r
1812 SMBIOS_TABLE_STRING Description;\r
1813 MISC_MANAGEMENT_DEVICE_TYPE Type;\r
1814 UINT32 Address;\r
1815 MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE AddressType;\r
1816} SMBIOS_TABLE_TYPE34;\r
1817\r
1818///\r
1819/// Management Device Component (Type 35)\r
1820///\r
1821/// This structure associates a cooling device or environmental probe with structures \r
1822/// that define the controlling hardware device and (optionally) the component's thresholds. \r
1823///\r
1824typedef struct {\r
1825 SMBIOS_STRUCTURE Hdr;\r
1826 SMBIOS_TABLE_STRING Description;\r
1827 UINT16 ManagementDeviceHandle;\r
1828 UINT16 ComponentHandle;\r
1829 UINT16 ThresholdHandle;\r
1830} SMBIOS_TABLE_TYPE35;\r
1831\r
1832///\r
1833/// Management Device Threshold Data (Type 36)\r
1834///\r
1835/// The information in this structure defines threshold information for \r
1836/// a component (probe or cooling-unit) contained within a Management Device. \r
1837///\r
1838typedef struct {\r
1839 SMBIOS_STRUCTURE Hdr;\r
1840 UINT16 LowerThresholdNonCritical;\r
1841 UINT16 UpperThresholdNonCritical;\r
1842 UINT16 LowerThresholdCritical;\r
1843 UINT16 UpperThresholdCritical;\r
1844 UINT16 LowerThresholdNonRecoverable;\r
1845 UINT16 UpperThresholdNonRecoverable;\r
1846} SMBIOS_TABLE_TYPE36;\r
1847\r
1848///\r
1849/// Memory Channel Entry\r
1850///\r
1851typedef struct {\r
1852 UINT8 DeviceLoad;\r
1853 UINT16 DeviceHandle;\r
1854} MEMORY_DEVICE;\r
1855\r
1856///\r
1857/// Memory Channel - Channel Type\r
1858///\r
1859typedef enum {\r
1860 MemoryChannelTypeOther = 0x01,\r
1861 MemoryChannelTypeUnknown = 0x02,\r
1862 MemoryChannelTypeRambus = 0x03,\r
1863 MemoryChannelTypeSyncLink = 0x04\r
1864} MEMORY_CHANNEL_TYPE;\r
1865\r
1866///\r
1867/// Memory Channel (Type 37)\r
1868///\r
1869/// The information in this structure provides the correlation between a Memory Channel\r
1870/// and its associated Memory Devices. Each device presents one or more loads to the channel; \r
1871/// the sum of all device loads cannot exceed the channel's defined maximum.\r
1872///\r
1873typedef struct {\r
1874 SMBIOS_STRUCTURE Hdr;\r
1875 UINT8 ChannelType;\r
1876 UINT8 MaximumChannelLoad;\r
1877 UINT8 MemoryDeviceCount;\r
1878 MEMORY_DEVICE MemoryDevice[1];\r
1879} SMBIOS_TABLE_TYPE37;\r
1880\r
1881///\r
1882/// IPMI Device Information - BMC Interface Type\r
1883///\r
1884typedef enum {\r
1885 IPMIDeviceInfoInterfaceTypeUnknown = 0x00,\r
1886 IPMIDeviceInfoInterfaceTypeKCS = 0x01, // Keyboard Controller Style\r
1887 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, // Server Management Interface Chip\r
1888 IPMIDeviceInfoInterfaceTypeBT = 0x03, // Block Transfer\r
1889 IPMIDeviceInfoInterfaceTypeReserved = 0x04\r
1890} BMC_INTERFACE_TYPE;\r
1891\r
1892///\r
1893/// IPMI Device Information (Type 38)\r
1894///\r
1895/// The information in this structure defines the attributes of an \r
1896/// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).\r
1897/// \r
1898typedef struct {\r
1899 SMBIOS_STRUCTURE Hdr;\r
1900 BMC_INTERFACE_TYPE InterfaceType;\r
1901 UINT8 IPMISpecificationRevision;\r
1902 UINT8 I2CSlaveAddress;\r
1903 UINT8 NVStorageDeviceAddress;\r
1904 UINT64 BaseAddress;\r
1905 UINT8 BaseAddressModifier_InterruptInfo;\r
1906 UINT8 InterruptNumber;\r
1907} SMBIOS_TABLE_TYPE38;\r
1908\r
1909///\r
1910/// System Power Supply - Power Supply Characteristics\r
1911///\r
1912typedef struct {\r
1913 UINT16 PowerSupplyHotReplaceable:1;\r
1914 UINT16 PowerSupplyPresent :1;\r
1915 UINT16 PowerSupplyUnplugged :1;\r
1916 UINT16 InputVoltageRangeSwitch :4;\r
1917 UINT16 PowerSupplyStatus :3;\r
1918 UINT16 PowerSupplyType :4;\r
1919 UINT16 Reserved :2;\r
1920} SYS_POWER_SUPPLY_CHARACTERISTICS;\r
1921\r
1922///\r
1923/// System Power Supply (Type 39)\r
1924///\r
1925/// This structure identifies attributes of a system power supply. One instance\r
1926/// of this record is present for each possible power supply in a system. \r
1927///\r
1928typedef struct {\r
1929 SMBIOS_STRUCTURE Hdr;\r
1930 UINT8 PowerUnitGroup;\r
1931 SMBIOS_TABLE_STRING Location;\r
1932 SMBIOS_TABLE_STRING DeviceName;\r
1933 SMBIOS_TABLE_STRING Manufacturer;\r
1934 SMBIOS_TABLE_STRING SerialNumber;\r
1935 SMBIOS_TABLE_STRING AssetTagNumber;\r
1936 SMBIOS_TABLE_STRING ModelPartNumber;\r
1937 SMBIOS_TABLE_STRING RevisionLevel;\r
1938 UINT16 MaxPowerCapacity;\r
1939 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;\r
1940 UINT16 InputVoltageProbeHandle;\r
1941 UINT16 CoolingDeviceHandle;\r
1942 UINT16 InputCurrentProbeHandle;\r
1943} SMBIOS_TABLE_TYPE39;\r
1944\r
1945///\r
1946/// Additional Information Entry Format \r
1947///\r
1948typedef struct { \r
1949 UINT8 EntryLength; \r
1950 UINT16 ReferencedHandle;\r
1951 UINT8 ReferencedOffset;\r
1952 SMBIOS_TABLE_STRING EntryString;\r
1953 UINT8 Value[1];\r
1954}ADDITIONAL_INFORMATION_ENTRY;\r
1955\r
1956///\r
1957/// Additional Information (Type 40)\r
1958///\r
1959/// This structure is intended to provide additional information for handling unspecified \r
1960/// enumerated values and interim field updates in another structure. \r
1961///\r
1962typedef struct {\r
1963 SMBIOS_STRUCTURE Hdr;\r
1964 UINT8 NumberOfAdditionalInformationEntries;\r
1965 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1]; \r
1966} SMBIOS_TABLE_TYPE40;\r
1967\r
1968///\r
1969/// Onboard Devices Extended Information - Onboard Device Types\r
1970///\r
1971typedef enum{\r
1972 OnBoardDeviceExtendedTypeOther = 0x01,\r
1973 OnBoardDeviceExtendedTypeUnknown = 0x02,\r
1974 OnBoardDeviceExtendedTypeVideo = 0x03,\r
1975 OnBoardDeviceExtendedTypeScsiController = 0x04,\r
1976 OnBoardDeviceExtendedTypeEthernet = 0x05,\r
1977 OnBoardDeviceExtendedTypeTokenRing = 0x06,\r
1978 OnBoardDeviceExtendedTypeSound = 0x07,\r
1979 OnBoardDeviceExtendedTypePATAController = 0x08,\r
1980 OnBoardDeviceExtendedTypeSATAController = 0x09,\r
1981 OnBoardDeviceExtendedTypeSASController = 0x0A\r
1982} ONBOARD_DEVICE_EXTENDED_INFO_TYPE;\r
1983\r
1984///\r
1985/// Onboard Devices Extended Information (Type 41)\r
1986///\r
1987/// The information in this structure defines the attributes of devices that \r
1988/// are onboard (soldered onto) a system element, usually the baseboard. \r
1989/// In general, an entry in this table implies that the BIOS has some level of \r
1990/// control over the enabling of the associated device for use by the system. \r
1991///\r
1992typedef struct {\r
1993 SMBIOS_STRUCTURE Hdr;\r
1994 SMBIOS_TABLE_STRING ReferenceDesignation;\r
1995 ONBOARD_DEVICE_EXTENDED_INFO_TYPE DeviceType;\r
1996 UINT8 DeviceTypeInstance;\r
1997 UINT16 SegmentGroupNum;\r
1998 UINT8 BusNum;\r
1999 UINT8 DevFuncNum; \r
2000} SMBIOS_TABLE_TYPE41;\r
2001\r
2002///\r
2003/// Inactive (Type 126)\r
2004///\r
2005typedef struct {\r
2006 SMBIOS_STRUCTURE Hdr;\r
2007} SMBIOS_TABLE_TYPE126;\r
2008\r
2009///\r
2010/// End-of-Table (Type 127)\r
2011///\r
2012typedef struct {\r
2013 SMBIOS_STRUCTURE Hdr;\r
2014} SMBIOS_TABLE_TYPE127;\r
2015\r
2016///\r
2017/// Union of all the possible SMBIOS record types\r
2018///\r
2019typedef union {\r
2020 SMBIOS_STRUCTURE *Hdr;\r
2021 SMBIOS_TABLE_TYPE0 *Type0;\r
2022 SMBIOS_TABLE_TYPE1 *Type1;\r
2023 SMBIOS_TABLE_TYPE2 *Type2;\r
2024 SMBIOS_TABLE_TYPE3 *Type3;\r
2025 SMBIOS_TABLE_TYPE4 *Type4;\r
2026 SMBIOS_TABLE_TYPE5 *Type5;\r
2027 SMBIOS_TABLE_TYPE6 *Type6;\r
2028 SMBIOS_TABLE_TYPE7 *Type7;\r
2029 SMBIOS_TABLE_TYPE8 *Type8;\r
2030 SMBIOS_TABLE_TYPE9 *Type9;\r
2031 SMBIOS_TABLE_TYPE10 *Type10;\r
2032 SMBIOS_TABLE_TYPE11 *Type11;\r
2033 SMBIOS_TABLE_TYPE12 *Type12;\r
2034 SMBIOS_TABLE_TYPE13 *Type13;\r
2035 SMBIOS_TABLE_TYPE14 *Type14;\r
2036 SMBIOS_TABLE_TYPE15 *Type15;\r
2037 SMBIOS_TABLE_TYPE16 *Type16;\r
2038 SMBIOS_TABLE_TYPE17 *Type17;\r
2039 SMBIOS_TABLE_TYPE18 *Type18;\r
2040 SMBIOS_TABLE_TYPE19 *Type19;\r
2041 SMBIOS_TABLE_TYPE20 *Type20;\r
2042 SMBIOS_TABLE_TYPE21 *Type21;\r
2043 SMBIOS_TABLE_TYPE22 *Type22;\r
2044 SMBIOS_TABLE_TYPE23 *Type23;\r
2045 SMBIOS_TABLE_TYPE24 *Type24;\r
2046 SMBIOS_TABLE_TYPE25 *Type25;\r
2047 SMBIOS_TABLE_TYPE26 *Type26;\r
2048 SMBIOS_TABLE_TYPE27 *Type27;\r
2049 SMBIOS_TABLE_TYPE28 *Type28;\r
2050 SMBIOS_TABLE_TYPE29 *Type29;\r
2051 SMBIOS_TABLE_TYPE30 *Type30;\r
2052 SMBIOS_TABLE_TYPE31 *Type31;\r
2053 SMBIOS_TABLE_TYPE32 *Type32;\r
2054 SMBIOS_TABLE_TYPE33 *Type33;\r
2055 SMBIOS_TABLE_TYPE34 *Type34;\r
2056 SMBIOS_TABLE_TYPE35 *Type35;\r
2057 SMBIOS_TABLE_TYPE36 *Type36;\r
2058 SMBIOS_TABLE_TYPE37 *Type37;\r
2059 SMBIOS_TABLE_TYPE38 *Type38;\r
2060 SMBIOS_TABLE_TYPE39 *Type39;\r
2061 SMBIOS_TABLE_TYPE40 *Type40;\r
2062 SMBIOS_TABLE_TYPE41 *Type41;\r
2063 SMBIOS_TABLE_TYPE126 *Type126;\r
2064 SMBIOS_TABLE_TYPE127 *Type127;\r
2065 UINT8 *Raw;\r
2066} SMBIOS_STRUCTURE_POINTER;\r
2067\r
2068#pragma pack()\r
2069\r
2070#endif\r
EFI Development Kit II mirror for PVE