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1 | /** @file\r | |
2 | High-level Io/Mmio functions.\r | |
3 | \r | |
4 | All assertions for bit field operations are handled bit field functions in the\r | |
5 | Base Library.\r | |
6 | \r | |
7 | Copyright (c) 2006, Intel Corporation<BR>\r | |
8 | All rights reserved. This program and the accompanying materials\r | |
9 | are licensed and made available under the terms and conditions of the BSD License\r | |
10 | which accompanies this distribution. The full text of the license may be found at\r | |
11 | http://opensource.org/licenses/bsd-license.php\r | |
12 | \r | |
13 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
14 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
15 | \r | |
16 | Module Name: IoHighLevel.c\r | |
17 | \r | |
18 | The following IoLib instances share the same version of this file:\r | |
19 | \r | |
20 | BaseIoLibIntrinsic\r | |
21 | DxeIoLibCpuIo\r | |
22 | PeiIoLibCpuIo\r | |
23 | \r | |
24 | **/\r | |
25 | \r | |
26 | //\r | |
27 | // Include common header file for this module.\r | |
28 | //\r | |
29 | #include "BaseIoLibIntrinsicInternal.h"\r | |
30 | \r | |
31 | /**\r | |
32 | Reads an 8-bit I/O port, performs a bitwise inclusive OR, and writes the\r | |
33 | result back to the 8-bit I/O port.\r | |
34 | \r | |
35 | Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR\r | |
36 | between the read result and the value specified by OrData, and writes the\r | |
37 | result to the 8-bit I/O port specified by Port. The value written to the I/O\r | |
38 | port is returned. This function must guarantee that all I/O read and write\r | |
39 | operations are serialized.\r | |
40 | \r | |
41 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
42 | \r | |
43 | @param Port The I/O port to write.\r | |
44 | @param OrData The value to OR with the read value from the I/O port.\r | |
45 | \r | |
46 | @return The value written back to the I/O port.\r | |
47 | \r | |
48 | **/\r | |
49 | UINT8\r | |
50 | EFIAPI\r | |
51 | IoOr8 (\r | |
52 | IN UINTN Port,\r | |
53 | IN UINT8 OrData\r | |
54 | )\r | |
55 | {\r | |
56 | return IoWrite8 (Port, (UINT8) (IoRead8 (Port) | OrData));\r | |
57 | }\r | |
58 | \r | |
59 | /**\r | |
60 | Reads an 8-bit I/O port, performs a bitwise AND, and writes the result back\r | |
61 | to the 8-bit I/O port.\r | |
62 | \r | |
63 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r | |
64 | the read result and the value specified by AndData, and writes the result to\r | |
65 | the 8-bit I/O port specified by Port. The value written to the I/O port is\r | |
66 | returned. This function must guarantee that all I/O read and write operations\r | |
67 | are serialized.\r | |
68 | \r | |
69 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
70 | \r | |
71 | @param Port The I/O port to write.\r | |
72 | @param AndData The value to AND with the read value from the I/O port.\r | |
73 | \r | |
74 | @return The value written back to the I/O port.\r | |
75 | \r | |
76 | **/\r | |
77 | UINT8\r | |
78 | EFIAPI\r | |
79 | IoAnd8 (\r | |
80 | IN UINTN Port,\r | |
81 | IN UINT8 AndData\r | |
82 | )\r | |
83 | {\r | |
84 | return IoWrite8 (Port, (UINT8) (IoRead8 (Port) & AndData));\r | |
85 | }\r | |
86 | \r | |
87 | /**\r | |
88 | Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise\r | |
89 | inclusive OR, and writes the result back to the 8-bit I/O port.\r | |
90 | \r | |
91 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r | |
92 | the read result and the value specified by AndData, performs a bitwise OR\r | |
93 | between the result of the AND operation and the value specified by OrData,\r | |
94 | and writes the result to the 8-bit I/O port specified by Port. The value\r | |
95 | written to the I/O port is returned. This function must guarantee that all\r | |
96 | I/O read and write operations are serialized.\r | |
97 | \r | |
98 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
99 | \r | |
100 | @param Port The I/O port to write.\r | |
101 | @param AndData The value to AND with the read value from the I/O port.\r | |
102 | @param OrData The value to OR with the result of the AND operation.\r | |
103 | \r | |
104 | @return The value written back to the I/O port.\r | |
105 | \r | |
106 | **/\r | |
107 | UINT8\r | |
108 | EFIAPI\r | |
109 | IoAndThenOr8 (\r | |
110 | IN UINTN Port,\r | |
111 | IN UINT8 AndData,\r | |
112 | IN UINT8 OrData\r | |
113 | )\r | |
114 | {\r | |
115 | return IoWrite8 (Port, (UINT8) ((IoRead8 (Port) & AndData) | OrData));\r | |
116 | }\r | |
117 | \r | |
118 | /**\r | |
119 | Reads a bit field of an I/O register.\r | |
120 | \r | |
121 | Reads the bit field in an 8-bit I/O register. The bit field is specified by\r | |
122 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
123 | \r | |
124 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
125 | If StartBit is greater than 7, then ASSERT().\r | |
126 | If EndBit is greater than 7, then ASSERT().\r | |
127 | If EndBit is less than StartBit, then ASSERT().\r | |
128 | \r | |
129 | @param Port The I/O port to read.\r | |
130 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
131 | Range 0..7.\r | |
132 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
133 | Range 0..7.\r | |
134 | \r | |
135 | @return The value read.\r | |
136 | \r | |
137 | **/\r | |
138 | UINT8\r | |
139 | EFIAPI\r | |
140 | IoBitFieldRead8 (\r | |
141 | IN UINTN Port,\r | |
142 | IN UINTN StartBit,\r | |
143 | IN UINTN EndBit\r | |
144 | )\r | |
145 | {\r | |
146 | return BitFieldRead8 (IoRead8 (Port), StartBit, EndBit);\r | |
147 | }\r | |
148 | \r | |
149 | /**\r | |
150 | Writes a bit field to an I/O register.\r | |
151 | \r | |
152 | Writes Value to the bit field of the I/O register. The bit field is specified\r | |
153 | by the StartBit and the EndBit. All other bits in the destination I/O\r | |
154 | register are preserved. The value written to the I/O port is returned. Extra\r | |
155 | left bits in Value are stripped.\r | |
156 | \r | |
157 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
158 | If StartBit is greater than 7, then ASSERT().\r | |
159 | If EndBit is greater than 7, then ASSERT().\r | |
160 | If EndBit is less than StartBit, then ASSERT().\r | |
161 | \r | |
162 | @param Port The I/O port to write.\r | |
163 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
164 | Range 0..7.\r | |
165 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
166 | Range 0..7.\r | |
167 | @param Value New value of the bit field.\r | |
168 | \r | |
169 | @return The value written back to the I/O port.\r | |
170 | \r | |
171 | **/\r | |
172 | UINT8\r | |
173 | EFIAPI\r | |
174 | IoBitFieldWrite8 (\r | |
175 | IN UINTN Port,\r | |
176 | IN UINTN StartBit,\r | |
177 | IN UINTN EndBit,\r | |
178 | IN UINT8 Value\r | |
179 | )\r | |
180 | {\r | |
181 | return IoWrite8 (\r | |
182 | Port,\r | |
183 | BitFieldWrite8 (IoRead8 (Port), StartBit, EndBit, Value)\r | |
184 | );\r | |
185 | }\r | |
186 | \r | |
187 | /**\r | |
188 | Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the\r | |
189 | result back to the bit field in the 8-bit port.\r | |
190 | \r | |
191 | Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR\r | |
192 | between the read result and the value specified by OrData, and writes the\r | |
193 | result to the 8-bit I/O port specified by Port. The value written to the I/O\r | |
194 | port is returned. This function must guarantee that all I/O read and write\r | |
195 | operations are serialized. Extra left bits in OrData are stripped.\r | |
196 | \r | |
197 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
198 | If StartBit is greater than 7, then ASSERT().\r | |
199 | If EndBit is greater than 7, then ASSERT().\r | |
200 | If EndBit is less than StartBit, then ASSERT().\r | |
201 | \r | |
202 | @param Port The I/O port to write.\r | |
203 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
204 | Range 0..7.\r | |
205 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
206 | Range 0..7.\r | |
207 | @param OrData The value to OR with the read value from the I/O port.\r | |
208 | \r | |
209 | @return The value written back to the I/O port.\r | |
210 | \r | |
211 | **/\r | |
212 | UINT8\r | |
213 | EFIAPI\r | |
214 | IoBitFieldOr8 (\r | |
215 | IN UINTN Port,\r | |
216 | IN UINTN StartBit,\r | |
217 | IN UINTN EndBit,\r | |
218 | IN UINT8 OrData\r | |
219 | )\r | |
220 | {\r | |
221 | return IoWrite8 (\r | |
222 | Port,\r | |
223 | BitFieldOr8 (IoRead8 (Port), StartBit, EndBit, OrData)\r | |
224 | );\r | |
225 | }\r | |
226 | \r | |
227 | /**\r | |
228 | Reads a bit field in an 8-bit port, performs a bitwise AND, and writes the\r | |
229 | result back to the bit field in the 8-bit port.\r | |
230 | \r | |
231 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r | |
232 | the read result and the value specified by AndData, and writes the result to\r | |
233 | the 8-bit I/O port specified by Port. The value written to the I/O port is\r | |
234 | returned. This function must guarantee that all I/O read and write operations\r | |
235 | are serialized. Extra left bits in AndData are stripped.\r | |
236 | \r | |
237 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
238 | If StartBit is greater than 7, then ASSERT().\r | |
239 | If EndBit is greater than 7, then ASSERT().\r | |
240 | If EndBit is less than StartBit, then ASSERT().\r | |
241 | \r | |
242 | @param Port The I/O port to write.\r | |
243 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
244 | Range 0..7.\r | |
245 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
246 | Range 0..7.\r | |
247 | @param AndData The value to AND with the read value from the I/O port.\r | |
248 | \r | |
249 | @return The value written back to the I/O port.\r | |
250 | \r | |
251 | **/\r | |
252 | UINT8\r | |
253 | EFIAPI\r | |
254 | IoBitFieldAnd8 (\r | |
255 | IN UINTN Port,\r | |
256 | IN UINTN StartBit,\r | |
257 | IN UINTN EndBit,\r | |
258 | IN UINT8 AndData\r | |
259 | )\r | |
260 | {\r | |
261 | return IoWrite8 (\r | |
262 | Port,\r | |
263 | BitFieldAnd8 (IoRead8 (Port), StartBit, EndBit, AndData)\r | |
264 | );\r | |
265 | }\r | |
266 | \r | |
267 | /**\r | |
268 | Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r | |
269 | bitwise inclusive OR, and writes the result back to the bit field in the\r | |
270 | 8-bit port.\r | |
271 | \r | |
272 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed\r | |
273 | by a bitwise inclusive OR between the read result and the value specified by\r | |
274 | AndData, and writes the result to the 8-bit I/O port specified by Port. The\r | |
275 | value written to the I/O port is returned. This function must guarantee that\r | |
276 | all I/O read and write operations are serialized. Extra left bits in both\r | |
277 | AndData and OrData are stripped.\r | |
278 | \r | |
279 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
280 | If StartBit is greater than 7, then ASSERT().\r | |
281 | If EndBit is greater than 7, then ASSERT().\r | |
282 | If EndBit is less than StartBit, then ASSERT().\r | |
283 | \r | |
284 | @param Port The I/O port to write.\r | |
285 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
286 | Range 0..7.\r | |
287 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
288 | Range 0..7.\r | |
289 | @param AndData The value to AND with the read value from the I/O port.\r | |
290 | @param OrData The value to OR with the result of the AND operation.\r | |
291 | \r | |
292 | @return The value written back to the I/O port.\r | |
293 | \r | |
294 | **/\r | |
295 | UINT8\r | |
296 | EFIAPI\r | |
297 | IoBitFieldAndThenOr8 (\r | |
298 | IN UINTN Port,\r | |
299 | IN UINTN StartBit,\r | |
300 | IN UINTN EndBit,\r | |
301 | IN UINT8 AndData,\r | |
302 | IN UINT8 OrData\r | |
303 | )\r | |
304 | {\r | |
305 | return IoWrite8 (\r | |
306 | Port,\r | |
307 | BitFieldAndThenOr8 (IoRead8 (Port), StartBit, EndBit, AndData, OrData)\r | |
308 | );\r | |
309 | }\r | |
310 | \r | |
311 | /**\r | |
312 | Reads a 16-bit I/O port, performs a bitwise inclusive OR, and writes the\r | |
313 | result back to the 16-bit I/O port.\r | |
314 | \r | |
315 | Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR\r | |
316 | between the read result and the value specified by OrData, and writes the\r | |
317 | result to the 16-bit I/O port specified by Port. The value written to the I/O\r | |
318 | port is returned. This function must guarantee that all I/O read and write\r | |
319 | operations are serialized.\r | |
320 | \r | |
321 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
322 | \r | |
323 | @param Port The I/O port to write.\r | |
324 | @param OrData The value to OR with the read value from the I/O port.\r | |
325 | \r | |
326 | @return The value written back to the I/O port.\r | |
327 | \r | |
328 | **/\r | |
329 | UINT16\r | |
330 | EFIAPI\r | |
331 | IoOr16 (\r | |
332 | IN UINTN Port,\r | |
333 | IN UINT16 OrData\r | |
334 | )\r | |
335 | {\r | |
336 | return IoWrite16 (Port, (UINT16) (IoRead16 (Port) | OrData));\r | |
337 | }\r | |
338 | \r | |
339 | /**\r | |
340 | Reads a 16-bit I/O port, performs a bitwise AND, and writes the result back\r | |
341 | to the 16-bit I/O port.\r | |
342 | \r | |
343 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r | |
344 | the read result and the value specified by AndData, and writes the result to\r | |
345 | the 16-bit I/O port specified by Port. The value written to the I/O port is\r | |
346 | returned. This function must guarantee that all I/O read and write operations\r | |
347 | are serialized.\r | |
348 | \r | |
349 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
350 | \r | |
351 | @param Port The I/O port to write.\r | |
352 | @param AndData The value to AND with the read value from the I/O port.\r | |
353 | \r | |
354 | @return The value written back to the I/O port.\r | |
355 | \r | |
356 | **/\r | |
357 | UINT16\r | |
358 | EFIAPI\r | |
359 | IoAnd16 (\r | |
360 | IN UINTN Port,\r | |
361 | IN UINT16 AndData\r | |
362 | )\r | |
363 | {\r | |
364 | return IoWrite16 (Port, (UINT16) (IoRead16 (Port) & AndData));\r | |
365 | }\r | |
366 | \r | |
367 | /**\r | |
368 | Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise\r | |
369 | inclusive OR, and writes the result back to the 16-bit I/O port.\r | |
370 | \r | |
371 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r | |
372 | the read result and the value specified by AndData, performs a bitwise OR\r | |
373 | between the result of the AND operation and the value specified by OrData,\r | |
374 | and writes the result to the 16-bit I/O port specified by Port. The value\r | |
375 | written to the I/O port is returned. This function must guarantee that all\r | |
376 | I/O read and write operations are serialized.\r | |
377 | \r | |
378 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
379 | \r | |
380 | @param Port The I/O port to write.\r | |
381 | @param AndData The value to AND with the read value from the I/O port.\r | |
382 | @param OrData The value to OR with the result of the AND operation.\r | |
383 | \r | |
384 | @return The value written back to the I/O port.\r | |
385 | \r | |
386 | **/\r | |
387 | UINT16\r | |
388 | EFIAPI\r | |
389 | IoAndThenOr16 (\r | |
390 | IN UINTN Port,\r | |
391 | IN UINT16 AndData,\r | |
392 | IN UINT16 OrData\r | |
393 | )\r | |
394 | {\r | |
395 | return IoWrite16 (Port, (UINT16) ((IoRead16 (Port) & AndData) | OrData));\r | |
396 | }\r | |
397 | \r | |
398 | /**\r | |
399 | Reads a bit field of an I/O register.\r | |
400 | \r | |
401 | Reads the bit field in a 16-bit I/O register. The bit field is specified by\r | |
402 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
403 | \r | |
404 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
405 | If StartBit is greater than 15, then ASSERT().\r | |
406 | If EndBit is greater than 15, then ASSERT().\r | |
407 | If EndBit is less than StartBit, then ASSERT().\r | |
408 | \r | |
409 | @param Port The I/O port to read.\r | |
410 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
411 | Range 0..15.\r | |
412 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
413 | Range 0..15.\r | |
414 | \r | |
415 | @return The value read.\r | |
416 | \r | |
417 | **/\r | |
418 | UINT16\r | |
419 | EFIAPI\r | |
420 | IoBitFieldRead16 (\r | |
421 | IN UINTN Port,\r | |
422 | IN UINTN StartBit,\r | |
423 | IN UINTN EndBit\r | |
424 | )\r | |
425 | {\r | |
426 | return BitFieldRead16 (IoRead16 (Port), StartBit, EndBit);\r | |
427 | }\r | |
428 | \r | |
429 | /**\r | |
430 | Writes a bit field to an I/O register.\r | |
431 | \r | |
432 | Writes Value to the bit field of the I/O register. The bit field is specified\r | |
433 | by the StartBit and the EndBit. All other bits in the destination I/O\r | |
434 | register are preserved. The value written to the I/O port is returned. Extra\r | |
435 | left bits in Value are stripped.\r | |
436 | \r | |
437 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
438 | If StartBit is greater than 15, then ASSERT().\r | |
439 | If EndBit is greater than 15, then ASSERT().\r | |
440 | If EndBit is less than StartBit, then ASSERT().\r | |
441 | \r | |
442 | @param Port The I/O port to write.\r | |
443 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
444 | Range 0..15.\r | |
445 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
446 | Range 0..15.\r | |
447 | @param Value New value of the bit field.\r | |
448 | \r | |
449 | @return The value written back to the I/O port.\r | |
450 | \r | |
451 | **/\r | |
452 | UINT16\r | |
453 | EFIAPI\r | |
454 | IoBitFieldWrite16 (\r | |
455 | IN UINTN Port,\r | |
456 | IN UINTN StartBit,\r | |
457 | IN UINTN EndBit,\r | |
458 | IN UINT16 Value\r | |
459 | )\r | |
460 | {\r | |
461 | return IoWrite16 (\r | |
462 | Port,\r | |
463 | BitFieldWrite16 (IoRead16 (Port), StartBit, EndBit, Value)\r | |
464 | );\r | |
465 | }\r | |
466 | \r | |
467 | /**\r | |
468 | Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the\r | |
469 | result back to the bit field in the 16-bit port.\r | |
470 | \r | |
471 | Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR\r | |
472 | between the read result and the value specified by OrData, and writes the\r | |
473 | result to the 16-bit I/O port specified by Port. The value written to the I/O\r | |
474 | port is returned. This function must guarantee that all I/O read and write\r | |
475 | operations are serialized. Extra left bits in OrData are stripped.\r | |
476 | \r | |
477 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
478 | If StartBit is greater than 15, then ASSERT().\r | |
479 | If EndBit is greater than 15, then ASSERT().\r | |
480 | If EndBit is less than StartBit, then ASSERT().\r | |
481 | \r | |
482 | @param Port The I/O port to write.\r | |
483 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
484 | Range 0..15.\r | |
485 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
486 | Range 0..15.\r | |
487 | @param OrData The value to OR with the read value from the I/O port.\r | |
488 | \r | |
489 | @return The value written back to the I/O port.\r | |
490 | \r | |
491 | **/\r | |
492 | UINT16\r | |
493 | EFIAPI\r | |
494 | IoBitFieldOr16 (\r | |
495 | IN UINTN Port,\r | |
496 | IN UINTN StartBit,\r | |
497 | IN UINTN EndBit,\r | |
498 | IN UINT16 OrData\r | |
499 | )\r | |
500 | {\r | |
501 | return IoWrite16 (\r | |
502 | Port,\r | |
503 | BitFieldOr16 (IoRead16 (Port), StartBit, EndBit, OrData)\r | |
504 | );\r | |
505 | }\r | |
506 | \r | |
507 | /**\r | |
508 | Reads a bit field in a 16-bit port, performs a bitwise AND, and writes the\r | |
509 | result back to the bit field in the 16-bit port.\r | |
510 | \r | |
511 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r | |
512 | the read result and the value specified by AndData, and writes the result to\r | |
513 | the 16-bit I/O port specified by Port. The value written to the I/O port is\r | |
514 | returned. This function must guarantee that all I/O read and write operations\r | |
515 | are serialized. Extra left bits in AndData are stripped.\r | |
516 | \r | |
517 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
518 | If StartBit is greater than 15, then ASSERT().\r | |
519 | If EndBit is greater than 15, then ASSERT().\r | |
520 | If EndBit is less than StartBit, then ASSERT().\r | |
521 | \r | |
522 | @param Port The I/O port to write.\r | |
523 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
524 | Range 0..15.\r | |
525 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
526 | Range 0..15.\r | |
527 | @param AndData The value to AND with the read value from the I/O port.\r | |
528 | \r | |
529 | @return The value written back to the I/O port.\r | |
530 | \r | |
531 | **/\r | |
532 | UINT16\r | |
533 | EFIAPI\r | |
534 | IoBitFieldAnd16 (\r | |
535 | IN UINTN Port,\r | |
536 | IN UINTN StartBit,\r | |
537 | IN UINTN EndBit,\r | |
538 | IN UINT16 AndData\r | |
539 | )\r | |
540 | {\r | |
541 | return IoWrite16 (\r | |
542 | Port,\r | |
543 | BitFieldAnd16 (IoRead16 (Port), StartBit, EndBit, AndData)\r | |
544 | );\r | |
545 | }\r | |
546 | \r | |
547 | /**\r | |
548 | Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r | |
549 | bitwise inclusive OR, and writes the result back to the bit field in the\r | |
550 | 16-bit port.\r | |
551 | \r | |
552 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed\r | |
553 | by a bitwise inclusive OR between the read result and the value specified by\r | |
554 | AndData, and writes the result to the 16-bit I/O port specified by Port. The\r | |
555 | value written to the I/O port is returned. This function must guarantee that\r | |
556 | all I/O read and write operations are serialized. Extra left bits in both\r | |
557 | AndData and OrData are stripped.\r | |
558 | \r | |
559 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
560 | If StartBit is greater than 15, then ASSERT().\r | |
561 | If EndBit is greater than 15, then ASSERT().\r | |
562 | If EndBit is less than StartBit, then ASSERT().\r | |
563 | \r | |
564 | @param Port The I/O port to write.\r | |
565 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
566 | Range 0..15.\r | |
567 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
568 | Range 0..15.\r | |
569 | @param AndData The value to AND with the read value from the I/O port.\r | |
570 | @param OrData The value to OR with the result of the AND operation.\r | |
571 | \r | |
572 | @return The value written back to the I/O port.\r | |
573 | \r | |
574 | **/\r | |
575 | UINT16\r | |
576 | EFIAPI\r | |
577 | IoBitFieldAndThenOr16 (\r | |
578 | IN UINTN Port,\r | |
579 | IN UINTN StartBit,\r | |
580 | IN UINTN EndBit,\r | |
581 | IN UINT16 AndData,\r | |
582 | IN UINT16 OrData\r | |
583 | )\r | |
584 | {\r | |
585 | return IoWrite16 (\r | |
586 | Port,\r | |
587 | BitFieldAndThenOr16 (IoRead16 (Port), StartBit, EndBit, AndData, OrData)\r | |
588 | );\r | |
589 | }\r | |
590 | \r | |
591 | /**\r | |
592 | Reads a 32-bit I/O port, performs a bitwise inclusive OR, and writes the\r | |
593 | result back to the 32-bit I/O port.\r | |
594 | \r | |
595 | Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR\r | |
596 | between the read result and the value specified by OrData, and writes the\r | |
597 | result to the 32-bit I/O port specified by Port. The value written to the I/O\r | |
598 | port is returned. This function must guarantee that all I/O read and write\r | |
599 | operations are serialized.\r | |
600 | \r | |
601 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
602 | \r | |
603 | @param Port The I/O port to write.\r | |
604 | @param OrData The value to OR with the read value from the I/O port.\r | |
605 | \r | |
606 | @return The value written back to the I/O port.\r | |
607 | \r | |
608 | **/\r | |
609 | UINT32\r | |
610 | EFIAPI\r | |
611 | IoOr32 (\r | |
612 | IN UINTN Port,\r | |
613 | IN UINT32 OrData\r | |
614 | )\r | |
615 | {\r | |
616 | return IoWrite32 (Port, IoRead32 (Port) | OrData);\r | |
617 | }\r | |
618 | \r | |
619 | /**\r | |
620 | Reads a 32-bit I/O port, performs a bitwise AND, and writes the result back\r | |
621 | to the 32-bit I/O port.\r | |
622 | \r | |
623 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r | |
624 | the read result and the value specified by AndData, and writes the result to\r | |
625 | the 32-bit I/O port specified by Port. The value written to the I/O port is\r | |
626 | returned. This function must guarantee that all I/O read and write operations\r | |
627 | are serialized.\r | |
628 | \r | |
629 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
630 | \r | |
631 | @param Port The I/O port to write.\r | |
632 | @param AndData The value to AND with the read value from the I/O port.\r | |
633 | \r | |
634 | @return The value written back to the I/O port.\r | |
635 | \r | |
636 | **/\r | |
637 | UINT32\r | |
638 | EFIAPI\r | |
639 | IoAnd32 (\r | |
640 | IN UINTN Port,\r | |
641 | IN UINT32 AndData\r | |
642 | )\r | |
643 | {\r | |
644 | return IoWrite32 (Port, IoRead32 (Port) & AndData);\r | |
645 | }\r | |
646 | \r | |
647 | /**\r | |
648 | Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise\r | |
649 | inclusive OR, and writes the result back to the 32-bit I/O port.\r | |
650 | \r | |
651 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r | |
652 | the read result and the value specified by AndData, performs a bitwise OR\r | |
653 | between the result of the AND operation and the value specified by OrData,\r | |
654 | and writes the result to the 32-bit I/O port specified by Port. The value\r | |
655 | written to the I/O port is returned. This function must guarantee that all\r | |
656 | I/O read and write operations are serialized.\r | |
657 | \r | |
658 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
659 | \r | |
660 | @param Port The I/O port to write.\r | |
661 | @param AndData The value to AND with the read value from the I/O port.\r | |
662 | @param OrData The value to OR with the result of the AND operation.\r | |
663 | \r | |
664 | @return The value written back to the I/O port.\r | |
665 | \r | |
666 | **/\r | |
667 | UINT32\r | |
668 | EFIAPI\r | |
669 | IoAndThenOr32 (\r | |
670 | IN UINTN Port,\r | |
671 | IN UINT32 AndData,\r | |
672 | IN UINT32 OrData\r | |
673 | )\r | |
674 | {\r | |
675 | return IoWrite32 (Port, (IoRead32 (Port) & AndData) | OrData);\r | |
676 | }\r | |
677 | \r | |
678 | /**\r | |
679 | Reads a bit field of an I/O register.\r | |
680 | \r | |
681 | Reads the bit field in a 32-bit I/O register. The bit field is specified by\r | |
682 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
683 | \r | |
684 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
685 | If StartBit is greater than 31, then ASSERT().\r | |
686 | If EndBit is greater than 31, then ASSERT().\r | |
687 | If EndBit is less than StartBit, then ASSERT().\r | |
688 | \r | |
689 | @param Port The I/O port to read.\r | |
690 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
691 | Range 0..31.\r | |
692 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
693 | Range 0..31.\r | |
694 | \r | |
695 | @return The value read.\r | |
696 | \r | |
697 | **/\r | |
698 | UINT32\r | |
699 | EFIAPI\r | |
700 | IoBitFieldRead32 (\r | |
701 | IN UINTN Port,\r | |
702 | IN UINTN StartBit,\r | |
703 | IN UINTN EndBit\r | |
704 | )\r | |
705 | {\r | |
706 | return BitFieldRead32 (IoRead32 (Port), StartBit, EndBit);\r | |
707 | }\r | |
708 | \r | |
709 | /**\r | |
710 | Writes a bit field to an I/O register.\r | |
711 | \r | |
712 | Writes Value to the bit field of the I/O register. The bit field is specified\r | |
713 | by the StartBit and the EndBit. All other bits in the destination I/O\r | |
714 | register are preserved. The value written to the I/O port is returned. Extra\r | |
715 | left bits in Value are stripped.\r | |
716 | \r | |
717 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
718 | If StartBit is greater than 31, then ASSERT().\r | |
719 | If EndBit is greater than 31, then ASSERT().\r | |
720 | If EndBit is less than StartBit, then ASSERT().\r | |
721 | \r | |
722 | @param Port The I/O port to write.\r | |
723 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
724 | Range 0..31.\r | |
725 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
726 | Range 0..31.\r | |
727 | @param Value New value of the bit field.\r | |
728 | \r | |
729 | @return The value written back to the I/O port.\r | |
730 | \r | |
731 | **/\r | |
732 | UINT32\r | |
733 | EFIAPI\r | |
734 | IoBitFieldWrite32 (\r | |
735 | IN UINTN Port,\r | |
736 | IN UINTN StartBit,\r | |
737 | IN UINTN EndBit,\r | |
738 | IN UINT32 Value\r | |
739 | )\r | |
740 | {\r | |
741 | return IoWrite32 (\r | |
742 | Port,\r | |
743 | BitFieldWrite32 (IoRead32 (Port), StartBit, EndBit, Value)\r | |
744 | );\r | |
745 | }\r | |
746 | \r | |
747 | /**\r | |
748 | Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the\r | |
749 | result back to the bit field in the 32-bit port.\r | |
750 | \r | |
751 | Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR\r | |
752 | between the read result and the value specified by OrData, and writes the\r | |
753 | result to the 32-bit I/O port specified by Port. The value written to the I/O\r | |
754 | port is returned. This function must guarantee that all I/O read and write\r | |
755 | operations are serialized. Extra left bits in OrData are stripped.\r | |
756 | \r | |
757 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
758 | If StartBit is greater than 31, then ASSERT().\r | |
759 | If EndBit is greater than 31, then ASSERT().\r | |
760 | If EndBit is less than StartBit, then ASSERT().\r | |
761 | \r | |
762 | @param Port The I/O port to write.\r | |
763 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
764 | Range 0..31.\r | |
765 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
766 | Range 0..31.\r | |
767 | @param OrData The value to OR with the read value from the I/O port.\r | |
768 | \r | |
769 | @return The value written back to the I/O port.\r | |
770 | \r | |
771 | **/\r | |
772 | UINT32\r | |
773 | EFIAPI\r | |
774 | IoBitFieldOr32 (\r | |
775 | IN UINTN Port,\r | |
776 | IN UINTN StartBit,\r | |
777 | IN UINTN EndBit,\r | |
778 | IN UINT32 OrData\r | |
779 | )\r | |
780 | {\r | |
781 | return IoWrite32 (\r | |
782 | Port,\r | |
783 | BitFieldOr32 (IoRead32 (Port), StartBit, EndBit, OrData)\r | |
784 | );\r | |
785 | }\r | |
786 | \r | |
787 | /**\r | |
788 | Reads a bit field in a 32-bit port, performs a bitwise AND, and writes the\r | |
789 | result back to the bit field in the 32-bit port.\r | |
790 | \r | |
791 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r | |
792 | the read result and the value specified by AndData, and writes the result to\r | |
793 | the 32-bit I/O port specified by Port. The value written to the I/O port is\r | |
794 | returned. This function must guarantee that all I/O read and write operations\r | |
795 | are serialized. Extra left bits in AndData are stripped.\r | |
796 | \r | |
797 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
798 | If StartBit is greater than 31, then ASSERT().\r | |
799 | If EndBit is greater than 31, then ASSERT().\r | |
800 | If EndBit is less than StartBit, then ASSERT().\r | |
801 | \r | |
802 | @param Port The I/O port to write.\r | |
803 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
804 | Range 0..31.\r | |
805 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
806 | Range 0..31.\r | |
807 | @param AndData The value to AND with the read value from the I/O port.\r | |
808 | \r | |
809 | @return The value written back to the I/O port.\r | |
810 | \r | |
811 | **/\r | |
812 | UINT32\r | |
813 | EFIAPI\r | |
814 | IoBitFieldAnd32 (\r | |
815 | IN UINTN Port,\r | |
816 | IN UINTN StartBit,\r | |
817 | IN UINTN EndBit,\r | |
818 | IN UINT32 AndData\r | |
819 | )\r | |
820 | {\r | |
821 | return IoWrite32 (\r | |
822 | Port,\r | |
823 | BitFieldAnd32 (IoRead32 (Port), StartBit, EndBit, AndData)\r | |
824 | );\r | |
825 | }\r | |
826 | \r | |
827 | /**\r | |
828 | Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r | |
829 | bitwise inclusive OR, and writes the result back to the bit field in the\r | |
830 | 32-bit port.\r | |
831 | \r | |
832 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed\r | |
833 | by a bitwise inclusive OR between the read result and the value specified by\r | |
834 | AndData, and writes the result to the 32-bit I/O port specified by Port. The\r | |
835 | value written to the I/O port is returned. This function must guarantee that\r | |
836 | all I/O read and write operations are serialized. Extra left bits in both\r | |
837 | AndData and OrData are stripped.\r | |
838 | \r | |
839 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
840 | If StartBit is greater than 31, then ASSERT().\r | |
841 | If EndBit is greater than 31, then ASSERT().\r | |
842 | If EndBit is less than StartBit, then ASSERT().\r | |
843 | \r | |
844 | @param Port The I/O port to write.\r | |
845 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
846 | Range 0..31.\r | |
847 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
848 | Range 0..31.\r | |
849 | @param AndData The value to AND with the read value from the I/O port.\r | |
850 | @param OrData The value to OR with the result of the AND operation.\r | |
851 | \r | |
852 | @return The value written back to the I/O port.\r | |
853 | \r | |
854 | **/\r | |
855 | UINT32\r | |
856 | EFIAPI\r | |
857 | IoBitFieldAndThenOr32 (\r | |
858 | IN UINTN Port,\r | |
859 | IN UINTN StartBit,\r | |
860 | IN UINTN EndBit,\r | |
861 | IN UINT32 AndData,\r | |
862 | IN UINT32 OrData\r | |
863 | )\r | |
864 | {\r | |
865 | return IoWrite32 (\r | |
866 | Port,\r | |
867 | BitFieldAndThenOr32 (IoRead32 (Port), StartBit, EndBit, AndData, OrData)\r | |
868 | );\r | |
869 | }\r | |
870 | \r | |
871 | /**\r | |
872 | Reads a 64-bit I/O port, performs a bitwise inclusive OR, and writes the\r | |
873 | result back to the 64-bit I/O port.\r | |
874 | \r | |
875 | Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR\r | |
876 | between the read result and the value specified by OrData, and writes the\r | |
877 | result to the 64-bit I/O port specified by Port. The value written to the I/O\r | |
878 | port is returned. This function must guarantee that all I/O read and write\r | |
879 | operations are serialized.\r | |
880 | \r | |
881 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
882 | \r | |
883 | @param Port The I/O port to write.\r | |
884 | @param OrData The value to OR with the read value from the I/O port.\r | |
885 | \r | |
886 | @return The value written back to the I/O port.\r | |
887 | \r | |
888 | **/\r | |
889 | UINT64\r | |
890 | EFIAPI\r | |
891 | IoOr64 (\r | |
892 | IN UINTN Port,\r | |
893 | IN UINT64 OrData\r | |
894 | )\r | |
895 | {\r | |
896 | return IoWrite64 (Port, IoRead64 (Port) | OrData);\r | |
897 | }\r | |
898 | \r | |
899 | /**\r | |
900 | Reads a 64-bit I/O port, performs a bitwise AND, and writes the result back\r | |
901 | to the 64-bit I/O port.\r | |
902 | \r | |
903 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r | |
904 | the read result and the value specified by AndData, and writes the result to\r | |
905 | the 64-bit I/O port specified by Port. The value written to the I/O port is\r | |
906 | returned. This function must guarantee that all I/O read and write operations\r | |
907 | are serialized.\r | |
908 | \r | |
909 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
910 | \r | |
911 | @param Port The I/O port to write.\r | |
912 | @param AndData The value to AND with the read value from the I/O port.\r | |
913 | \r | |
914 | @return The value written back to the I/O port.\r | |
915 | \r | |
916 | **/\r | |
917 | UINT64\r | |
918 | EFIAPI\r | |
919 | IoAnd64 (\r | |
920 | IN UINTN Port,\r | |
921 | IN UINT64 AndData\r | |
922 | )\r | |
923 | {\r | |
924 | return IoWrite64 (Port, IoRead64 (Port) & AndData);\r | |
925 | }\r | |
926 | \r | |
927 | /**\r | |
928 | Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise\r | |
929 | inclusive OR, and writes the result back to the 64-bit I/O port.\r | |
930 | \r | |
931 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r | |
932 | the read result and the value specified by AndData, performs a bitwise OR\r | |
933 | between the result of the AND operation and the value specified by OrData,\r | |
934 | and writes the result to the 64-bit I/O port specified by Port. The value\r | |
935 | written to the I/O port is returned. This function must guarantee that all\r | |
936 | I/O read and write operations are serialized.\r | |
937 | \r | |
938 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
939 | \r | |
940 | @param Port The I/O port to write.\r | |
941 | @param AndData The value to AND with the read value from the I/O port.\r | |
942 | @param OrData The value to OR with the result of the AND operation.\r | |
943 | \r | |
944 | @return The value written back to the I/O port.\r | |
945 | \r | |
946 | **/\r | |
947 | UINT64\r | |
948 | EFIAPI\r | |
949 | IoAndThenOr64 (\r | |
950 | IN UINTN Port,\r | |
951 | IN UINT64 AndData,\r | |
952 | IN UINT64 OrData\r | |
953 | )\r | |
954 | {\r | |
955 | return IoWrite64 (Port, (IoRead64 (Port) & AndData) | OrData);\r | |
956 | }\r | |
957 | \r | |
958 | /**\r | |
959 | Reads a bit field of an I/O register.\r | |
960 | \r | |
961 | Reads the bit field in a 64-bit I/O register. The bit field is specified by\r | |
962 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
963 | \r | |
964 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
965 | If StartBit is greater than 63, then ASSERT().\r | |
966 | If EndBit is greater than 63, then ASSERT().\r | |
967 | If EndBit is less than StartBit, then ASSERT().\r | |
968 | \r | |
969 | @param Port The I/O port to read.\r | |
970 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
971 | Range 0..63.\r | |
972 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
973 | Range 0..63.\r | |
974 | \r | |
975 | @return The value read.\r | |
976 | \r | |
977 | **/\r | |
978 | UINT64\r | |
979 | EFIAPI\r | |
980 | IoBitFieldRead64 (\r | |
981 | IN UINTN Port,\r | |
982 | IN UINTN StartBit,\r | |
983 | IN UINTN EndBit\r | |
984 | )\r | |
985 | {\r | |
986 | return BitFieldRead64 (IoRead64 (Port), StartBit, EndBit);\r | |
987 | }\r | |
988 | \r | |
989 | /**\r | |
990 | Writes a bit field to an I/O register.\r | |
991 | \r | |
992 | Writes Value to the bit field of the I/O register. The bit field is specified\r | |
993 | by the StartBit and the EndBit. All other bits in the destination I/O\r | |
994 | register are preserved. The value written to the I/O port is returned. Extra\r | |
995 | left bits in Value are stripped.\r | |
996 | \r | |
997 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
998 | If StartBit is greater than 63, then ASSERT().\r | |
999 | If EndBit is greater than 63, then ASSERT().\r | |
1000 | If EndBit is less than StartBit, then ASSERT().\r | |
1001 | \r | |
1002 | @param Port The I/O port to write.\r | |
1003 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1004 | Range 0..63.\r | |
1005 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1006 | Range 0..63.\r | |
1007 | @param Value New value of the bit field.\r | |
1008 | \r | |
1009 | @return The value written back to the I/O port.\r | |
1010 | \r | |
1011 | **/\r | |
1012 | UINT64\r | |
1013 | EFIAPI\r | |
1014 | IoBitFieldWrite64 (\r | |
1015 | IN UINTN Port,\r | |
1016 | IN UINTN StartBit,\r | |
1017 | IN UINTN EndBit,\r | |
1018 | IN UINT64 Value\r | |
1019 | )\r | |
1020 | {\r | |
1021 | return IoWrite64 (\r | |
1022 | Port,\r | |
1023 | BitFieldWrite64 (IoRead64 (Port), StartBit, EndBit, Value)\r | |
1024 | );\r | |
1025 | }\r | |
1026 | \r | |
1027 | /**\r | |
1028 | Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the\r | |
1029 | result back to the bit field in the 64-bit port.\r | |
1030 | \r | |
1031 | Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR\r | |
1032 | between the read result and the value specified by OrData, and writes the\r | |
1033 | result to the 64-bit I/O port specified by Port. The value written to the I/O\r | |
1034 | port is returned. This function must guarantee that all I/O read and write\r | |
1035 | operations are serialized. Extra left bits in OrData are stripped.\r | |
1036 | \r | |
1037 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
1038 | If StartBit is greater than 63, then ASSERT().\r | |
1039 | If EndBit is greater than 63, then ASSERT().\r | |
1040 | If EndBit is less than StartBit, then ASSERT().\r | |
1041 | \r | |
1042 | @param Port The I/O port to write.\r | |
1043 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1044 | Range 0..63.\r | |
1045 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1046 | Range 0..63.\r | |
1047 | @param OrData The value to OR with the read value from the I/O port.\r | |
1048 | \r | |
1049 | @return The value written back to the I/O port.\r | |
1050 | \r | |
1051 | **/\r | |
1052 | UINT64\r | |
1053 | EFIAPI\r | |
1054 | IoBitFieldOr64 (\r | |
1055 | IN UINTN Port,\r | |
1056 | IN UINTN StartBit,\r | |
1057 | IN UINTN EndBit,\r | |
1058 | IN UINT64 OrData\r | |
1059 | )\r | |
1060 | {\r | |
1061 | return IoWrite64 (\r | |
1062 | Port,\r | |
1063 | BitFieldOr64 (IoRead64 (Port), StartBit, EndBit, OrData)\r | |
1064 | );\r | |
1065 | }\r | |
1066 | \r | |
1067 | /**\r | |
1068 | Reads a bit field in a 64-bit port, performs a bitwise AND, and writes the\r | |
1069 | result back to the bit field in the 64-bit port.\r | |
1070 | \r | |
1071 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r | |
1072 | the read result and the value specified by AndData, and writes the result to\r | |
1073 | the 64-bit I/O port specified by Port. The value written to the I/O port is\r | |
1074 | returned. This function must guarantee that all I/O read and write operations\r | |
1075 | are serialized. Extra left bits in AndData are stripped.\r | |
1076 | \r | |
1077 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
1078 | If StartBit is greater than 63, then ASSERT().\r | |
1079 | If EndBit is greater than 63, then ASSERT().\r | |
1080 | If EndBit is less than StartBit, then ASSERT().\r | |
1081 | \r | |
1082 | @param Port The I/O port to write.\r | |
1083 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1084 | Range 0..63.\r | |
1085 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1086 | Range 0..63.\r | |
1087 | @param AndData The value to AND with the read value from the I/O port.\r | |
1088 | \r | |
1089 | @return The value written back to the I/O port.\r | |
1090 | \r | |
1091 | **/\r | |
1092 | UINT64\r | |
1093 | EFIAPI\r | |
1094 | IoBitFieldAnd64 (\r | |
1095 | IN UINTN Port,\r | |
1096 | IN UINTN StartBit,\r | |
1097 | IN UINTN EndBit,\r | |
1098 | IN UINT64 AndData\r | |
1099 | )\r | |
1100 | {\r | |
1101 | return IoWrite64 (\r | |
1102 | Port,\r | |
1103 | BitFieldAnd64 (IoRead64 (Port), StartBit, EndBit, AndData)\r | |
1104 | );\r | |
1105 | }\r | |
1106 | \r | |
1107 | /**\r | |
1108 | Reads a bit field in a 64-bit port, performs a bitwise AND followed by a\r | |
1109 | bitwise inclusive OR, and writes the result back to the bit field in the\r | |
1110 | 64-bit port.\r | |
1111 | \r | |
1112 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed\r | |
1113 | by a bitwise inclusive OR between the read result and the value specified by\r | |
1114 | AndData, and writes the result to the 64-bit I/O port specified by Port. The\r | |
1115 | value written to the I/O port is returned. This function must guarantee that\r | |
1116 | all I/O read and write operations are serialized. Extra left bits in both\r | |
1117 | AndData and OrData are stripped.\r | |
1118 | \r | |
1119 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
1120 | If StartBit is greater than 63, then ASSERT().\r | |
1121 | If EndBit is greater than 63, then ASSERT().\r | |
1122 | If EndBit is less than StartBit, then ASSERT().\r | |
1123 | \r | |
1124 | @param Port The I/O port to write.\r | |
1125 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1126 | Range 0..63.\r | |
1127 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1128 | Range 0..63.\r | |
1129 | @param AndData The value to AND with the read value from the I/O port.\r | |
1130 | @param OrData The value to OR with the result of the AND operation.\r | |
1131 | \r | |
1132 | @return The value written back to the I/O port.\r | |
1133 | \r | |
1134 | **/\r | |
1135 | UINT64\r | |
1136 | EFIAPI\r | |
1137 | IoBitFieldAndThenOr64 (\r | |
1138 | IN UINTN Port,\r | |
1139 | IN UINTN StartBit,\r | |
1140 | IN UINTN EndBit,\r | |
1141 | IN UINT64 AndData,\r | |
1142 | IN UINT64 OrData\r | |
1143 | )\r | |
1144 | {\r | |
1145 | return IoWrite64 (\r | |
1146 | Port,\r | |
1147 | BitFieldAndThenOr64 (IoRead64 (Port), StartBit, EndBit, AndData, OrData)\r | |
1148 | );\r | |
1149 | }\r | |
1150 | \r | |
1151 | /**\r | |
1152 | Reads an 8-bit MMIO register, performs a bitwise inclusive OR, and writes the\r | |
1153 | result back to the 8-bit MMIO register.\r | |
1154 | \r | |
1155 | Reads the 8-bit MMIO register specified by Address, performs a bitwise\r | |
1156 | inclusive OR between the read result and the value specified by OrData, and\r | |
1157 | writes the result to the 8-bit MMIO register specified by Address. The value\r | |
1158 | written to the MMIO register is returned. This function must guarantee that\r | |
1159 | all MMIO read and write operations are serialized.\r | |
1160 | \r | |
1161 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
1162 | \r | |
1163 | @param Address The MMIO register to write.\r | |
1164 | @param OrData The value to OR with the read value from the MMIO register.\r | |
1165 | \r | |
1166 | @return The value written back to the MMIO register.\r | |
1167 | \r | |
1168 | **/\r | |
1169 | UINT8\r | |
1170 | EFIAPI\r | |
1171 | MmioOr8 (\r | |
1172 | IN UINTN Address,\r | |
1173 | IN UINT8 OrData\r | |
1174 | )\r | |
1175 | {\r | |
1176 | return MmioWrite8 (Address, (UINT8) (MmioRead8 (Address) | OrData));\r | |
1177 | }\r | |
1178 | \r | |
1179 | /**\r | |
1180 | Reads an 8-bit MMIO register, performs a bitwise AND, and writes the result\r | |
1181 | back to the 8-bit MMIO register.\r | |
1182 | \r | |
1183 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r | |
1184 | between the read result and the value specified by AndData, and writes the\r | |
1185 | result to the 8-bit MMIO register specified by Address. The value written to\r | |
1186 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
1187 | read and write operations are serialized.\r | |
1188 | \r | |
1189 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
1190 | \r | |
1191 | @param Address The MMIO register to write.\r | |
1192 | @param AndData The value to AND with the read value from the MMIO register.\r | |
1193 | \r | |
1194 | @return The value written back to the MMIO register.\r | |
1195 | \r | |
1196 | **/\r | |
1197 | UINT8\r | |
1198 | EFIAPI\r | |
1199 | MmioAnd8 (\r | |
1200 | IN UINTN Address,\r | |
1201 | IN UINT8 AndData\r | |
1202 | )\r | |
1203 | {\r | |
1204 | return MmioWrite8 (Address, (UINT8) (MmioRead8 (Address) & AndData));\r | |
1205 | }\r | |
1206 | \r | |
1207 | /**\r | |
1208 | Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise\r | |
1209 | inclusive OR, and writes the result back to the 8-bit MMIO register.\r | |
1210 | \r | |
1211 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r | |
1212 | between the read result and the value specified by AndData, performs a\r | |
1213 | bitwise OR between the result of the AND operation and the value specified by\r | |
1214 | OrData, and writes the result to the 8-bit MMIO register specified by\r | |
1215 | Address. The value written to the MMIO register is returned. This function\r | |
1216 | must guarantee that all MMIO read and write operations are serialized.\r | |
1217 | \r | |
1218 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
1219 | \r | |
1220 | \r | |
1221 | @param Address The MMIO register to write.\r | |
1222 | @param AndData The value to AND with the read value from the MMIO register.\r | |
1223 | @param OrData The value to OR with the result of the AND operation.\r | |
1224 | \r | |
1225 | @return The value written back to the MMIO register.\r | |
1226 | \r | |
1227 | **/\r | |
1228 | UINT8\r | |
1229 | EFIAPI\r | |
1230 | MmioAndThenOr8 (\r | |
1231 | IN UINTN Address,\r | |
1232 | IN UINT8 AndData,\r | |
1233 | IN UINT8 OrData\r | |
1234 | )\r | |
1235 | {\r | |
1236 | return MmioWrite8 (Address, (UINT8) ((MmioRead8 (Address) & AndData) | OrData));\r | |
1237 | }\r | |
1238 | \r | |
1239 | /**\r | |
1240 | Reads a bit field of a MMIO register.\r | |
1241 | \r | |
1242 | Reads the bit field in an 8-bit MMIO register. The bit field is specified by\r | |
1243 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
1244 | \r | |
1245 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
1246 | If StartBit is greater than 7, then ASSERT().\r | |
1247 | If EndBit is greater than 7, then ASSERT().\r | |
1248 | If EndBit is less than StartBit, then ASSERT().\r | |
1249 | \r | |
1250 | @param Address MMIO register to read.\r | |
1251 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1252 | Range 0..7.\r | |
1253 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1254 | Range 0..7.\r | |
1255 | \r | |
1256 | @return The value read.\r | |
1257 | \r | |
1258 | **/\r | |
1259 | UINT8\r | |
1260 | EFIAPI\r | |
1261 | MmioBitFieldRead8 (\r | |
1262 | IN UINTN Address,\r | |
1263 | IN UINTN StartBit,\r | |
1264 | IN UINTN EndBit\r | |
1265 | )\r | |
1266 | {\r | |
1267 | return BitFieldRead8 (MmioRead8 (Address), StartBit, EndBit);\r | |
1268 | }\r | |
1269 | \r | |
1270 | /**\r | |
1271 | Writes a bit field to a MMIO register.\r | |
1272 | \r | |
1273 | Writes Value to the bit field of the MMIO register. The bit field is\r | |
1274 | specified by the StartBit and the EndBit. All other bits in the destination\r | |
1275 | MMIO register are preserved. The new value of the 8-bit register is returned.\r | |
1276 | \r | |
1277 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
1278 | If StartBit is greater than 7, then ASSERT().\r | |
1279 | If EndBit is greater than 7, then ASSERT().\r | |
1280 | If EndBit is less than StartBit, then ASSERT().\r | |
1281 | \r | |
1282 | @param Address MMIO register to write.\r | |
1283 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1284 | Range 0..7.\r | |
1285 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1286 | Range 0..7.\r | |
1287 | @param Value New value of the bit field.\r | |
1288 | \r | |
1289 | @return The value written back to the MMIO register.\r | |
1290 | \r | |
1291 | **/\r | |
1292 | UINT8\r | |
1293 | EFIAPI\r | |
1294 | MmioBitFieldWrite8 (\r | |
1295 | IN UINTN Address,\r | |
1296 | IN UINTN StartBit,\r | |
1297 | IN UINTN EndBit,\r | |
1298 | IN UINT8 Value\r | |
1299 | )\r | |
1300 | {\r | |
1301 | return MmioWrite8 (\r | |
1302 | Address,\r | |
1303 | BitFieldWrite8 (MmioRead8 (Address), StartBit, EndBit, Value)\r | |
1304 | );\r | |
1305 | }\r | |
1306 | \r | |
1307 | /**\r | |
1308 | Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and\r | |
1309 | writes the result back to the bit field in the 8-bit MMIO register.\r | |
1310 | \r | |
1311 | Reads the 8-bit MMIO register specified by Address, performs a bitwise\r | |
1312 | inclusive OR between the read result and the value specified by OrData, and\r | |
1313 | writes the result to the 8-bit MMIO register specified by Address. The value\r | |
1314 | written to the MMIO register is returned. This function must guarantee that\r | |
1315 | all MMIO read and write operations are serialized. Extra left bits in OrData\r | |
1316 | are stripped.\r | |
1317 | \r | |
1318 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
1319 | If StartBit is greater than 7, then ASSERT().\r | |
1320 | If EndBit is greater than 7, then ASSERT().\r | |
1321 | If EndBit is less than StartBit, then ASSERT().\r | |
1322 | \r | |
1323 | @param Address MMIO register to write.\r | |
1324 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1325 | Range 0..7.\r | |
1326 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1327 | Range 0..7.\r | |
1328 | @param OrData The value to OR with read value from the MMIO register.\r | |
1329 | \r | |
1330 | @return The value written back to the MMIO register.\r | |
1331 | \r | |
1332 | **/\r | |
1333 | UINT8\r | |
1334 | EFIAPI\r | |
1335 | MmioBitFieldOr8 (\r | |
1336 | IN UINTN Address,\r | |
1337 | IN UINTN StartBit,\r | |
1338 | IN UINTN EndBit,\r | |
1339 | IN UINT8 OrData\r | |
1340 | )\r | |
1341 | {\r | |
1342 | return MmioWrite8 (\r | |
1343 | Address,\r | |
1344 | BitFieldOr8 (MmioRead8 (Address), StartBit, EndBit, OrData)\r | |
1345 | );\r | |
1346 | }\r | |
1347 | \r | |
1348 | /**\r | |
1349 | Reads a bit field in an 8-bit MMIO register, performs a bitwise AND, and\r | |
1350 | writes the result back to the bit field in the 8-bit MMIO register.\r | |
1351 | \r | |
1352 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r | |
1353 | between the read result and the value specified by AndData, and writes the\r | |
1354 | result to the 8-bit MMIO register specified by Address. The value written to\r | |
1355 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
1356 | read and write operations are serialized. Extra left bits in AndData are\r | |
1357 | stripped.\r | |
1358 | \r | |
1359 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
1360 | If StartBit is greater than 7, then ASSERT().\r | |
1361 | If EndBit is greater than 7, then ASSERT().\r | |
1362 | If EndBit is less than StartBit, then ASSERT().\r | |
1363 | \r | |
1364 | @param Address MMIO register to write.\r | |
1365 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1366 | Range 0..7.\r | |
1367 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1368 | Range 0..7.\r | |
1369 | @param AndData The value to AND with read value from the MMIO register.\r | |
1370 | \r | |
1371 | @return The value written back to the MMIO register.\r | |
1372 | \r | |
1373 | **/\r | |
1374 | UINT8\r | |
1375 | EFIAPI\r | |
1376 | MmioBitFieldAnd8 (\r | |
1377 | IN UINTN Address,\r | |
1378 | IN UINTN StartBit,\r | |
1379 | IN UINTN EndBit,\r | |
1380 | IN UINT8 AndData\r | |
1381 | )\r | |
1382 | {\r | |
1383 | return MmioWrite8 (\r | |
1384 | Address,\r | |
1385 | BitFieldAnd8 (MmioRead8 (Address), StartBit, EndBit, AndData)\r | |
1386 | );\r | |
1387 | }\r | |
1388 | \r | |
1389 | /**\r | |
1390 | Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed\r | |
1391 | by a bitwise inclusive OR, and writes the result back to the bit field in the\r | |
1392 | 8-bit MMIO register.\r | |
1393 | \r | |
1394 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r | |
1395 | followed by a bitwise inclusive OR between the read result and the value\r | |
1396 | specified by AndData, and writes the result to the 8-bit MMIO register\r | |
1397 | specified by Address. The value written to the MMIO register is returned.\r | |
1398 | This function must guarantee that all MMIO read and write operations are\r | |
1399 | serialized. Extra left bits in both AndData and OrData are stripped.\r | |
1400 | \r | |
1401 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
1402 | If StartBit is greater than 7, then ASSERT().\r | |
1403 | If EndBit is greater than 7, then ASSERT().\r | |
1404 | If EndBit is less than StartBit, then ASSERT().\r | |
1405 | \r | |
1406 | @param Address MMIO register to write.\r | |
1407 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1408 | Range 0..7.\r | |
1409 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1410 | Range 0..7.\r | |
1411 | @param AndData The value to AND with read value from the MMIO register.\r | |
1412 | @param OrData The value to OR with the result of the AND operation.\r | |
1413 | \r | |
1414 | @return The value written back to the MMIO register.\r | |
1415 | \r | |
1416 | **/\r | |
1417 | UINT8\r | |
1418 | EFIAPI\r | |
1419 | MmioBitFieldAndThenOr8 (\r | |
1420 | IN UINTN Address,\r | |
1421 | IN UINTN StartBit,\r | |
1422 | IN UINTN EndBit,\r | |
1423 | IN UINT8 AndData,\r | |
1424 | IN UINT8 OrData\r | |
1425 | )\r | |
1426 | {\r | |
1427 | return MmioWrite8 (\r | |
1428 | Address,\r | |
1429 | BitFieldAndThenOr8 (MmioRead8 (Address), StartBit, EndBit, AndData, OrData)\r | |
1430 | );\r | |
1431 | }\r | |
1432 | \r | |
1433 | /**\r | |
1434 | Reads a 16-bit MMIO register, performs a bitwise inclusive OR, and writes the\r | |
1435 | result back to the 16-bit MMIO register.\r | |
1436 | \r | |
1437 | Reads the 16-bit MMIO register specified by Address, performs a bitwise\r | |
1438 | inclusive OR between the read result and the value specified by OrData, and\r | |
1439 | writes the result to the 16-bit MMIO register specified by Address. The value\r | |
1440 | written to the MMIO register is returned. This function must guarantee that\r | |
1441 | all MMIO read and write operations are serialized.\r | |
1442 | \r | |
1443 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
1444 | \r | |
1445 | @param Address The MMIO register to write.\r | |
1446 | @param OrData The value to OR with the read value from the MMIO register.\r | |
1447 | \r | |
1448 | @return The value written back to the MMIO register.\r | |
1449 | \r | |
1450 | **/\r | |
1451 | UINT16\r | |
1452 | EFIAPI\r | |
1453 | MmioOr16 (\r | |
1454 | IN UINTN Address,\r | |
1455 | IN UINT16 OrData\r | |
1456 | )\r | |
1457 | {\r | |
1458 | return MmioWrite16 (Address, (UINT16) (MmioRead16 (Address) | OrData));\r | |
1459 | }\r | |
1460 | \r | |
1461 | /**\r | |
1462 | Reads a 16-bit MMIO register, performs a bitwise AND, and writes the result\r | |
1463 | back to the 16-bit MMIO register.\r | |
1464 | \r | |
1465 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r | |
1466 | between the read result and the value specified by AndData, and writes the\r | |
1467 | result to the 16-bit MMIO register specified by Address. The value written to\r | |
1468 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
1469 | read and write operations are serialized.\r | |
1470 | \r | |
1471 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
1472 | \r | |
1473 | @param Address The MMIO register to write.\r | |
1474 | @param AndData The value to AND with the read value from the MMIO register.\r | |
1475 | \r | |
1476 | @return The value written back to the MMIO register.\r | |
1477 | \r | |
1478 | **/\r | |
1479 | UINT16\r | |
1480 | EFIAPI\r | |
1481 | MmioAnd16 (\r | |
1482 | IN UINTN Address,\r | |
1483 | IN UINT16 AndData\r | |
1484 | )\r | |
1485 | {\r | |
1486 | return MmioWrite16 (Address, (UINT16) (MmioRead16 (Address) & AndData));\r | |
1487 | }\r | |
1488 | \r | |
1489 | /**\r | |
1490 | Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise\r | |
1491 | inclusive OR, and writes the result back to the 16-bit MMIO register.\r | |
1492 | \r | |
1493 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r | |
1494 | between the read result and the value specified by AndData, performs a\r | |
1495 | bitwise OR between the result of the AND operation and the value specified by\r | |
1496 | OrData, and writes the result to the 16-bit MMIO register specified by\r | |
1497 | Address. The value written to the MMIO register is returned. This function\r | |
1498 | must guarantee that all MMIO read and write operations are serialized.\r | |
1499 | \r | |
1500 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
1501 | \r | |
1502 | \r | |
1503 | @param Address The MMIO register to write.\r | |
1504 | @param AndData The value to AND with the read value from the MMIO register.\r | |
1505 | @param OrData The value to OR with the result of the AND operation.\r | |
1506 | \r | |
1507 | @return The value written back to the MMIO register.\r | |
1508 | \r | |
1509 | **/\r | |
1510 | UINT16\r | |
1511 | EFIAPI\r | |
1512 | MmioAndThenOr16 (\r | |
1513 | IN UINTN Address,\r | |
1514 | IN UINT16 AndData,\r | |
1515 | IN UINT16 OrData\r | |
1516 | )\r | |
1517 | {\r | |
1518 | return MmioWrite16 (Address, (UINT16) ((MmioRead16 (Address) & AndData) | OrData));\r | |
1519 | }\r | |
1520 | \r | |
1521 | /**\r | |
1522 | Reads a bit field of a MMIO register.\r | |
1523 | \r | |
1524 | Reads the bit field in a 16-bit MMIO register. The bit field is specified by\r | |
1525 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
1526 | \r | |
1527 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
1528 | If StartBit is greater than 15, then ASSERT().\r | |
1529 | If EndBit is greater than 15, then ASSERT().\r | |
1530 | If EndBit is less than StartBit, then ASSERT().\r | |
1531 | \r | |
1532 | @param Address MMIO register to read.\r | |
1533 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1534 | Range 0..15.\r | |
1535 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1536 | Range 0..15.\r | |
1537 | \r | |
1538 | @return The value read.\r | |
1539 | \r | |
1540 | **/\r | |
1541 | UINT16\r | |
1542 | EFIAPI\r | |
1543 | MmioBitFieldRead16 (\r | |
1544 | IN UINTN Address,\r | |
1545 | IN UINTN StartBit,\r | |
1546 | IN UINTN EndBit\r | |
1547 | )\r | |
1548 | {\r | |
1549 | return BitFieldRead16 (MmioRead16 (Address), StartBit, EndBit);\r | |
1550 | }\r | |
1551 | \r | |
1552 | /**\r | |
1553 | Writes a bit field to a MMIO register.\r | |
1554 | \r | |
1555 | Writes Value to the bit field of the MMIO register. The bit field is\r | |
1556 | specified by the StartBit and the EndBit. All other bits in the destination\r | |
1557 | MMIO register are preserved. The new value of the 16-bit register is returned.\r | |
1558 | \r | |
1559 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
1560 | If StartBit is greater than 15, then ASSERT().\r | |
1561 | If EndBit is greater than 15, then ASSERT().\r | |
1562 | If EndBit is less than StartBit, then ASSERT().\r | |
1563 | \r | |
1564 | @param Address MMIO register to write.\r | |
1565 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1566 | Range 0..15.\r | |
1567 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1568 | Range 0..15.\r | |
1569 | @param Value New value of the bit field.\r | |
1570 | \r | |
1571 | @return The value written back to the MMIO register.\r | |
1572 | \r | |
1573 | **/\r | |
1574 | UINT16\r | |
1575 | EFIAPI\r | |
1576 | MmioBitFieldWrite16 (\r | |
1577 | IN UINTN Address,\r | |
1578 | IN UINTN StartBit,\r | |
1579 | IN UINTN EndBit,\r | |
1580 | IN UINT16 Value\r | |
1581 | )\r | |
1582 | {\r | |
1583 | return MmioWrite16 (\r | |
1584 | Address,\r | |
1585 | BitFieldWrite16 (MmioRead16 (Address), StartBit, EndBit, Value)\r | |
1586 | );\r | |
1587 | }\r | |
1588 | \r | |
1589 | /**\r | |
1590 | Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and\r | |
1591 | writes the result back to the bit field in the 16-bit MMIO register.\r | |
1592 | \r | |
1593 | Reads the 16-bit MMIO register specified by Address, performs a bitwise\r | |
1594 | inclusive OR between the read result and the value specified by OrData, and\r | |
1595 | writes the result to the 16-bit MMIO register specified by Address. The value\r | |
1596 | written to the MMIO register is returned. This function must guarantee that\r | |
1597 | all MMIO read and write operations are serialized. Extra left bits in OrData\r | |
1598 | are stripped.\r | |
1599 | \r | |
1600 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
1601 | If StartBit is greater than 15, then ASSERT().\r | |
1602 | If EndBit is greater than 15, then ASSERT().\r | |
1603 | If EndBit is less than StartBit, then ASSERT().\r | |
1604 | \r | |
1605 | @param Address MMIO register to write.\r | |
1606 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1607 | Range 0..15.\r | |
1608 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1609 | Range 0..15.\r | |
1610 | @param OrData The value to OR with read value from the MMIO register.\r | |
1611 | \r | |
1612 | @return The value written back to the MMIO register.\r | |
1613 | \r | |
1614 | **/\r | |
1615 | UINT16\r | |
1616 | EFIAPI\r | |
1617 | MmioBitFieldOr16 (\r | |
1618 | IN UINTN Address,\r | |
1619 | IN UINTN StartBit,\r | |
1620 | IN UINTN EndBit,\r | |
1621 | IN UINT16 OrData\r | |
1622 | )\r | |
1623 | {\r | |
1624 | return MmioWrite16 (\r | |
1625 | Address,\r | |
1626 | BitFieldOr16 (MmioRead16 (Address), StartBit, EndBit, OrData)\r | |
1627 | );\r | |
1628 | }\r | |
1629 | \r | |
1630 | /**\r | |
1631 | Reads a bit field in a 16-bit MMIO register, performs a bitwise AND, and\r | |
1632 | writes the result back to the bit field in the 16-bit MMIO register.\r | |
1633 | \r | |
1634 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r | |
1635 | between the read result and the value specified by AndData, and writes the\r | |
1636 | result to the 16-bit MMIO register specified by Address. The value written to\r | |
1637 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
1638 | read and write operations are serialized. Extra left bits in AndData are\r | |
1639 | stripped.\r | |
1640 | \r | |
1641 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
1642 | If StartBit is greater than 15, then ASSERT().\r | |
1643 | If EndBit is greater than 15, then ASSERT().\r | |
1644 | If EndBit is less than StartBit, then ASSERT().\r | |
1645 | \r | |
1646 | @param Address MMIO register to write.\r | |
1647 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1648 | Range 0..15.\r | |
1649 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1650 | Range 0..15.\r | |
1651 | @param AndData The value to AND with read value from the MMIO register.\r | |
1652 | \r | |
1653 | @return The value written back to the MMIO register.\r | |
1654 | \r | |
1655 | **/\r | |
1656 | UINT16\r | |
1657 | EFIAPI\r | |
1658 | MmioBitFieldAnd16 (\r | |
1659 | IN UINTN Address,\r | |
1660 | IN UINTN StartBit,\r | |
1661 | IN UINTN EndBit,\r | |
1662 | IN UINT16 AndData\r | |
1663 | )\r | |
1664 | {\r | |
1665 | return MmioWrite16 (\r | |
1666 | Address,\r | |
1667 | BitFieldAnd16 (MmioRead16 (Address), StartBit, EndBit, AndData)\r | |
1668 | );\r | |
1669 | }\r | |
1670 | \r | |
1671 | /**\r | |
1672 | Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed\r | |
1673 | by a bitwise inclusive OR, and writes the result back to the bit field in the\r | |
1674 | 16-bit MMIO register.\r | |
1675 | \r | |
1676 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r | |
1677 | followed by a bitwise inclusive OR between the read result and the value\r | |
1678 | specified by AndData, and writes the result to the 16-bit MMIO register\r | |
1679 | specified by Address. The value written to the MMIO register is returned.\r | |
1680 | This function must guarantee that all MMIO read and write operations are\r | |
1681 | serialized. Extra left bits in both AndData and OrData are stripped.\r | |
1682 | \r | |
1683 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
1684 | If StartBit is greater than 15, then ASSERT().\r | |
1685 | If EndBit is greater than 15, then ASSERT().\r | |
1686 | If EndBit is less than StartBit, then ASSERT().\r | |
1687 | \r | |
1688 | @param Address MMIO register to write.\r | |
1689 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1690 | Range 0..15.\r | |
1691 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1692 | Range 0..15.\r | |
1693 | @param AndData The value to AND with read value from the MMIO register.\r | |
1694 | @param OrData The value to OR with the result of the AND operation.\r | |
1695 | \r | |
1696 | @return The value written back to the MMIO register.\r | |
1697 | \r | |
1698 | **/\r | |
1699 | UINT16\r | |
1700 | EFIAPI\r | |
1701 | MmioBitFieldAndThenOr16 (\r | |
1702 | IN UINTN Address,\r | |
1703 | IN UINTN StartBit,\r | |
1704 | IN UINTN EndBit,\r | |
1705 | IN UINT16 AndData,\r | |
1706 | IN UINT16 OrData\r | |
1707 | )\r | |
1708 | {\r | |
1709 | return MmioWrite16 (\r | |
1710 | Address,\r | |
1711 | BitFieldAndThenOr16 (MmioRead16 (Address), StartBit, EndBit, AndData, OrData)\r | |
1712 | );\r | |
1713 | }\r | |
1714 | \r | |
1715 | /**\r | |
1716 | Reads a 32-bit MMIO register, performs a bitwise inclusive OR, and writes the\r | |
1717 | result back to the 32-bit MMIO register.\r | |
1718 | \r | |
1719 | Reads the 32-bit MMIO register specified by Address, performs a bitwise\r | |
1720 | inclusive OR between the read result and the value specified by OrData, and\r | |
1721 | writes the result to the 32-bit MMIO register specified by Address. The value\r | |
1722 | written to the MMIO register is returned. This function must guarantee that\r | |
1723 | all MMIO read and write operations are serialized.\r | |
1724 | \r | |
1725 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
1726 | \r | |
1727 | @param Address The MMIO register to write.\r | |
1728 | @param OrData The value to OR with the read value from the MMIO register.\r | |
1729 | \r | |
1730 | @return The value written back to the MMIO register.\r | |
1731 | \r | |
1732 | **/\r | |
1733 | UINT32\r | |
1734 | EFIAPI\r | |
1735 | MmioOr32 (\r | |
1736 | IN UINTN Address,\r | |
1737 | IN UINT32 OrData\r | |
1738 | )\r | |
1739 | {\r | |
1740 | return MmioWrite32 (Address, MmioRead32 (Address) | OrData);\r | |
1741 | }\r | |
1742 | \r | |
1743 | /**\r | |
1744 | Reads a 32-bit MMIO register, performs a bitwise AND, and writes the result\r | |
1745 | back to the 32-bit MMIO register.\r | |
1746 | \r | |
1747 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r | |
1748 | between the read result and the value specified by AndData, and writes the\r | |
1749 | result to the 32-bit MMIO register specified by Address. The value written to\r | |
1750 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
1751 | read and write operations are serialized.\r | |
1752 | \r | |
1753 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
1754 | \r | |
1755 | @param Address The MMIO register to write.\r | |
1756 | @param AndData The value to AND with the read value from the MMIO register.\r | |
1757 | \r | |
1758 | @return The value written back to the MMIO register.\r | |
1759 | \r | |
1760 | **/\r | |
1761 | UINT32\r | |
1762 | EFIAPI\r | |
1763 | MmioAnd32 (\r | |
1764 | IN UINTN Address,\r | |
1765 | IN UINT32 AndData\r | |
1766 | )\r | |
1767 | {\r | |
1768 | return MmioWrite32 (Address, MmioRead32 (Address) & AndData);\r | |
1769 | }\r | |
1770 | \r | |
1771 | /**\r | |
1772 | Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise\r | |
1773 | inclusive OR, and writes the result back to the 32-bit MMIO register.\r | |
1774 | \r | |
1775 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r | |
1776 | between the read result and the value specified by AndData, performs a\r | |
1777 | bitwise OR between the result of the AND operation and the value specified by\r | |
1778 | OrData, and writes the result to the 32-bit MMIO register specified by\r | |
1779 | Address. The value written to the MMIO register is returned. This function\r | |
1780 | must guarantee that all MMIO read and write operations are serialized.\r | |
1781 | \r | |
1782 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
1783 | \r | |
1784 | \r | |
1785 | @param Address The MMIO register to write.\r | |
1786 | @param AndData The value to AND with the read value from the MMIO register.\r | |
1787 | @param OrData The value to OR with the result of the AND operation.\r | |
1788 | \r | |
1789 | @return The value written back to the MMIO register.\r | |
1790 | \r | |
1791 | **/\r | |
1792 | UINT32\r | |
1793 | EFIAPI\r | |
1794 | MmioAndThenOr32 (\r | |
1795 | IN UINTN Address,\r | |
1796 | IN UINT32 AndData,\r | |
1797 | IN UINT32 OrData\r | |
1798 | )\r | |
1799 | {\r | |
1800 | return MmioWrite32 (Address, (MmioRead32 (Address) & AndData) | OrData);\r | |
1801 | }\r | |
1802 | \r | |
1803 | /**\r | |
1804 | Reads a bit field of a MMIO register.\r | |
1805 | \r | |
1806 | Reads the bit field in a 32-bit MMIO register. The bit field is specified by\r | |
1807 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
1808 | \r | |
1809 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
1810 | If StartBit is greater than 31, then ASSERT().\r | |
1811 | If EndBit is greater than 31, then ASSERT().\r | |
1812 | If EndBit is less than StartBit, then ASSERT().\r | |
1813 | \r | |
1814 | @param Address MMIO register to read.\r | |
1815 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1816 | Range 0..31.\r | |
1817 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1818 | Range 0..31.\r | |
1819 | \r | |
1820 | @return The value read.\r | |
1821 | \r | |
1822 | **/\r | |
1823 | UINT32\r | |
1824 | EFIAPI\r | |
1825 | MmioBitFieldRead32 (\r | |
1826 | IN UINTN Address,\r | |
1827 | IN UINTN StartBit,\r | |
1828 | IN UINTN EndBit\r | |
1829 | )\r | |
1830 | {\r | |
1831 | return BitFieldRead32 (MmioRead32 (Address), StartBit, EndBit);\r | |
1832 | }\r | |
1833 | \r | |
1834 | /**\r | |
1835 | Writes a bit field to a MMIO register.\r | |
1836 | \r | |
1837 | Writes Value to the bit field of the MMIO register. The bit field is\r | |
1838 | specified by the StartBit and the EndBit. All other bits in the destination\r | |
1839 | MMIO register are preserved. The new value of the 32-bit register is returned.\r | |
1840 | \r | |
1841 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
1842 | If StartBit is greater than 31, then ASSERT().\r | |
1843 | If EndBit is greater than 31, then ASSERT().\r | |
1844 | If EndBit is less than StartBit, then ASSERT().\r | |
1845 | \r | |
1846 | @param Address MMIO register to write.\r | |
1847 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1848 | Range 0..31.\r | |
1849 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1850 | Range 0..31.\r | |
1851 | @param Value New value of the bit field.\r | |
1852 | \r | |
1853 | @return The value written back to the MMIO register.\r | |
1854 | \r | |
1855 | **/\r | |
1856 | UINT32\r | |
1857 | EFIAPI\r | |
1858 | MmioBitFieldWrite32 (\r | |
1859 | IN UINTN Address,\r | |
1860 | IN UINTN StartBit,\r | |
1861 | IN UINTN EndBit,\r | |
1862 | IN UINT32 Value\r | |
1863 | )\r | |
1864 | {\r | |
1865 | return MmioWrite32 (\r | |
1866 | Address,\r | |
1867 | BitFieldWrite32 (MmioRead32 (Address), StartBit, EndBit, Value)\r | |
1868 | );\r | |
1869 | }\r | |
1870 | \r | |
1871 | /**\r | |
1872 | Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and\r | |
1873 | writes the result back to the bit field in the 32-bit MMIO register.\r | |
1874 | \r | |
1875 | Reads the 32-bit MMIO register specified by Address, performs a bitwise\r | |
1876 | inclusive OR between the read result and the value specified by OrData, and\r | |
1877 | writes the result to the 32-bit MMIO register specified by Address. The value\r | |
1878 | written to the MMIO register is returned. This function must guarantee that\r | |
1879 | all MMIO read and write operations are serialized. Extra left bits in OrData\r | |
1880 | are stripped.\r | |
1881 | \r | |
1882 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
1883 | If StartBit is greater than 31, then ASSERT().\r | |
1884 | If EndBit is greater than 31, then ASSERT().\r | |
1885 | If EndBit is less than StartBit, then ASSERT().\r | |
1886 | \r | |
1887 | @param Address MMIO register to write.\r | |
1888 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1889 | Range 0..31.\r | |
1890 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1891 | Range 0..31.\r | |
1892 | @param OrData The value to OR with read value from the MMIO register.\r | |
1893 | \r | |
1894 | @return The value written back to the MMIO register.\r | |
1895 | \r | |
1896 | **/\r | |
1897 | UINT32\r | |
1898 | EFIAPI\r | |
1899 | MmioBitFieldOr32 (\r | |
1900 | IN UINTN Address,\r | |
1901 | IN UINTN StartBit,\r | |
1902 | IN UINTN EndBit,\r | |
1903 | IN UINT32 OrData\r | |
1904 | )\r | |
1905 | {\r | |
1906 | return MmioWrite32 (\r | |
1907 | Address,\r | |
1908 | BitFieldOr32 (MmioRead32 (Address), StartBit, EndBit, OrData)\r | |
1909 | );\r | |
1910 | }\r | |
1911 | \r | |
1912 | /**\r | |
1913 | Reads a bit field in a 32-bit MMIO register, performs a bitwise AND, and\r | |
1914 | writes the result back to the bit field in the 32-bit MMIO register.\r | |
1915 | \r | |
1916 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r | |
1917 | between the read result and the value specified by AndData, and writes the\r | |
1918 | result to the 32-bit MMIO register specified by Address. The value written to\r | |
1919 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
1920 | read and write operations are serialized. Extra left bits in AndData are\r | |
1921 | stripped.\r | |
1922 | \r | |
1923 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
1924 | If StartBit is greater than 31, then ASSERT().\r | |
1925 | If EndBit is greater than 31, then ASSERT().\r | |
1926 | If EndBit is less than StartBit, then ASSERT().\r | |
1927 | \r | |
1928 | @param Address MMIO register to write.\r | |
1929 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1930 | Range 0..31.\r | |
1931 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1932 | Range 0..31.\r | |
1933 | @param AndData The value to AND with read value from the MMIO register.\r | |
1934 | \r | |
1935 | @return The value written back to the MMIO register.\r | |
1936 | \r | |
1937 | **/\r | |
1938 | UINT32\r | |
1939 | EFIAPI\r | |
1940 | MmioBitFieldAnd32 (\r | |
1941 | IN UINTN Address,\r | |
1942 | IN UINTN StartBit,\r | |
1943 | IN UINTN EndBit,\r | |
1944 | IN UINT32 AndData\r | |
1945 | )\r | |
1946 | {\r | |
1947 | return MmioWrite32 (\r | |
1948 | Address,\r | |
1949 | BitFieldAnd32 (MmioRead32 (Address), StartBit, EndBit, AndData)\r | |
1950 | );\r | |
1951 | }\r | |
1952 | \r | |
1953 | /**\r | |
1954 | Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed\r | |
1955 | by a bitwise inclusive OR, and writes the result back to the bit field in the\r | |
1956 | 32-bit MMIO register.\r | |
1957 | \r | |
1958 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r | |
1959 | followed by a bitwise inclusive OR between the read result and the value\r | |
1960 | specified by AndData, and writes the result to the 32-bit MMIO register\r | |
1961 | specified by Address. The value written to the MMIO register is returned.\r | |
1962 | This function must guarantee that all MMIO read and write operations are\r | |
1963 | serialized. Extra left bits in both AndData and OrData are stripped.\r | |
1964 | \r | |
1965 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
1966 | If StartBit is greater than 31, then ASSERT().\r | |
1967 | If EndBit is greater than 31, then ASSERT().\r | |
1968 | If EndBit is less than StartBit, then ASSERT().\r | |
1969 | \r | |
1970 | @param Address MMIO register to write.\r | |
1971 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1972 | Range 0..31.\r | |
1973 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1974 | Range 0..31.\r | |
1975 | @param AndData The value to AND with read value from the MMIO register.\r | |
1976 | @param OrData The value to OR with the result of the AND operation.\r | |
1977 | \r | |
1978 | @return The value written back to the MMIO register.\r | |
1979 | \r | |
1980 | **/\r | |
1981 | UINT32\r | |
1982 | EFIAPI\r | |
1983 | MmioBitFieldAndThenOr32 (\r | |
1984 | IN UINTN Address,\r | |
1985 | IN UINTN StartBit,\r | |
1986 | IN UINTN EndBit,\r | |
1987 | IN UINT32 AndData,\r | |
1988 | IN UINT32 OrData\r | |
1989 | )\r | |
1990 | {\r | |
1991 | return MmioWrite32 (\r | |
1992 | Address,\r | |
1993 | BitFieldAndThenOr32 (MmioRead32 (Address), StartBit, EndBit, AndData, OrData)\r | |
1994 | );\r | |
1995 | }\r | |
1996 | \r | |
1997 | /**\r | |
1998 | Reads a 64-bit MMIO register, performs a bitwise inclusive OR, and writes the\r | |
1999 | result back to the 64-bit MMIO register.\r | |
2000 | \r | |
2001 | Reads the 64-bit MMIO register specified by Address, performs a bitwise\r | |
2002 | inclusive OR between the read result and the value specified by OrData, and\r | |
2003 | writes the result to the 64-bit MMIO register specified by Address. The value\r | |
2004 | written to the MMIO register is returned. This function must guarantee that\r | |
2005 | all MMIO read and write operations are serialized.\r | |
2006 | \r | |
2007 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
2008 | \r | |
2009 | @param Address The MMIO register to write.\r | |
2010 | @param OrData The value to OR with the read value from the MMIO register.\r | |
2011 | \r | |
2012 | @return The value written back to the MMIO register.\r | |
2013 | \r | |
2014 | **/\r | |
2015 | UINT64\r | |
2016 | EFIAPI\r | |
2017 | MmioOr64 (\r | |
2018 | IN UINTN Address,\r | |
2019 | IN UINT64 OrData\r | |
2020 | )\r | |
2021 | {\r | |
2022 | return MmioWrite64 (Address, MmioRead64 (Address) | OrData);\r | |
2023 | }\r | |
2024 | \r | |
2025 | /**\r | |
2026 | Reads a 64-bit MMIO register, performs a bitwise AND, and writes the result\r | |
2027 | back to the 64-bit MMIO register.\r | |
2028 | \r | |
2029 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r | |
2030 | between the read result and the value specified by AndData, and writes the\r | |
2031 | result to the 64-bit MMIO register specified by Address. The value written to\r | |
2032 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
2033 | read and write operations are serialized.\r | |
2034 | \r | |
2035 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
2036 | \r | |
2037 | @param Address The MMIO register to write.\r | |
2038 | @param AndData The value to AND with the read value from the MMIO register.\r | |
2039 | \r | |
2040 | @return The value written back to the MMIO register.\r | |
2041 | \r | |
2042 | **/\r | |
2043 | UINT64\r | |
2044 | EFIAPI\r | |
2045 | MmioAnd64 (\r | |
2046 | IN UINTN Address,\r | |
2047 | IN UINT64 AndData\r | |
2048 | )\r | |
2049 | {\r | |
2050 | return MmioWrite64 (Address, MmioRead64 (Address) & AndData);\r | |
2051 | }\r | |
2052 | \r | |
2053 | /**\r | |
2054 | Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise\r | |
2055 | inclusive OR, and writes the result back to the 64-bit MMIO register.\r | |
2056 | \r | |
2057 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r | |
2058 | between the read result and the value specified by AndData, performs a\r | |
2059 | bitwise OR between the result of the AND operation and the value specified by\r | |
2060 | OrData, and writes the result to the 64-bit MMIO register specified by\r | |
2061 | Address. The value written to the MMIO register is returned. This function\r | |
2062 | must guarantee that all MMIO read and write operations are serialized.\r | |
2063 | \r | |
2064 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
2065 | \r | |
2066 | \r | |
2067 | @param Address The MMIO register to write.\r | |
2068 | @param AndData The value to AND with the read value from the MMIO register.\r | |
2069 | @param OrData The value to OR with the result of the AND operation.\r | |
2070 | \r | |
2071 | @return The value written back to the MMIO register.\r | |
2072 | \r | |
2073 | **/\r | |
2074 | UINT64\r | |
2075 | EFIAPI\r | |
2076 | MmioAndThenOr64 (\r | |
2077 | IN UINTN Address,\r | |
2078 | IN UINT64 AndData,\r | |
2079 | IN UINT64 OrData\r | |
2080 | )\r | |
2081 | {\r | |
2082 | return MmioWrite64 (Address, (MmioRead64 (Address) & AndData) | OrData);\r | |
2083 | }\r | |
2084 | \r | |
2085 | /**\r | |
2086 | Reads a bit field of a MMIO register.\r | |
2087 | \r | |
2088 | Reads the bit field in a 64-bit MMIO register. The bit field is specified by\r | |
2089 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
2090 | \r | |
2091 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
2092 | If StartBit is greater than 63, then ASSERT().\r | |
2093 | If EndBit is greater than 63, then ASSERT().\r | |
2094 | If EndBit is less than StartBit, then ASSERT().\r | |
2095 | \r | |
2096 | @param Address MMIO register to read.\r | |
2097 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2098 | Range 0..63.\r | |
2099 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2100 | Range 0..63.\r | |
2101 | \r | |
2102 | @return The value read.\r | |
2103 | \r | |
2104 | **/\r | |
2105 | UINT64\r | |
2106 | EFIAPI\r | |
2107 | MmioBitFieldRead64 (\r | |
2108 | IN UINTN Address,\r | |
2109 | IN UINTN StartBit,\r | |
2110 | IN UINTN EndBit\r | |
2111 | )\r | |
2112 | {\r | |
2113 | return BitFieldRead64 (MmioRead64 (Address), StartBit, EndBit);\r | |
2114 | }\r | |
2115 | \r | |
2116 | /**\r | |
2117 | Writes a bit field to a MMIO register.\r | |
2118 | \r | |
2119 | Writes Value to the bit field of the MMIO register. The bit field is\r | |
2120 | specified by the StartBit and the EndBit. All other bits in the destination\r | |
2121 | MMIO register are preserved. The new value of the 64-bit register is returned.\r | |
2122 | \r | |
2123 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
2124 | If StartBit is greater than 63, then ASSERT().\r | |
2125 | If EndBit is greater than 63, then ASSERT().\r | |
2126 | If EndBit is less than StartBit, then ASSERT().\r | |
2127 | \r | |
2128 | @param Address MMIO register to write.\r | |
2129 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2130 | Range 0..63.\r | |
2131 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2132 | Range 0..63.\r | |
2133 | @param Value New value of the bit field.\r | |
2134 | \r | |
2135 | @return The value written back to the MMIO register.\r | |
2136 | \r | |
2137 | **/\r | |
2138 | UINT64\r | |
2139 | EFIAPI\r | |
2140 | MmioBitFieldWrite64 (\r | |
2141 | IN UINTN Address,\r | |
2142 | IN UINTN StartBit,\r | |
2143 | IN UINTN EndBit,\r | |
2144 | IN UINT64 Value\r | |
2145 | )\r | |
2146 | {\r | |
2147 | return MmioWrite64 (\r | |
2148 | Address,\r | |
2149 | BitFieldWrite64 (MmioRead64 (Address), StartBit, EndBit, Value)\r | |
2150 | );\r | |
2151 | }\r | |
2152 | \r | |
2153 | /**\r | |
2154 | Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and\r | |
2155 | writes the result back to the bit field in the 64-bit MMIO register.\r | |
2156 | \r | |
2157 | Reads the 64-bit MMIO register specified by Address, performs a bitwise\r | |
2158 | inclusive OR between the read result and the value specified by OrData, and\r | |
2159 | writes the result to the 64-bit MMIO register specified by Address. The value\r | |
2160 | written to the MMIO register is returned. This function must guarantee that\r | |
2161 | all MMIO read and write operations are serialized. Extra left bits in OrData\r | |
2162 | are stripped.\r | |
2163 | \r | |
2164 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
2165 | If StartBit is greater than 63, then ASSERT().\r | |
2166 | If EndBit is greater than 63, then ASSERT().\r | |
2167 | If EndBit is less than StartBit, then ASSERT().\r | |
2168 | \r | |
2169 | @param Address MMIO register to write.\r | |
2170 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2171 | Range 0..63.\r | |
2172 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2173 | Range 0..63.\r | |
2174 | @param OrData The value to OR with read value from the MMIO register.\r | |
2175 | \r | |
2176 | @return The value written back to the MMIO register.\r | |
2177 | \r | |
2178 | **/\r | |
2179 | UINT64\r | |
2180 | EFIAPI\r | |
2181 | MmioBitFieldOr64 (\r | |
2182 | IN UINTN Address,\r | |
2183 | IN UINTN StartBit,\r | |
2184 | IN UINTN EndBit,\r | |
2185 | IN UINT64 OrData\r | |
2186 | )\r | |
2187 | {\r | |
2188 | return MmioWrite64 (\r | |
2189 | Address,\r | |
2190 | BitFieldOr64 (MmioRead64 (Address), StartBit, EndBit, OrData)\r | |
2191 | );\r | |
2192 | }\r | |
2193 | \r | |
2194 | /**\r | |
2195 | Reads a bit field in a 64-bit MMIO register, performs a bitwise AND, and\r | |
2196 | writes the result back to the bit field in the 64-bit MMIO register.\r | |
2197 | \r | |
2198 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r | |
2199 | between the read result and the value specified by AndData, and writes the\r | |
2200 | result to the 64-bit MMIO register specified by Address. The value written to\r | |
2201 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
2202 | read and write operations are serialized. Extra left bits in AndData are\r | |
2203 | stripped.\r | |
2204 | \r | |
2205 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
2206 | If StartBit is greater than 63, then ASSERT().\r | |
2207 | If EndBit is greater than 63, then ASSERT().\r | |
2208 | If EndBit is less than StartBit, then ASSERT().\r | |
2209 | \r | |
2210 | @param Address MMIO register to write.\r | |
2211 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2212 | Range 0..63.\r | |
2213 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2214 | Range 0..63.\r | |
2215 | @param AndData The value to AND with read value from the MMIO register.\r | |
2216 | \r | |
2217 | @return The value written back to the MMIO register.\r | |
2218 | \r | |
2219 | **/\r | |
2220 | UINT64\r | |
2221 | EFIAPI\r | |
2222 | MmioBitFieldAnd64 (\r | |
2223 | IN UINTN Address,\r | |
2224 | IN UINTN StartBit,\r | |
2225 | IN UINTN EndBit,\r | |
2226 | IN UINT64 AndData\r | |
2227 | )\r | |
2228 | {\r | |
2229 | return MmioWrite64 (\r | |
2230 | Address,\r | |
2231 | BitFieldAnd64 (MmioRead64 (Address), StartBit, EndBit, AndData)\r | |
2232 | );\r | |
2233 | }\r | |
2234 | \r | |
2235 | /**\r | |
2236 | Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed\r | |
2237 | by a bitwise inclusive OR, and writes the result back to the bit field in the\r | |
2238 | 64-bit MMIO register.\r | |
2239 | \r | |
2240 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r | |
2241 | followed by a bitwise inclusive OR between the read result and the value\r | |
2242 | specified by AndData, and writes the result to the 64-bit MMIO register\r | |
2243 | specified by Address. The value written to the MMIO register is returned.\r | |
2244 | This function must guarantee that all MMIO read and write operations are\r | |
2245 | serialized. Extra left bits in both AndData and OrData are stripped.\r | |
2246 | \r | |
2247 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
2248 | If StartBit is greater than 63, then ASSERT().\r | |
2249 | If EndBit is greater than 63, then ASSERT().\r | |
2250 | If EndBit is less than StartBit, then ASSERT().\r | |
2251 | \r | |
2252 | @param Address MMIO register to write.\r | |
2253 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2254 | Range 0..63.\r | |
2255 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2256 | Range 0..63.\r | |
2257 | @param AndData The value to AND with read value from the MMIO register.\r | |
2258 | @param OrData The value to OR with the result of the AND operation.\r | |
2259 | \r | |
2260 | @return The value written back to the MMIO register.\r | |
2261 | \r | |
2262 | **/\r | |
2263 | UINT64\r | |
2264 | EFIAPI\r | |
2265 | MmioBitFieldAndThenOr64 (\r | |
2266 | IN UINTN Address,\r | |
2267 | IN UINTN StartBit,\r | |
2268 | IN UINTN EndBit,\r | |
2269 | IN UINT64 AndData,\r | |
2270 | IN UINT64 OrData\r | |
2271 | )\r | |
2272 | {\r | |
2273 | return MmioWrite64 (\r | |
2274 | Address,\r | |
2275 | BitFieldAndThenOr64 (MmioRead64 (Address), StartBit, EndBit, AndData, OrData)\r | |
2276 | );\r | |
2277 | }\r |