| | 1 | /** @file\r |
| | 2 | OVMF Platform definitions\r |
| | 3 | \r |
| | 4 | Copyright (C) 2015, Red Hat, Inc.\r |
| | 5 | Copyright (c) 2014, Gabriel L. Somlo <somlo@cmu.edu>\r |
| | 6 | \r |
| | 7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| | 8 | **/\r |
| | 9 | \r |
| | 10 | #ifndef __OVMF_PLATFORMS_H__\r |
| | 11 | #define __OVMF_PLATFORMS_H__\r |
| | 12 | \r |
| | 13 | #include <Library/PciLib.h>\r |
| | 14 | #include <IndustryStandard/Pci22.h>\r |
| | 15 | #include <IndustryStandard/Q35MchIch9.h>\r |
| | 16 | #include <IndustryStandard/I440FxPiix4.h>\r |
| | 17 | #include <IndustryStandard/Bhyve.h>\r |
| | 18 | \r |
| | 19 | //\r |
| | 20 | // OVMF Host Bridge DID Address\r |
| | 21 | //\r |
| | 22 | #define OVMF_HOSTBRIDGE_DID \\r |
| | 23 | PCI_LIB_ADDRESS (0, 0, 0, PCI_DEVICE_ID_OFFSET)\r |
| | 24 | \r |
| | 25 | //\r |
| | 26 | // Values we program into the PM base address registers\r |
| | 27 | //\r |
| | 28 | #define PIIX4_PMBA_VALUE 0xB000\r |
| | 29 | #define ICH9_PMBASE_VALUE 0x0600\r |
| | 30 | \r |
| | 31 | //\r |
| | 32 | // Common bits in same-purpose registers\r |
| | 33 | //\r |
| | 34 | #define PMBA_RTE BIT0\r |
| | 35 | \r |
| | 36 | //\r |
| | 37 | // Common IO ports relative to the Power Management Base Address\r |
| | 38 | //\r |
| | 39 | #define ACPI_TIMER_OFFSET 0x8\r |
| | 40 | \r |
| | 41 | #endif\r |
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