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OvmfPkg/PlatformDxe: list "Platform.h" in the INF file
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1## @file\r
2# EFI/Framework Open Virtual Machine Firmware (OVMF) platform\r
3#\r
4# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>\r
5#\r
6# This program and the accompanying materials\r
7# are licensed and made available under the terms and conditions of the BSD License\r
8# which accompanies this distribution. The full text of the license may be found at\r
9# http://opensource.org/licenses/bsd-license.php\r
10#\r
11# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13#\r
14##\r
15\r
16[Defines]\r
17 DEC_SPECIFICATION = 0x00010005\r
18 PACKAGE_NAME = OvmfPkg\r
19 PACKAGE_GUID = 2daf5f34-50e5-4b9d-b8e3-5562334d87e5\r
20 PACKAGE_VERSION = 0.1\r
21\r
22[Includes]\r
23 Include\r
24\r
25[LibraryClasses]\r
26 ## @libraryclass Loads and boots a Linux kernel image\r
27 #\r
28 LoadLinuxLib|Include/Library/LoadLinuxLib.h\r
29\r
30 ## @libraryclass Save and restore variables using a file\r
31 #\r
32 NvVarsFileLib|Include/Library/NvVarsFileLib.h\r
33\r
34 ## @libraryclass Access QEMU's firmware configuration interface\r
35 #\r
36 QemuFwCfgLib|Include/Library/QemuFwCfgLib.h\r
37\r
38 ## @libraryclass S3 support for QEMU fw_cfg\r
39 #\r
40 QemuFwCfgS3Lib|Include/Library/QemuFwCfgS3Lib.h\r
41\r
42 ## @libraryclass Rewrite the BootOrder NvVar based on QEMU's "bootorder"\r
43 # fw_cfg file.\r
44 #\r
45 QemuBootOrderLib|Include/Library/QemuBootOrderLib.h\r
46\r
47 ## @libraryclass Serialize (and deserialize) variables\r
48 #\r
49 SerializeVariablesLib|Include/Library/SerializeVariablesLib.h\r
50\r
51 ## @libraryclass Invoke Xen hypercalls\r
52 #\r
53 XenHypercallLib|Include/Library/XenHypercallLib.h\r
54\r
55 ## @libraryclass Manage XenBus device path and I/O handles\r
56 #\r
57 XenIoMmioLib|Include/Library/XenIoMmioLib.h\r
58\r
59[Guids]\r
60 gUefiOvmfPkgTokenSpaceGuid = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}\r
61 gEfiXenInfoGuid = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}}\r
62 gOvmfPlatformConfigGuid = {0x7235c51c, 0x0c80, 0x4cab, {0x87, 0xac, 0x3b, 0x08, 0x4a, 0x63, 0x04, 0xb1}}\r
63 gVirtioMmioTransportGuid = {0x837dca9e, 0xe874, 0x4d82, {0xb2, 0x9a, 0x23, 0xfe, 0x0e, 0x23, 0xd1, 0xe2}}\r
64 gXenBusRootDeviceGuid = {0xa732241f, 0x383d, 0x4d9c, {0x8a, 0xe1, 0x8e, 0x09, 0x83, 0x75, 0x89, 0xd7}}\r
65 gRootBridgesConnectedEventGroupGuid = {0x24a2d66f, 0xeedd, 0x4086, {0x90, 0x42, 0xf2, 0x6e, 0x47, 0x97, 0xee, 0x69}}\r
66\r
67[Protocols]\r
68 gVirtioDeviceProtocolGuid = {0xfa920010, 0x6785, 0x4941, {0xb6, 0xec, 0x49, 0x8c, 0x57, 0x9f, 0x16, 0x0a}}\r
69 gBlockMmioProtocolGuid = {0x6b558ce3, 0x69e5, 0x4c67, {0xa6, 0x34, 0xf7, 0xfe, 0x72, 0xad, 0xbe, 0x84}}\r
70 gXenBusProtocolGuid = {0x3d3ca290, 0xb9a5, 0x11e3, {0xb7, 0x5d, 0xb8, 0xac, 0x6f, 0x7d, 0x65, 0xe6}}\r
71 gXenIoProtocolGuid = {0x6efac84f, 0x0ab0, 0x4747, {0x81, 0xbe, 0x85, 0x55, 0x62, 0x59, 0x04, 0x49}}\r
72 gIoMmuAbsentProtocolGuid = {0xf8775d50, 0x8abd, 0x4adf, {0x92, 0xac, 0x85, 0x3e, 0x51, 0xf6, 0xc8, 0xdc}}\r
73\r
74[PcdsFixedAtBuild]\r
75 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|0x0|UINT32|0\r
76 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize|0x0|UINT32|1\r
77 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|0x0|UINT32|0x15\r
78 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize|0x0|UINT32|0x16\r
79\r
80 ## This flag is used to control the destination port for PlatformDebugLibIoPort\r
81 gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x402|UINT16|4\r
82\r
83 ## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and\r
84 # LUNs are retrieved from the host during virtio-scsi setup.\r
85 # MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun\r
86 # possible devices. This can take extremely long, for example with\r
87 # MaxTarget=255 and MaxLun=16383. The *inclusive* constants below limit\r
88 # MaxTarget and MaxLun, independently, should the host report higher values,\r
89 # so that scanning the number of devices given by their product is still\r
90 # acceptably fast.\r
91 gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit|31|UINT16|6\r
92 gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7\r
93\r
94 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8\r
95 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9\r
96 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa\r
97 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0|UINT32|0xb\r
98 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase|0x0|UINT32|0xc\r
99 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase|0x0|UINT32|0xd\r
100 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe\r
101 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress|0x0|UINT32|0xf\r
102 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase|0x0|UINT32|0x11\r
103 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize|0x0|UINT32|0x12\r
104 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|0x0|UINT32|0x13\r
105 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize|0x0|UINT32|0x14\r
106 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase|0x0|UINT32|0x18\r
107 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize|0x0|UINT32|0x19\r
108 gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a\r
109 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f\r
110\r
111[PcdsDynamic, PcdsDynamicEx]\r
112 gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2\r
113 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10\r
114 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0|UINT16|0x1b\r
115 gUefiOvmfPkgTokenSpaceGuid.PcdQemuSmbiosValidated|FALSE|BOOLEAN|0x21\r
116\r
117 ## The IO port aperture shared by all PCI root bridges.\r
118 #\r
119 gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x22\r
120 gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x23\r
121\r
122 ## The 32-bit MMIO aperture shared by all PCI root bridges.\r
123 #\r
124 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT64|0x24\r
125 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT64|0x25\r
126\r
127 ## The 64-bit MMIO aperture shared by all PCI root bridges.\r
128 #\r
129 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26\r
130 gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27\r
131\r
132 ## The following setting controls how many megabytes we configure as TSEG on\r
133 # Q35, for SMRAM purposes. Permitted defaults are: 1, 2, 8. Other defaults\r
134 # cause undefined behavior. During boot, the PCD is updated by PlatformPei\r
135 # to reflect the extended TSEG size, if one is advertized by QEMU.\r
136 #\r
137 # This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).\r
138 gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20\r
139\r
140[PcdsFeatureFlag]\r
141 gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c\r
142 gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d\r
143\r
144 ## This feature flag enables SMM/SMRAM support. Note that it also requires\r
145 # such support from the underlying QEMU instance; if that support is not\r
146 # present, the firmware will reject continuing after a certain point.\r
147 #\r
148 # The flag also acts as a general "security switch"; when TRUE, many\r
149 # components will change behavior, with the goal of preventing a malicious\r
150 # runtime OS from tampering with firmware structures (special memory ranges\r
151 # used by OVMF, the varstore pflash chip, LockBox etc).\r
152 gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|FALSE|BOOLEAN|0x1e\r