[mirror_edk2.git] / OvmfPkg / OvmfPkgIa32.fdf

## @file\r
#  Open Virtual Machine Firmware: FDF\r
#\r
#  Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>\r
#\r
#  This program and the accompanying materials\r
#  are licensed and made available under the terms and conditions of the BSD License\r
#  which accompanies this distribution. The full text of the license may be found at\r
#  http://opensource.org/licenses/bsd-license.php\r
#\r
#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
#\r
##\r
\r
################################################################################\r
\r
#\r
# Default flash size for DEBUG build is 2MB. For RELEASE it is 1MB.\r
#\r
# Defining FD_SIZE_1MB or FD_SIZE_2MB on the build command line can\r
# override this.\r
#\r
[Defines]\r
!if $(TARGET) == RELEASE\r
!ifndef $(FD_SIZE_2MB)\r
DEFINE FD_SIZE_1MB=\r
!endif\r
!endif\r
\r
!ifdef $(FD_SIZE_1MB)\r
[FD.OVMF]\r
BaseAddress   = 0xFFF00000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress\r
Size          = 0x00100000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize\r
ErasePolarity = 1\r
BlockSize     = 0x1000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize\r
NumBlocks     = 0x100\r
!else\r
[FD.OVMF]\r
BaseAddress   = 0xFFE00000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress\r
Size          = 0x00200000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize\r
ErasePolarity = 1\r
BlockSize     = 0x1000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize\r
NumBlocks     = 0x200\r
!endif\r
\r
!include VarStore.fdf.inc\r
\r
!ifdef $(FD_SIZE_1MB)\r
0x00020000|0x000CC000\r
FV = FVMAIN_COMPACT\r
\r
0x000EC000|0x14000\r
FV = SECFV\r
\r
!else\r
0x00020000|0x001AC000\r
FV = FVMAIN_COMPACT\r
\r
0x001CC000|0x34000\r
FV = SECFV\r
!endif\r
\r
################################################################################\r
\r
[FD.MEMFD]\r
BaseAddress   = 0x800000\r
Size          = 0x900000\r
ErasePolarity = 1\r
BlockSize     = 0x10000\r
NumBlocks     = 0x90\r
\r
0x000000|0x006000\r
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize\r
\r
0x006000|0x001000\r
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize\r
\r
0x007000|0x001000\r
gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress|gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize\r
\r
0x010000|0x008000\r
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize\r
\r
0x018000|0x008000\r
gUefiOvmfPkgTokenSpaceGuid.PcdS3AcpiReservedMemoryBase|gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdS3AcpiReservedMemorySize\r
\r
0x020000|0x0E0000\r
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize\r
FV = PEIFV\r
\r
0x100000|0x800000\r
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize\r
FV = DXEFV\r
\r
################################################################################\r
\r
[FV.SECFV]\r
BlockSize          = 0x1000\r
FvAlignment        = 16\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
#\r
# SEC Phase modules\r
#\r
# The code in this FV handles the initial firmware startup, and\r
# decompresses the PEI and DXE FVs which handles the rest of the boot sequence.\r
#\r
INF  OvmfPkg/Sec/SecMain.inf\r
\r
INF  RuleOverride=RESET_VECTOR UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf\r
\r
################################################################################\r
[FV.PEIFV]\r
BlockSize          = 0x10000\r
FvAlignment        = 16\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
APRIORI PEI {\r
  INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
}\r
\r
#\r
#  PEI Phase modules\r
#\r
INF  MdeModulePkg/Core/Pei/PeiMain.inf\r
INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
INF  IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
INF  OvmfPkg/PlatformPei/PlatformPei.inf\r
INF  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
INF  UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf\r
\r
################################################################################\r
\r
[FV.DXEFV]\r
BlockSize          = 0x10000\r
FvAlignment        = 16\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
APRIORI DXE {\r
  INF  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
  INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
  INF  OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf\r
}\r
\r
#\r
# DXE Phase modules\r
#\r
INF  MdeModulePkg/Core/Dxe/DxeMain.inf\r
\r
INF  IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf\r
INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
\r
INF  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
INF  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
INF  MdeModulePkg/Universal/EbcDxe/EbcDxe.inf\r
INF  PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf\r
INF  UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
INF  UefiCpuPkg/CpuDxe/CpuDxe.inf\r
INF  PcAtChipsetPkg/8254TimerDxe/8254Timer.inf\r
INF  PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf\r
INF  MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
INF  PcAtChipsetPkg/KbcResetDxe/Reset.inf\r
INF  MdeModulePkg/Universal/Metronome/Metronome.inf\r
INF  PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
\r
INF  OvmfPkg/BlockMmioToBlockIoDxe/BlockIo.inf\r
INF  OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf\r
INF  OvmfPkg/VirtioBlkDxe/VirtioBlk.inf\r
INF  OvmfPkg/VirtioScsiDxe/VirtioScsi.inf\r
INF  OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf\r
INF  OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf\r
INF  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
\r
!if $(SECURE_BOOT_ENABLE) == TRUE\r
  INF  SecurityPkg/VariableAuthenticated/RuntimeDxe/VariableRuntimeDxe.inf\r
  INF  OvmfPkg/SecureBootConfigDxe/SecureBootConfigDxe.inf\r
!else\r
  INF  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
!endif\r
\r
INF  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
INF  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
INF  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
INF  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
INF  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
INF  MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
INF  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
INF  IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf\r
INF  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
INF  MdeModulePkg/Universal/PrintDxe/PrintDxe.inf\r
INF  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
INF  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
INF  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
INF  MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf\r
INF  MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf\r
INF  IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf\r
INF  PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/IdeControllerDxe.inf\r
INF  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
INF  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
INF  MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
INF  MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r
\r
INF  PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf\r
INF  IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf\r
\r
!ifndef $(SOURCE_DEBUG_ENABLE)\r
INF  IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf\r
!endif\r
\r
INF  IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf\r
INF  IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyDxe.inf\r
\r
INF  MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
INF  OvmfPkg/SmbiosPlatformDxe/SmbiosPlatformDxe.inf\r
\r
INF  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf\r
INF  OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf\r
INF  RuleOverride=ACPITABLE OvmfPkg/AcpiTables/AcpiTables.inf\r
INF  OvmfPkg/AcpiS3SaveDxe/AcpiS3SaveDxe.inf\r
INF  MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf\r
INF  MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf\r
\r
INF  RuleOverride = BINARY FatBinPkg/EnhancedFatDxe/Fat.inf\r
\r
!ifndef $(USE_OLD_SHELL)\r
INF  ShellPkg/Application/Shell/Shell.inf\r
!else\r
INF  RuleOverride = BINARY EdkShellBinPkg/FullShell/FullShell.inf\r
!endif\r
\r
FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {\r
  SECTION RAW = MdeModulePkg/Logo/Logo.bmp\r
}\r
\r
#\r
# Network modules\r
#\r
!if $(E1000_ENABLE)\r
  FILE DRIVER = 5D695E11-9B3F-4b83-B25F-4A8D5D69BE07 {\r
    SECTION PE32 = Intel3.5/EFI32/E3507E2.EFI\r
  }\r
!endif\r
  INF  MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf\r
  INF  MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf\r
  INF  MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf\r
  INF  MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf\r
  INF  MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf\r
  INF  MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf\r
  INF  MdeModulePkg/Universal/Network/Ip4ConfigDxe/Ip4ConfigDxe.inf\r
  INF  MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf\r
  INF  MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf\r
  INF  MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf\r
  INF  MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf\r
  INF  MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
  INF  MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf\r
  INF  OvmfPkg/VirtioNetDxe/VirtioNet.inf\r
\r
#\r
# Usb Support\r
#\r
INF  MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf\r
INF  MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf\r
INF  MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf\r
INF  MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf\r
INF  MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf\r
\r
!ifdef $(CSM_ENABLE)\r
INF  IntelFrameworkModulePkg/Csm/BiosThunk/VideoDxe/VideoDxe.inf\r
INF  IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf\r
INF  RuleOverride=CSM OvmfPkg/Csm/Csm16/Csm16.inf\r
!endif\r
\r
INF  OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf\r
INF  OvmfPkg/PlatformDxe/Platform.inf\r
\r
################################################################################\r
\r
[FV.FVMAIN_COMPACT]\r
FvAlignment        = 16\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
   SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
     #\r
     # These firmware volumes will have files placed in them uncompressed,\r
     # and then both firmware volumes will be compressed in a single\r
     # compression operation in order to achieve better overall compression.\r
     #\r
     SECTION FV_IMAGE = PEIFV\r
     SECTION FV_IMAGE = DXEFV\r
   }\r
 }\r
\r
################################################################################\r
\r
[Rule.Common.SEC]\r
  FILE SEC = $(NAMED_GUID) {\r
    PE32     PE32           $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI       STRING ="$(MODULE_NAME)" Optional\r
    VERSION  STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.PEI_CORE]\r
  FILE PEI_CORE = $(NAMED_GUID) {\r
    PE32     PE32   Align=32    $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI       STRING ="$(MODULE_NAME)" Optional\r
    VERSION  STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.PEIM]\r
  FILE PEIM = $(NAMED_GUID) {\r
     PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex\r
     PE32      PE32   Align=32           $(INF_OUTPUT)/$(MODULE_NAME).efi\r
     UI       STRING="$(MODULE_NAME)" Optional\r
     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.DXE_CORE]\r
  FILE DXE_CORE = $(NAMED_GUID) {\r
    PE32     PE32           $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI       STRING="$(MODULE_NAME)" Optional\r
    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.DXE_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX    DXE_DEPEX Optional      $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI       STRING="$(MODULE_NAME)" Optional\r
    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.DXE_RUNTIME_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX    DXE_DEPEX Optional      $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI       STRING="$(MODULE_NAME)" Optional\r
    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.UEFI_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX    DXE_DEPEX Optional      $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI       STRING="$(MODULE_NAME)" Optional\r
    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.UEFI_DRIVER.BINARY]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX DXE_DEPEX Optional      |.depex\r
    PE32      PE32                    |.efi\r
    UI        STRING="$(MODULE_NAME)" Optional\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.UEFI_APPLICATION]\r
  FILE APPLICATION = $(NAMED_GUID) {\r
    PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI       STRING="$(MODULE_NAME)" Optional\r
    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.UEFI_APPLICATION.BINARY]\r
  FILE APPLICATION = $(NAMED_GUID) {\r
    PE32      PE32                    |.efi\r
    UI        STRING="$(MODULE_NAME)" Optional\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.USER_DEFINED.ACPITABLE]\r
  FILE FREEFORM = $(NAMED_GUID) {\r
    RAW ACPI               |.acpi\r
    RAW ASL                |.aml\r
  }\r
\r
[Rule.Common.USER_DEFINED.CSM]\r
  FILE FREEFORM = $(NAMED_GUID) {\r
    RAW BIN                |.bin\r
  }\r
\r
[Rule.Common.SEC.RESET_VECTOR]\r
  FILE RAW = $(NAMED_GUID) {\r
    RAW RAW                |.raw\r
  }\r
Commit	Line	Data
	1	## @file\r
	2	# Open Virtual Machine Firmware: FDF\r
	3	#\r
	4	# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>\r
	5	#\r
	6	# This program and the accompanying materials\r
	7	# are licensed and made available under the terms and conditions of the BSD License\r
	8	# which accompanies this distribution. The full text of the license may be found at\r
	9	# http://opensource.org/licenses/bsd-license.php\r
	10	#\r
	11	# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	12	# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	13	#\r
	14	##\r
	15	\r
	16	################################################################################\r
	17	\r
	18	#\r
	19	# Default flash size for DEBUG build is 2MB. For RELEASE it is 1MB.\r
	20	#\r
	21	# Defining FD_SIZE_1MB or FD_SIZE_2MB on the build command line can\r
	22	# override this.\r
	23	#\r
	24	[Defines]\r
	25	!if $(TARGET) == RELEASE\r
	26	!ifndef $(FD_SIZE_2MB)\r
	27	DEFINE FD_SIZE_1MB=\r
	28	!endif\r
	29	!endif\r
	30	\r
	31	!ifdef $(FD_SIZE_1MB)\r
	32	[FD.OVMF]\r
	33	BaseAddress = 0xFFF00000\|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress\r
	34	Size = 0x00100000\|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize\r
	35	ErasePolarity = 1\r
	36	BlockSize = 0x1000\|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize\r
	37	NumBlocks = 0x100\r
	38	!else\r
	39	[FD.OVMF]\r
	40	BaseAddress = 0xFFE00000\|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress\r
	41	Size = 0x00200000\|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize\r
	42	ErasePolarity = 1\r
	43	BlockSize = 0x1000\|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize\r
	44	NumBlocks = 0x200\r
	45	!endif\r
	46	\r
	47	!include VarStore.fdf.inc\r
	48	\r
	49	!ifdef $(FD_SIZE_1MB)\r
	50	0x00020000\|0x000CC000\r
	51	FV = FVMAIN_COMPACT\r
	52	\r
	53	0x000EC000\|0x14000\r
	54	FV = SECFV\r
	55	\r
	56	!else\r
	57	0x00020000\|0x001AC000\r
	58	FV = FVMAIN_COMPACT\r
	59	\r
	60	0x001CC000\|0x34000\r
	61	FV = SECFV\r
	62	!endif\r
	63	\r
	64	################################################################################\r
	65	\r
	66	[FD.MEMFD]\r
	67	BaseAddress = 0x800000\r
	68	Size = 0x900000\r
	69	ErasePolarity = 1\r
	70	BlockSize = 0x10000\r
	71	NumBlocks = 0x90\r
	72	\r
	73	0x000000\|0x006000\r
	74	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase\|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize\r
	75	\r
	76	0x006000\|0x001000\r
	77	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase\|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize\r
	78	\r
	79	0x007000\|0x001000\r
	80	gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress\|gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize\r
	81	\r
	82	0x010000\|0x008000\r
	83	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase\|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize\r
	84	\r
	85	0x018000\|0x008000\r
	86	gUefiOvmfPkgTokenSpaceGuid.PcdS3AcpiReservedMemoryBase\|gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdS3AcpiReservedMemorySize\r
	87	\r
	88	0x020000\|0x0E0000\r
	89	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase\|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize\r
	90	FV = PEIFV\r
	91	\r
	92	0x100000\|0x800000\r
	93	gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase\|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize\r
	94	FV = DXEFV\r
	95	\r
	96	################################################################################\r
	97	\r
	98	[FV.SECFV]\r
	99	BlockSize = 0x1000\r
	100	FvAlignment = 16\r
	101	ERASE_POLARITY = 1\r
	102	MEMORY_MAPPED = TRUE\r
	103	STICKY_WRITE = TRUE\r
	104	LOCK_CAP = TRUE\r
	105	LOCK_STATUS = TRUE\r
	106	WRITE_DISABLED_CAP = TRUE\r
	107	WRITE_ENABLED_CAP = TRUE\r
	108	WRITE_STATUS = TRUE\r
	109	WRITE_LOCK_CAP = TRUE\r
	110	WRITE_LOCK_STATUS = TRUE\r
	111	READ_DISABLED_CAP = TRUE\r
	112	READ_ENABLED_CAP = TRUE\r
	113	READ_STATUS = TRUE\r
	114	READ_LOCK_CAP = TRUE\r
	115	READ_LOCK_STATUS = TRUE\r
	116	\r
	117	#\r
	118	# SEC Phase modules\r
	119	#\r
	120	# The code in this FV handles the initial firmware startup, and\r
	121	# decompresses the PEI and DXE FVs which handles the rest of the boot sequence.\r
	122	#\r
	123	INF OvmfPkg/Sec/SecMain.inf\r
	124	\r
	125	INF RuleOverride=RESET_VECTOR UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf\r
	126	\r
	127	################################################################################\r
	128	[FV.PEIFV]\r
	129	BlockSize = 0x10000\r
	130	FvAlignment = 16\r
	131	ERASE_POLARITY = 1\r
	132	MEMORY_MAPPED = TRUE\r
	133	STICKY_WRITE = TRUE\r
	134	LOCK_CAP = TRUE\r
	135	LOCK_STATUS = TRUE\r
	136	WRITE_DISABLED_CAP = TRUE\r
	137	WRITE_ENABLED_CAP = TRUE\r
	138	WRITE_STATUS = TRUE\r
	139	WRITE_LOCK_CAP = TRUE\r
	140	WRITE_LOCK_STATUS = TRUE\r
	141	READ_DISABLED_CAP = TRUE\r
	142	READ_ENABLED_CAP = TRUE\r
	143	READ_STATUS = TRUE\r
	144	READ_LOCK_CAP = TRUE\r
	145	READ_LOCK_STATUS = TRUE\r
	146	\r
	147	APRIORI PEI {\r
	148	INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
	149	}\r
	150	\r
	151	#\r
	152	# PEI Phase modules\r
	153	#\r
	154	INF MdeModulePkg/Core/Pei/PeiMain.inf\r
	155	INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
	156	INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
	157	INF OvmfPkg/PlatformPei/PlatformPei.inf\r
	158	INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
	159	INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf\r
	160	\r
	161	################################################################################\r
	162	\r
	163	[FV.DXEFV]\r
	164	BlockSize = 0x10000\r
	165	FvAlignment = 16\r
	166	ERASE_POLARITY = 1\r
	167	MEMORY_MAPPED = TRUE\r
	168	STICKY_WRITE = TRUE\r
	169	LOCK_CAP = TRUE\r
	170	LOCK_STATUS = TRUE\r
	171	WRITE_DISABLED_CAP = TRUE\r
	172	WRITE_ENABLED_CAP = TRUE\r
	173	WRITE_STATUS = TRUE\r
	174	WRITE_LOCK_CAP = TRUE\r
	175	WRITE_LOCK_STATUS = TRUE\r
	176	READ_DISABLED_CAP = TRUE\r
	177	READ_ENABLED_CAP = TRUE\r
	178	READ_STATUS = TRUE\r
	179	READ_LOCK_CAP = TRUE\r
	180	READ_LOCK_STATUS = TRUE\r
	181	\r
	182	APRIORI DXE {\r
	183	INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
	184	INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
	185	INF OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf\r
	186	}\r
	187	\r
	188	#\r
	189	# DXE Phase modules\r
	190	#\r
	191	INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
	192	\r
	193	INF IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf\r
	194	INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
	195	\r
	196	INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
	197	INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
	198	INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf\r
	199	INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf\r
	200	INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
	201	INF UefiCpuPkg/CpuDxe/CpuDxe.inf\r
	202	INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf\r
	203	INF PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf\r
	204	INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
	205	INF PcAtChipsetPkg/KbcResetDxe/Reset.inf\r
	206	INF MdeModulePkg/Universal/Metronome/Metronome.inf\r
	207	INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
	208	\r
	209	INF OvmfPkg/BlockMmioToBlockIoDxe/BlockIo.inf\r
	210	INF OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf\r
	211	INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf\r
	212	INF OvmfPkg/VirtioScsiDxe/VirtioScsi.inf\r
	213	INF OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf\r
	214	INF OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf\r
	215	INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
	216	\r
	217	!if $(SECURE_BOOT_ENABLE) == TRUE\r
	218	INF SecurityPkg/VariableAuthenticated/RuntimeDxe/VariableRuntimeDxe.inf\r
	219	INF OvmfPkg/SecureBootConfigDxe/SecureBootConfigDxe.inf\r
	220	!else\r
	221	INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
	222	!endif\r
	223	\r
	224	INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
	225	INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
	226	INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
	227	INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
	228	INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
	229	INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
	230	INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
	231	INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf\r
	232	INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
	233	INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf\r
	234	INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
	235	INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
	236	INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
	237	INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf\r
	238	INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf\r
	239	INF IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf\r
	240	INF PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/IdeControllerDxe.inf\r
	241	INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
	242	INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
	243	INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
	244	INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r
	245	\r
	246	INF PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf\r
	247	INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf\r
	248	\r
	249	!ifndef $(SOURCE_DEBUG_ENABLE)\r
	250	INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf\r
	251	!endif\r
	252	\r
	253	INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf\r
	254	INF IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyDxe.inf\r
	255	\r
	256	INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
	257	INF OvmfPkg/SmbiosPlatformDxe/SmbiosPlatformDxe.inf\r
	258	\r
	259	INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf\r
	260	INF OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf\r
	261	INF RuleOverride=ACPITABLE OvmfPkg/AcpiTables/AcpiTables.inf\r
	262	INF OvmfPkg/AcpiS3SaveDxe/AcpiS3SaveDxe.inf\r
	263	INF MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf\r
	264	INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf\r
	265	\r
	266	INF RuleOverride = BINARY FatBinPkg/EnhancedFatDxe/Fat.inf\r
	267	\r
	268	!ifndef $(USE_OLD_SHELL)\r
	269	INF ShellPkg/Application/Shell/Shell.inf\r
	270	!else\r
	271	INF RuleOverride = BINARY EdkShellBinPkg/FullShell/FullShell.inf\r
	272	!endif\r
	273	\r
	274	FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {\r
	275	SECTION RAW = MdeModulePkg/Logo/Logo.bmp\r
	276	}\r
	277	\r
	278	#\r
	279	# Network modules\r
	280	#\r
	281	!if $(E1000_ENABLE)\r
	282	FILE DRIVER = 5D695E11-9B3F-4b83-B25F-4A8D5D69BE07 {\r
	283	SECTION PE32 = Intel3.5/EFI32/E3507E2.EFI\r
	284	}\r
	285	!endif\r
	286	INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf\r
	287	INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf\r
	288	INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf\r
	289	INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf\r
	290	INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf\r
	291	INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf\r
	292	INF MdeModulePkg/Universal/Network/Ip4ConfigDxe/Ip4ConfigDxe.inf\r
	293	INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf\r
	294	INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf\r
	295	INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf\r
	296	INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf\r
	297	INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
	298	INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf\r
	299	INF OvmfPkg/VirtioNetDxe/VirtioNet.inf\r
	300	\r
	301	#\r
	302	# Usb Support\r
	303	#\r
	304	INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf\r
	305	INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf\r
	306	INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf\r
	307	INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf\r
	308	INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf\r
	309	\r
	310	!ifdef $(CSM_ENABLE)\r
	311	INF IntelFrameworkModulePkg/Csm/BiosThunk/VideoDxe/VideoDxe.inf\r
	312	INF IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf\r
	313	INF RuleOverride=CSM OvmfPkg/Csm/Csm16/Csm16.inf\r
	314	!endif\r
	315	\r
	316	INF OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf\r
	317	INF OvmfPkg/PlatformDxe/Platform.inf\r
	318	\r
	319	################################################################################\r
	320	\r
	321	[FV.FVMAIN_COMPACT]\r
	322	FvAlignment = 16\r
	323	ERASE_POLARITY = 1\r
	324	MEMORY_MAPPED = TRUE\r
	325	STICKY_WRITE = TRUE\r
	326	LOCK_CAP = TRUE\r
	327	LOCK_STATUS = TRUE\r
	328	WRITE_DISABLED_CAP = TRUE\r
	329	WRITE_ENABLED_CAP = TRUE\r
	330	WRITE_STATUS = TRUE\r
	331	WRITE_LOCK_CAP = TRUE\r
	332	WRITE_LOCK_STATUS = TRUE\r
	333	READ_DISABLED_CAP = TRUE\r
	334	READ_ENABLED_CAP = TRUE\r
	335	READ_STATUS = TRUE\r
	336	READ_LOCK_CAP = TRUE\r
	337	READ_LOCK_STATUS = TRUE\r
	338	\r
	339	FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
	340	SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
	341	#\r
	342	# These firmware volumes will have files placed in them uncompressed,\r
	343	# and then both firmware volumes will be compressed in a single\r
	344	# compression operation in order to achieve better overall compression.\r
	345	#\r
	346	SECTION FV_IMAGE = PEIFV\r
	347	SECTION FV_IMAGE = DXEFV\r
	348	}\r
	349	}\r
	350	\r
	351	################################################################################\r
	352	\r
	353	[Rule.Common.SEC]\r
	354	FILE SEC = $(NAMED_GUID) {\r
	355	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	356	UI STRING ="$(MODULE_NAME)" Optional\r
	357	VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
	358	}\r
	359	\r
	360	[Rule.Common.PEI_CORE]\r
	361	FILE PEI_CORE = $(NAMED_GUID) {\r
	362	PE32 PE32 Align=32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	363	UI STRING ="$(MODULE_NAME)" Optional\r
	364	VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
	365	}\r
	366	\r
	367	[Rule.Common.PEIM]\r
	368	FILE PEIM = $(NAMED_GUID) {\r
	369	PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	370	PE32 PE32 Align=32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	371	UI STRING="$(MODULE_NAME)" Optional\r
	372	VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
	373	}\r
	374	\r
	375	[Rule.Common.DXE_CORE]\r
	376	FILE DXE_CORE = $(NAMED_GUID) {\r
	377	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	378	UI STRING="$(MODULE_NAME)" Optional\r
	379	VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
	380	}\r
	381	\r
	382	[Rule.Common.DXE_DRIVER]\r
	383	FILE DRIVER = $(NAMED_GUID) {\r
	384	DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	385	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	386	UI STRING="$(MODULE_NAME)" Optional\r
	387	VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
	388	}\r
	389	\r
	390	[Rule.Common.DXE_RUNTIME_DRIVER]\r
	391	FILE DRIVER = $(NAMED_GUID) {\r
	392	DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	393	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	394	UI STRING="$(MODULE_NAME)" Optional\r
	395	VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
	396	}\r
	397	\r
	398	[Rule.Common.UEFI_DRIVER]\r
	399	FILE DRIVER = $(NAMED_GUID) {\r
	400	DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	401	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	402	UI STRING="$(MODULE_NAME)" Optional\r
	403	VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
	404	}\r
	405	\r
	406	[Rule.Common.UEFI_DRIVER.BINARY]\r
	407	FILE DRIVER = $(NAMED_GUID) {\r
	408	DXE_DEPEX DXE_DEPEX Optional \|.depex\r
	409	PE32 PE32 \|.efi\r
	410	UI STRING="$(MODULE_NAME)" Optional\r
	411	VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
	412	}\r
	413	\r
	414	[Rule.Common.UEFI_APPLICATION]\r
	415	FILE APPLICATION = $(NAMED_GUID) {\r
	416	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	417	UI STRING="$(MODULE_NAME)" Optional\r
	418	VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
	419	}\r
	420	\r
	421	[Rule.Common.UEFI_APPLICATION.BINARY]\r
	422	FILE APPLICATION = $(NAMED_GUID) {\r
	423	PE32 PE32 \|.efi\r
	424	UI STRING="$(MODULE_NAME)" Optional\r
	425	VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
	426	}\r
	427	\r
	428	[Rule.Common.USER_DEFINED.ACPITABLE]\r
	429	FILE FREEFORM = $(NAMED_GUID) {\r
	430	RAW ACPI \|.acpi\r
	431	RAW ASL \|.aml\r
	432	}\r
	433	\r
	434	[Rule.Common.USER_DEFINED.CSM]\r
	435	FILE FREEFORM = $(NAMED_GUID) {\r
	436	RAW BIN \|.bin\r
	437	}\r
	438	\r
	439	[Rule.Common.SEC.RESET_VECTOR]\r
	440	FILE RAW = $(NAMED_GUID) {\r
	441	RAW RAW \|.raw\r
	442	}\r