[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / X64 / Cet.nasm

;------------------------------------------------------------------------------ ;\r
; Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>\r
; SPDX-License-Identifier: BSD-2-Clause-Patent\r
;\r
;-------------------------------------------------------------------------------\r
\r
%include "Nasm.inc"\r
\r
DEFAULT REL\r
SECTION .text\r
\r
global ASM_PFX(DisableCet)\r
ASM_PFX(DisableCet):\r
\r
    ; Skip the pushed data for call\r
    mov     rax, 1\r
    INCSSP_RAX\r
\r
    mov     rax, cr4\r
    btr     eax, 23                      ; clear CET\r
    mov     cr4, rax\r
    ret\r
\r
global ASM_PFX(EnableCet)\r
ASM_PFX(EnableCet):\r
\r
    mov     rax, cr4\r
    bts     eax, 23                      ; set CET\r
    mov     cr4, rax\r
\r
    ; use jmp to skip the check for ret\r
    pop     rax\r
    jmp     rax\r
\r
Commit	Line	Data
	1	;------------------------------------------------------------------------------ ;\r
	2	; Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>\r
	3	; SPDX-License-Identifier: BSD-2-Clause-Patent\r
	4	;\r
	5	;-------------------------------------------------------------------------------\r
	6	\r
	7	%include "Nasm.inc"\r
	8	\r
	9	DEFAULT REL\r
	10	SECTION .text\r
	11	\r
	12	global ASM_PFX(DisableCet)\r
	13	ASM_PFX(DisableCet):\r
	14	\r
	15	; Skip the pushed data for call\r
	16	mov rax, 1\r
	17	INCSSP_RAX\r
	18	\r
	19	mov rax, cr4\r
	20	btr eax, 23 ; clear CET\r
	21	mov cr4, rax\r
	22	ret\r
	23	\r
	24	global ASM_PFX(EnableCet)\r
	25	ASM_PFX(EnableCet):\r
	26	\r
	27	mov rax, cr4\r
	28	bts eax, 23 ; set CET\r
	29	mov cr4, rax\r
	30	\r
	31	; use jmp to skip the check for ret\r
	32	pop rax\r
	33	jmp rax\r
	34	\r