UefiCpuPkg: Replace BSD License with BSD+Patent License

[mirror_edk2.git] / UefiCpuPkg / ResetVector / Vtf0 / Ia16 / ResetVectorVtf0.asm

;------------------------------------------------------------------------------\r
; @file\r
; First code executed by processor after resetting.\r
;\r
; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>\r
; SPDX-License-Identifier: BSD-2-Clause-Patent\r
;\r
;------------------------------------------------------------------------------\r
\r
BITS    16\r
\r
ALIGN   16\r
\r
;\r
; Pad the image size to 4k when page tables are in VTF0\r
;\r
; If the VTF0 image has page tables built in, then we need to make\r
; sure the end of VTF0 is 4k above where the page tables end.\r
;\r
; This is required so the page tables will be 4k aligned when VTF0 is\r
; located just below 0x100000000 (4GB) in the firmware device.\r
;\r
%ifdef ALIGN_TOP_TO_4K_FOR_PAGING\r
    TIMES (0x1000 - ($ - EndOfPageTables) - 0x20) DB 0\r
%endif\r
\r
applicationProcessorEntryPoint:\r
;\r
; Application Processors entry point\r
;\r
; GenFv generates code aligned on a 4k boundary which will jump to this\r
; location.  (0xffffffe0)  This allows the Local APIC Startup IPI to be\r
; used to wake up the application processors.\r
;\r
    jmp     EarlyApInitReal16\r
\r
ALIGN   8\r
\r
    DD      0\r
\r
;\r
; The VTF signature\r
;\r
; VTF-0 means that the VTF (Volume Top File) code does not require\r
; any fixups.\r
;\r
vtfSignature:\r
    DB      'V', 'T', 'F', 0\r
\r
ALIGN   16\r
\r
resetVector:\r
;\r
; Reset Vector\r
;\r
; This is where the processor will begin execution\r
;\r
    nop\r
    nop\r
    jmp     EarlyBspInitReal16\r
\r
ALIGN   16\r
\r
fourGigabytes:\r
\r