Fix a bug that Dhcp6CalculateLeaseTime() function use incorrect offset on the IaAddre...

[mirror_edk2.git] / ArmPkg / ArmPkg.dec

diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index 5efef7c9d61bd7a02313718cdb6ee1415ab8c282..31427514492e54ea6d5c821d4565e42c0a036ea1 100644 (file)
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -65,8 +65,9 @@
   # it has been configured by the CPU DXE\r
   gArmTokenSpaceGuid.PcdDebuggerExceptionSupport|FALSE|BOOLEAN|0x00000032\r
 \r
-  # Define if the Power State Coordination Interface (PSCI) is supported by the Platform Trusted Firmware\r
-  gArmTokenSpaceGuid.PcdArmPsciSupport|FALSE|BOOLEAN|0x00000033\r
+  # Define if the spin-table mechanism is used by the secondary cores when booting\r
+  # Linux (instead of PSCI)\r
+  gArmTokenSpaceGuid.PcdArmLinuxSpinTable|FALSE|BOOLEAN|0x00000033\r
 \r
 [PcdsFixedAtBuild.common]\r
   gArmTokenSpaceGuid.PcdTrustzoneSupport|FALSE|BOOLEAN|0x00000006\r
@@ -80,13 +81,6 @@
   gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT32|0x00000004\r
   gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005\r
 \r
-  #\r
-  # ARM Generic Interrupt Controller\r
-  #\r
-  gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C\r
-  gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D\r
-  gArmTokenSpaceGuid.PcdGicSgiIntId|0|UINT32|0x00000025\r
-\r
   #\r
   # ARM Secure Firmware PCDs\r
   #\r
@@ -111,12 +105,6 @@
   gArmTokenSpaceGuid.PcdHypFvBaseAddress|0|UINT32|0x0000003C\r
   gArmTokenSpaceGuid.PcdHypFvSize|0|UINT32|0x0000003D\r
 \r
-  # System Memory (DRAM): These PCDs define the region of in-built system memory\r
-  # Some platforms can get DRAM extensions, these additional regions will be declared\r
-  # to UEFI by ArmPlatformLib\r
-  gArmTokenSpaceGuid.PcdSystemMemoryBase|0|UINT64|0x00000029\r
-  gArmTokenSpaceGuid.PcdSystemMemorySize|0|UINT64|0x0000002A\r
-\r
   # Use ClusterId + CoreId to identify the PrimaryCore\r
   gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0xF03|UINT32|0x00000031\r
   # The Primary Core is ClusterId[0] & CoreId[0]\r
@@ -133,14 +121,9 @@
   gArmTokenSpaceGuid.PcdArmMachineType|0|UINT32|0x0000001E\r
   # The compressed Linux kernel is expected to be under 128MB from the beginning of the System Memory\r
   gArmTokenSpaceGuid.PcdArmLinuxKernelMaxOffset|0x08000000|UINT32|0x0000001F\r
+  # Maximum file size for TFTP servers that do not support 'tsize' extension\r
+  gArmTokenSpaceGuid.PcdMaxTftpFileSize|0x01000000|UINT32|0x00000000\r
 \r
-  #\r
-  # ARM Architectural Timer\r
-  #\r
-  gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0|UINT32|0x00000034\r
-  # ARM Architectural Timer Interrupt(GIC PPI) number\r
-  gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum|29|UINT32|0x00000035\r
-  gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|30|UINT32|0x00000036\r
 \r
 [PcdsFixedAtBuild.ARM]\r
   #\r
@@ -218,3 +201,41 @@
   gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset|0x20000000|UINT32|0x00000023\r
   # The FDT blob must be loaded at a 2MB aligned address.\r
   gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment|0x00200000|UINT32|0x00000026\r
+\r
+\r
+#\r
+# These PCDs are also defined as 'PcdsDynamic' to be redefined when using UEFI in a\r
+# context of virtual machine.\r
+#\r
+[PcdsFixedAtBuild.common, PcdsDynamic.common]\r
+  # System Memory (DRAM): These PCDs define the region of in-built system memory\r
+  # Some platforms can get DRAM extensions, these additional regions will be declared\r
+  # to UEFI by ArmPlatformLib\r
+  gArmTokenSpaceGuid.PcdSystemMemoryBase|0|UINT64|0x00000029\r
+  gArmTokenSpaceGuid.PcdSystemMemorySize|0|UINT64|0x0000002A\r
+\r
+  #\r
+  # ARM Architectural Timer\r
+  #\r
+  gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0|UINT32|0x00000034\r
+\r
+  # ARM Architectural Timer Interrupt(GIC PPI) numbers\r
+  gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum|29|UINT32|0x00000035\r
+  gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|30|UINT32|0x00000036\r
+  gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum|26|UINT32|0x00000040\r
+  gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|27|UINT32|0x00000041\r
+\r
+  #\r
+  # ARM Generic Interrupt Controller\r
+  #\r
+  gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C\r
+  gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D\r
+  gArmTokenSpaceGuid.PcdGicSgiIntId|0|UINT32|0x00000025\r
+\r
+  #\r
+  # ARM PSCI function invocations can be done either through hypervisor\r
+  # calls (HVC) or secure monitor calls (SMC).\r
+  # PcdArmPsciMethod == 1 : use HVC\r
+  # PcdArmPsciMethod == 2 : use SMC\r
+  #\r
+  gArmTokenSpaceGuid.PcdArmPsciMethod|0|UINT32|0x00000042\r