BaseTools: Library hashing fix and optimization for --hash feature

[mirror_edk2.git] / ArmPkg / ArmPkg.dec

diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index 0db7aa9d301c8de922ba58d629f7021249201760..39ff339c956d97a7d2fd9e01f00a24dcc5c15f3e 100644 (file)
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -4,13 +4,7 @@
 # Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>\r
 # Copyright (c) 2011 - 2018, ARM Limited. All rights reserved.\r
 #\r
-#    This program and the accompanying materials\r
-#    are licensed and made available under the terms and conditions of the BSD License\r
-#    which accompanies this distribution. The full text of the license may be found at\r
-#    http://opensource.org/licenses/bsd-license.php\r
-#\r
-#    THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-#    WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#    SPDX-License-Identifier: BSD-2-Clause-Patent\r
 #\r
 #**/\r
 \r
@@ -42,6 +36,7 @@
   ArmMtlLib|ArmPlatformPkg/Include/Library/ArmMtlLib.h\r
   ArmSvcLib|Include/Library/ArmSvcLib.h\r
   OpteeLib|Include/Library/OpteeLib.h\r
+  StandaloneMmMmuLib|Include/Library/StandaloneMmMmuLib.h\r
 \r
 [Guids.common]\r
   gArmTokenSpaceGuid       = { 0xBB11ECFE, 0x820F, 0x4968, { 0xBB, 0xA6, 0xF7, 0x6A, 0xFE, 0x30, 0x25, 0x96 } }\r
@@ -58,6 +53,7 @@
   ## Arm System Control and Management Interface(SCMI) Clock management protocol\r
   ## ArmPkg/Include/Protocol/ArmScmiClockProtocol.h\r
   gArmScmiClockProtocolGuid = { 0x91ce67a8, 0xe0aa, 0x4012, { 0xb9, 0x9f, 0xb6, 0xfc, 0xf3, 0x4, 0x8e, 0xaa } }\r
+  gArmScmiClock2ProtocolGuid = { 0xb8d8caf2, 0x9e94, 0x462c, { 0xa8, 0x34, 0x6c, 0x99, 0xfc, 0x05, 0xef, 0xcf } }\r
 \r
   ## Arm System Control and Management Interface(SCMI) Clock management protocol\r
   ## ArmPkg/Include/Protocol/ArmScmiPerformanceProtocol.h\r
@@ -79,10 +75,6 @@
   # it has been configured by the CPU DXE\r
   gArmTokenSpaceGuid.PcdDebuggerExceptionSupport|FALSE|BOOLEAN|0x00000032\r
 \r
-  # Define if the spin-table mechanism is used by the secondary cores when booting\r
-  # Linux (instead of PSCI)\r
-  gArmTokenSpaceGuid.PcdArmLinuxSpinTable|FALSE|BOOLEAN|0x00000033\r
-\r
   # Define if the GICv3 controller should use the GICv2 legacy\r
   gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x00000042\r
 \r
@@ -172,16 +164,6 @@
   # By default we do not do a transition to non-secure mode\r
   gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x0|UINT32|0x0000003E\r
 \r
-  # The Linux ATAGs are expected to be under 0x4000 (16KB) from the beginning of the System Memory\r
-  gArmTokenSpaceGuid.PcdArmLinuxAtagMaxOffset|0x4000|UINT32|0x00000020\r
-\r
-  # If the fixed FDT address is not available, then it should be loaded below the kernel.\r
-  # The recommendation from the Linux kernel is to have the FDT below 16KB.\r
-  # (see the kernel doc: Documentation/arm/Booting)\r
-  gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset|0x4000|UINT32|0x00000023\r
-  # The FDT blob must be loaded at a 64bit aligned address.\r
-  gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment|0x8|UINT32|0x00000026\r
-\r
   # Non Secure Access Control Register\r
   # - BIT15 : NSASEDIS - Disable Non-secure Advanced SIMD functionality\r
   # - BIT14 : NSD32DIS - Disable Non-secure use of D16-D31\r
@@ -220,12 +202,6 @@
   # Other modes include using SP0 or switching to Aarch32, but these are\r
   # not currently supported.\r
   gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x3c9|UINT32|0x0000003E\r
-  # If the fixed FDT address is not available, then it should be loaded above the kernel.\r
-  # The recommendation from the AArch64 Linux kernel is to have the FDT below 512MB.\r
-  # (see the kernel doc: Documentation/arm64/booting.txt)\r
-  gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset|0x20000000|UINT32|0x00000023\r
-  # The FDT blob must be loaded at a 2MB aligned address.\r
-  gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment|0x00200000|UINT32|0x00000026\r
 \r
 \r
 #\r