ArmPkg: Declared ARM Hypervisor Firmware PCDs

[mirror_edk2.git] / ArmPkg / ArmPkg.dec

diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index c9bf606666ae297e7ca0a8edc647ed4861ddbee2..dba8928e31b3905429ef22f04deb5ff25333c94e 100644 (file)
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -65,8 +65,6 @@
   # it has been configured by the CPU DXE\r
   gArmTokenSpaceGuid.PcdDebuggerExceptionSupport|FALSE|BOOLEAN|0x00000032\r
   \r
-  gArmTokenSpaceGuid.PcdEfiUncachedMemoryToStronglyOrdered|FALSE|BOOLEAN|0x00000025\r
-\r
 [PcdsFixedAtBuild.common]\r
   gArmTokenSpaceGuid.PcdTrustzoneSupport|FALSE|BOOLEAN|0x00000006\r
 \r
@@ -85,6 +83,7 @@
   gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C\r
   gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D\r
   gArmTokenSpaceGuid.PcdGicNumInterrupts|96|UINT32|0x00000023\r
+  gArmTokenSpaceGuid.PcdGicSgiIntId|0|UINT32|0x00000025\r
 \r
   #\r
   # ARM Secure Firmware PCDs\r
@@ -101,6 +100,42 @@
   gArmTokenSpaceGuid.PcdFdSize|0|UINT32|0x0000002C\r
   gArmTokenSpaceGuid.PcdFvBaseAddress|0|UINT32|0x0000002D\r
   gArmTokenSpaceGuid.PcdFvSize|0|UINT32|0x0000002E\r
+ \r
+  #\r
+  # ARM Hypervisor Firmware PCDs\r
+  #  \r
+  gArmTokenSpaceGuid.PcdHypFdBaseAddress|0|UINT32|0x0000003A\r
+  gArmTokenSpaceGuid.PcdHypFdSize|0|UINT32|0x0000003B\r
+  gArmTokenSpaceGuid.PcdHypFvBaseAddress|0|UINT32|0x0000003C\r
+  gArmTokenSpaceGuid.PcdHypFvSize|0|UINT32|0x0000003D\r
+ \r
+  #\r
+  # ARM Security Extension\r
+  #\r
+  \r
+  # Secure Configuration Register\r
+  # - BIT0 : NS - Non Secure bit \r
+  # - BIT1 : IRQ Handler\r
+  # - BIT2 : FIQ Handler\r
+  # - BIT3 : EA - External Abort\r
+  # - BIT4 : FW - F bit writable\r
+  # - BIT5 : AW - A bit writable\r
+  # - BIT6 : nET - Not Early Termination\r
+  # - BIT7 : SCD - Secure Monitor Call Disable\r
+  # - BIT8 : HCE - Hyp Call enable\r
+  # - BIT9 : SIF - Secure Instruction Fetch\r
+  # 0x31 = NS | EA | FW\r
+  gArmTokenSpaceGuid.PcdArmScr|0x31|UINT32|0x00000038\r
+  \r
+  # Non Secure Access Control Register\r
+  # - BIT15 : NSASEDIS - Disable Non-secure Advanced SIMD functionality\r
+  # - BIT14 : NSD32DIS - Disable Non-secure use of D16-D31 \r
+  # - BIT11 : cp11 - Non-secure access to coprocessor 11 enable\r
+  # - BIT10 : cp10 - Non-secure access to coprocessor 10 enable\r
+  # 0xC00 = cp10 | cp11\r
+  gArmTokenSpaceGuid.PcdArmNsacr|0xC00|UINT32|0x00000039\r
+  \r
+  gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x0|UINT32|0x0000003E\r
 \r
   # System Memory (DRAM): These PCDs define the region of in-built system memory\r
   # Some platforms can get DRAM extensions, these additional regions will be declared\r