\r
#define ARM_GIC_DEFAULT_PRIORITY 0x80\r
\r
-extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol;\r
-extern EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V2Protocol;\r
+extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol;\r
+extern EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V2Protocol;\r
\r
-STATIC UINT32 mGicInterruptInterfaceBase;\r
-STATIC UINT32 mGicDistributorBase;\r
+STATIC UINT32 mGicInterruptInterfaceBase;\r
+STATIC UINT32 mGicDistributorBase;\r
\r
/**\r
Enable interrupt source Source.\r
EFI_STATUS\r
EFIAPI\r
GicV2EnableInterruptSource (\r
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
- IN HARDWARE_INTERRUPT_SOURCE Source\r
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
+ IN HARDWARE_INTERRUPT_SOURCE Source\r
)\r
{\r
if (Source >= mGicNumInterrupts) {\r
- ASSERT(FALSE);\r
+ ASSERT (FALSE);\r
return EFI_UNSUPPORTED;\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
GicV2DisableInterruptSource (\r
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
- IN HARDWARE_INTERRUPT_SOURCE Source\r
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
+ IN HARDWARE_INTERRUPT_SOURCE Source\r
)\r
{\r
if (Source >= mGicNumInterrupts) {\r
- ASSERT(FALSE);\r
+ ASSERT (FALSE);\r
return EFI_UNSUPPORTED;\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
GicV2GetInterruptSourceState (\r
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
- IN HARDWARE_INTERRUPT_SOURCE Source,\r
- IN BOOLEAN *InterruptState\r
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
+ IN HARDWARE_INTERRUPT_SOURCE Source,\r
+ IN BOOLEAN *InterruptState\r
)\r
{\r
if (Source >= mGicNumInterrupts) {\r
- ASSERT(FALSE);\r
+ ASSERT (FALSE);\r
return EFI_UNSUPPORTED;\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
GicV2EndOfInterrupt (\r
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
- IN HARDWARE_INTERRUPT_SOURCE Source\r
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
+ IN HARDWARE_INTERRUPT_SOURCE Source\r
)\r
{\r
if (Source >= mGicNumInterrupts) {\r
- ASSERT(FALSE);\r
+ ASSERT (FALSE);\r
return EFI_UNSUPPORTED;\r
}\r
\r
VOID\r
EFIAPI\r
GicV2IrqInterruptHandler (\r
- IN EFI_EXCEPTION_TYPE InterruptType,\r
- IN EFI_SYSTEM_CONTEXT SystemContext\r
+ IN EFI_EXCEPTION_TYPE InterruptType,\r
+ IN EFI_SYSTEM_CONTEXT SystemContext\r
)\r
{\r
UINT32 GicInterrupt;\r
}\r
\r
// The protocol instance produced by this driver\r
-EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol = {\r
+EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol = {\r
RegisterInterruptSource,\r
GicV2EnableInterruptSource,\r
GicV2DisableInterruptSource,\r
EFIAPI\r
GicV2GetTriggerType (\r
IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This,\r
- IN HARDWARE_INTERRUPT_SOURCE Source,\r
+ IN HARDWARE_INTERRUPT_SOURCE Source,\r
OUT EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE *TriggerType\r
)\r
{\r
- UINTN RegAddress;\r
- UINTN Config1Bit;\r
- EFI_STATUS Status;\r
+ UINTN RegAddress;\r
+ UINTN Config1Bit;\r
+ EFI_STATUS Status;\r
\r
Status = GicGetDistributorIcfgBaseAndBit (\r
- Source,\r
- &RegAddress,\r
- &Config1Bit\r
- );\r
+ Source,\r
+ &RegAddress,\r
+ &Config1Bit\r
+ );\r
\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
\r
if ((MmioRead32 (RegAddress) & (1 << Config1Bit)) == 0) {\r
- *TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH;\r
+ *TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH;\r
} else {\r
- *TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING;\r
+ *TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING;\r
}\r
\r
return EFI_SUCCESS;\r
IN EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE TriggerType\r
)\r
{\r
- UINTN RegAddress;\r
- UINTN Config1Bit;\r
- UINT32 Value;\r
- EFI_STATUS Status;\r
- BOOLEAN SourceEnabled;\r
-\r
- if ( (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)\r
- && (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH)) {\r
- DEBUG ((DEBUG_ERROR, "Invalid interrupt trigger type: %d\n", \\r
- TriggerType));\r
- ASSERT (FALSE);\r
- return EFI_UNSUPPORTED;\r
+ UINTN RegAddress;\r
+ UINTN Config1Bit;\r
+ UINT32 Value;\r
+ EFI_STATUS Status;\r
+ BOOLEAN SourceEnabled;\r
+\r
+ if ( (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)\r
+ && (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH))\r
+ {\r
+ DEBUG ((\r
+ DEBUG_ERROR,\r
+ "Invalid interrupt trigger type: %d\n", \\r
+ TriggerType\r
+ ));\r
+ ASSERT (FALSE);\r
+ return EFI_UNSUPPORTED;\r
}\r
\r
Status = GicGetDistributorIcfgBaseAndBit (\r
}\r
\r
Status = GicV2GetInterruptSourceState (\r
- (EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,\r
+ (EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,\r
Source,\r
&SourceEnabled\r
);\r
// otherwise GIC behavior is UNPREDICTABLE.\r
if (SourceEnabled) {\r
GicV2DisableInterruptSource (\r
- (EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,\r
+ (EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,\r
Source\r
);\r
}\r
// Restore interrupt state\r
if (SourceEnabled) {\r
GicV2EnableInterruptSource (\r
- (EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,\r
+ (EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,\r
Source\r
);\r
}\r
return EFI_SUCCESS;\r
}\r
\r
-EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V2Protocol = {\r
+EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V2Protocol = {\r
(HARDWARE_INTERRUPT2_REGISTER)RegisterInterruptSource,\r
(HARDWARE_INTERRUPT2_ENABLE)GicV2EnableInterruptSource,\r
(HARDWARE_INTERRUPT2_DISABLE)GicV2DisableInterruptSource,\r
IN VOID *Context\r
)\r
{\r
- UINTN Index;\r
- UINT32 GicInterrupt;\r
+ UINTN Index;\r
+ UINT32 GicInterrupt;\r
\r
// Disable all the interrupts\r
for (Index = 0; Index < mGicNumInterrupts; Index++) {\r
**/\r
EFI_STATUS\r
GicV2DxeInitialize (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
- EFI_STATUS Status;\r
- UINTN Index;\r
- UINT32 RegOffset;\r
- UINTN RegShift;\r
- UINT32 CpuTarget;\r
+ EFI_STATUS Status;\r
+ UINTN Index;\r
+ UINT32 RegOffset;\r
+ UINTN RegShift;\r
+ UINT32 CpuTarget;\r
\r
// Make sure the Interrupt Controller Protocol is not already installed in\r
// the system.\r
ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);\r
\r
mGicInterruptInterfaceBase = PcdGet64 (PcdGicInterruptInterfaceBase);\r
- mGicDistributorBase = PcdGet64 (PcdGicDistributorBase);\r
- mGicNumInterrupts = ArmGicGetMaxNumInterrupts (mGicDistributorBase);\r
+ mGicDistributorBase = PcdGet64 (PcdGicDistributorBase);\r
+ mGicNumInterrupts = ArmGicGetMaxNumInterrupts (mGicDistributorBase);\r
\r
for (Index = 0; Index < mGicNumInterrupts; Index++) {\r
GicV2DisableInterruptSource (&gHardwareInterruptV2Protocol, Index);\r
\r
// Set Priority\r
RegOffset = Index / 4;\r
- RegShift = (Index % 4) * 8;\r
+ RegShift = (Index % 4) * 8;\r
MmioAndThenOr32 (\r
mGicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),\r
~(0xff << RegShift),\r