ArmPkg: update RVCT assembly functions to use new RVCT_ASM_EXPORT macro

[mirror_edk2.git] / ArmPkg / Drivers / ArmGic / GicV3 / Arm / ArmGicV3.asm

diff --git a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm b/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm
index 92c3236b25bfe868a24303c909b4e1ee0886f752..4228fb59be54d80ae2a9fe25b8ed3396f7425eb8 100644 (file)
--- a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm
+++ b/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm
@@ -13,23 +13,15 @@
 \r
 // For the moment we assume this will run in SVC mode on ARMv7\r
 \r
-    EXPORT  ArmGicV3GetControlSystemRegisterEnable\r
-    EXPORT  ArmGicV3SetControlSystemRegisterEnable\r
-    EXPORT  ArmGicV3EnableInterruptInterface\r
-    EXPORT  ArmGicV3DisableInterruptInterface\r
-    EXPORT  ArmGicV3EndOfInterrupt\r
-    EXPORT  ArmGicV3AcknowledgeInterrupt\r
-    EXPORT  ArmGicV3SetPriorityMask\r
-    EXPORT  ArmGicV3SetBinaryPointer\r
 \r
-    AREA ArmGicV3, CODE, READONLY\r
+    INCLUDE AsmMacroExport.inc\r
 \r
 //UINT32\r
 //EFIAPI\r
 //ArmGicGetControlSystemRegisterEnable (\r
 //  VOID\r
 //  );\r
-ArmGicV3GetControlSystemRegisterEnable\r
+ RVCT_ASM_EXPORT ArmGicV3GetControlSystemRegisterEnable\r
         mrc     p15, 0, r0, c12, c12, 5 // ICC_SRE\r
         bx      lr\r
 \r
@@ -38,7 +30,7 @@ ArmGicV3GetControlSystemRegisterEnable
 //ArmGicSetControlSystemRegisterEnable (\r
 //  IN UINT32         ControlSystemRegisterEnable\r
 //  );\r
-ArmGicV3SetControlSystemRegisterEnable\r
+ RVCT_ASM_EXPORT ArmGicV3SetControlSystemRegisterEnable\r
         mcr     p15, 0, r0, c12, c12, 5 // ICC_SRE\r
         isb\r
         bx      lr\r
@@ -47,7 +39,7 @@ ArmGicV3SetControlSystemRegisterEnable
 //ArmGicV3EnableInterruptInterface (\r
 //  VOID\r
 //  );\r
-ArmGicV3EnableInterruptInterface\r
+ RVCT_ASM_EXPORT ArmGicV3EnableInterruptInterface\r
         mov     r0, #1\r
         mcr     p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1\r
         bx      lr\r
@@ -56,7 +48,7 @@ ArmGicV3EnableInterruptInterface
 //ArmGicV3DisableInterruptInterface (\r
 //  VOID\r
 //  );\r
-ArmGicV3DisableInterruptInterface\r
+ RVCT_ASM_EXPORT ArmGicV3DisableInterruptInterface\r
         mov     r0, #0\r
         mcr     p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1\r
         bx      lr\r
@@ -65,7 +57,7 @@ ArmGicV3DisableInterruptInterface
 //ArmGicV3EndOfInterrupt (\r
 //  IN UINTN InterruptId\r
 //  );\r
-ArmGicV3EndOfInterrupt\r
+ RVCT_ASM_EXPORT ArmGicV3EndOfInterrupt\r
         mcr     p15, 0, r0, c12, c12, 1 //ICC_EOIR1\r
         bx      lr\r
 \r
@@ -73,7 +65,7 @@ ArmGicV3EndOfInterrupt
 //ArmGicV3AcknowledgeInterrupt (\r
 //  VOID\r
 //  );\r
-ArmGicV3AcknowledgeInterrupt\r
+ RVCT_ASM_EXPORT ArmGicV3AcknowledgeInterrupt\r
         mrc     p15, 0, r0, c12, c8, 0 //ICC_IAR1\r
         bx      lr\r
 \r
@@ -81,7 +73,7 @@ ArmGicV3AcknowledgeInterrupt
 //ArmGicV3SetPriorityMask (\r
 //  IN UINTN                  Priority\r
 //  );\r
-ArmGicV3SetPriorityMask\r
+ RVCT_ASM_EXPORT ArmGicV3SetPriorityMask\r
         mcr     p15, 0, r0, c4, c6, 0 //ICC_PMR\r
         bx      lr\r
 \r
@@ -89,7 +81,7 @@ ArmGicV3SetPriorityMask
 //ArmGicV3SetBinaryPointer (\r
 //  IN UINTN                  BinaryPoint\r
 //  );\r
-ArmGicV3SetBinaryPointer\r
+ RVCT_ASM_EXPORT ArmGicV3SetBinaryPointer\r
         mcr     p15, 0, r0, c12, c12, 3 //ICC_BPR1\r
         bx      lr\r
 \r