/** @file\r
*\r
-* Copyright (c) 2011-2017, ARM Limited. All rights reserved.\r
+* Copyright (c) 2011-2018, ARM Limited. All rights reserved.\r
*\r
* This program and the accompanying materials\r
* are licensed and made available under the terms and conditions of the BSD License\r
\r
// Route the SPIs to the primary CPU. SPIs start at the INTID 32\r
for (Index = 0; Index < (mGicNumInterrupts - 32); Index++) {\r
- MmioWrite32 (\r
+ MmioWrite64 (\r
mGicDistributorBase + ARM_GICD_IROUTER + (Index * 8),\r
CpuTarget\r
);\r