ArmPkg/CpuDxe: move PageAttributeToGcdAttribute() out of ArmMmuLib

[mirror_edk2.git] / ArmPkg / Drivers / CpuDxe / AArch64 / Mmu.c

diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
index 24eb1c4221e31ff18b77914fee963923a21c3124..29fa08f9e07c0eb2844531015eb3a839e7f84379 100644 (file)
--- a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
@@ -30,6 +30,52 @@ GetRootTranslationTableInfo (
   *RootTableEntryCount  = TT_ENTRY_COUNT >> (T0SZ - MIN_T0SZ) % BITS_PER_LEVEL;\r
 }\r
 \r
+STATIC\r
+UINT64\r
+PageAttributeToGcdAttribute (\r
+  IN UINT64 PageAttributes\r
+  )\r
+{\r
+  UINT64  GcdAttributes;\r
+\r
+  switch (PageAttributes & TT_ATTR_INDX_MASK) {\r
+  case TT_ATTR_INDX_DEVICE_MEMORY:\r
+    GcdAttributes = EFI_MEMORY_UC;\r
+    break;\r
+  case TT_ATTR_INDX_MEMORY_NON_CACHEABLE:\r
+    GcdAttributes = EFI_MEMORY_WC;\r
+    break;\r
+  case TT_ATTR_INDX_MEMORY_WRITE_THROUGH:\r
+    GcdAttributes = EFI_MEMORY_WT;\r
+    break;\r
+  case TT_ATTR_INDX_MEMORY_WRITE_BACK:\r
+    GcdAttributes = EFI_MEMORY_WB;\r
+    break;\r
+  default:\r
+    DEBUG ((DEBUG_ERROR,\r
+      "PageAttributeToGcdAttribute: PageAttributes:0x%lX not supported.\n",\r
+      PageAttributes));\r
+    ASSERT (0);\r
+    // The Global Coherency Domain (GCD) value is defined as a bit set.\r
+    // Returning 0 means no attribute has been set.\r
+    GcdAttributes = 0;\r
+  }\r
+\r
+  // Determine protection attributes\r
+  if (((PageAttributes & TT_AP_MASK) == TT_AP_NO_RO) ||\r
+      ((PageAttributes & TT_AP_MASK) == TT_AP_RO_RO)) {\r
+    // Read only cases map to write-protect\r
+    GcdAttributes |= EFI_MEMORY_RO;\r
+  }\r
+\r
+  // Process eXecute Never attribute\r
+  if ((PageAttributes & (TT_PXN_MASK | TT_UXN_MASK)) != 0) {\r
+    GcdAttributes |= EFI_MEMORY_XP;\r
+  }\r
+\r
+  return GcdAttributes;\r
+}\r
+\r
 STATIC\r
 UINT64\r
 GetFirstPageAttribute (\r