Portions copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>\r
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
\r
--*/\r
\r
switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {\r
case EFI_MEMORY_UC:\r
- ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY;\r
+ if (ArmReadCurrentEL () == AARCH64_EL2) {\r
+ ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_XN_MASK;\r
+ } else {\r
+ ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK;\r
+ }\r
break;\r
case EFI_MEMORY_WC:\r
ArmAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;\r
break;\r
case EFI_MEMORY_WT:\r
- ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH;\r
+ ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH | TT_SH_INNER_SHAREABLE;\r
break;\r
case EFI_MEMORY_WB:\r
- ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK;\r
+ ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE;\r
break;\r
default:\r
ArmAttributes = TT_ATTR_INDX_MASK;\r