\r
#include "CpuDxe.h"\r
\r
+BOOLEAN mInterruptState = FALSE;\r
+\r
+\r
+/**\r
+ This function flushes the range of addresses from Start to Start+Length \r
+ from the processor's data cache. If Start is not aligned to a cache line \r
+ boundary, then the bytes before Start to the preceding cache line boundary \r
+ are also flushed. If Start+Length is not aligned to a cache line boundary, \r
+ then the bytes past Start+Length to the end of the next cache line boundary \r
+ are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be \r
+ supported. If the data cache is fully coherent with all DMA operations, then \r
+ this function can just return EFI_SUCCESS. If the processor does not support \r
+ flushing a range of the data cache, then the entire data cache can be flushed.\r
+\r
+ @param This The EFI_CPU_ARCH_PROTOCOL instance.\r
+ @param Start The beginning physical address to flush from the processor's data\r
+ cache.\r
+ @param Length The number of bytes to flush from the processor's data cache. This\r
+ function may flush more bytes than Length specifies depending upon\r
+ the granularity of the flush operation that the processor supports.\r
+ @param FlushType Specifies the type of flush operation to perform.\r
+\r
+ @retval EFI_SUCCESS The address range from Start to Start+Length was flushed from\r
+ the processor's data cache.\r
+ @retval EFI_UNSUPPORTEDT The processor does not support the cache flush type specified\r
+ by FlushType.\r
+ @retval EFI_DEVICE_ERROR The address range from Start to Start+Length could not be flushed\r
+ from the processor's data cache.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
CpuFlushCpuDataCache (\r
IN EFI_CPU_FLUSH_TYPE FlushType\r
)\r
{\r
+\r
switch (FlushType) {\r
case EfiCpuFlushTypeWriteBack:\r
- WriteBackDataCacheRange((VOID *)(UINTN)Start, (UINTN)Length);\r
+ WriteBackDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);\r
break;\r
case EfiCpuFlushTypeInvalidate:\r
- InvalidateDataCacheRange((VOID *)(UINTN)Start, (UINTN)Length);\r
+ InvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);\r
break;\r
case EfiCpuFlushTypeWriteBackInvalidate:\r
- WriteBackInvalidateDataCacheRange((VOID *)(UINTN)Start, (UINTN)Length);\r
+ WriteBackInvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);\r
break;\r
default:\r
return EFI_INVALID_PARAMETER;\r
return EFI_SUCCESS;\r
}\r
\r
+\r
+/**\r
+ This function enables interrupt processing by the processor. \r
+\r
+ @param This The EFI_CPU_ARCH_PROTOCOL instance.\r
+\r
+ @retval EFI_SUCCESS Interrupts are enabled on the processor.\r
+ @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
CpuEnableInterrupt (\r
IN EFI_CPU_ARCH_PROTOCOL *This\r
)\r
{\r
- if (ArmProcessorMode() != ARM_PROCESSOR_MODE_IRQ) {\r
- ArmEnableInterrupts(); \r
- }\r
+ ArmEnableInterrupts ();\r
+\r
+ mInterruptState = TRUE;\r
return EFI_SUCCESS;\r
}\r
\r
\r
+/**\r
+ This function disables interrupt processing by the processor.\r
+\r
+ @param This The EFI_CPU_ARCH_PROTOCOL instance.\r
+\r
+ @retval EFI_SUCCESS Interrupts are disabled on the processor.\r
+ @retval EFI_DEVICE_ERROR Interrupts could not be disabled on the processor.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
CpuDisableInterrupt (\r
IN EFI_CPU_ARCH_PROTOCOL *This\r
)\r
{\r
- if (ArmProcessorMode() != ARM_PROCESSOR_MODE_IRQ) {\r
- ArmDisableInterrupts();\r
- }\r
+ ArmDisableInterrupts ();\r
+\r
+ mInterruptState = FALSE;\r
return EFI_SUCCESS;\r
}\r
\r
+\r
+/**\r
+ This function retrieves the processor's current interrupt state a returns it in \r
+ State. If interrupts are currently enabled, then TRUE is returned. If interrupts \r
+ are currently disabled, then FALSE is returned.\r
+\r
+ @param This The EFI_CPU_ARCH_PROTOCOL instance.\r
+ @param State A pointer to the processor's current interrupt state. Set to TRUE if\r
+ interrupts are enabled and FALSE if interrupts are disabled.\r
+\r
+ @retval EFI_SUCCESS The processor's current interrupt state was returned in State.\r
+ @retval EFI_INVALID_PARAMETER State is NULL.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
CpuGetInterruptState (\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- *State = ArmGetInterruptState();\r
+ *State = mInterruptState;\r
return EFI_SUCCESS;\r
}\r
\r
+\r
+/**\r
+ This function generates an INIT on the processor. If this function succeeds, then the\r
+ processor will be reset, and control will not be returned to the caller. If InitType is \r
+ not supported by this processor, or the processor cannot programmatically generate an \r
+ INIT without help from external hardware, then EFI_UNSUPPORTED is returned. If an error \r
+ occurs attempting to generate an INIT, then EFI_DEVICE_ERROR is returned.\r
+\r
+ @param This The EFI_CPU_ARCH_PROTOCOL instance.\r
+ @param InitType The type of processor INIT to perform.\r
+\r
+ @retval EFI_SUCCESS The processor INIT was performed. This return code should never be seen.\r
+ @retval EFI_UNSUPPORTED The processor INIT operation specified by InitType is not supported\r
+ by this processor.\r
+ @retval EFI_DEVICE_ERROR The processor INIT failed.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
CpuInit (\r
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler\r
)\r
{\r
- return RegisterInterruptHandler(InterruptType, InterruptHandler);\r
+ return RegisterInterruptHandler (InterruptType, InterruptHandler);\r
}\r
\r
EFI_STATUS\r
return EFI_UNSUPPORTED;\r
}\r
\r
-EFI_STATUS\r
-EFIAPI\r
-CpuSetMemoryAttributes (\r
- IN EFI_CPU_ARCH_PROTOCOL *This,\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length,\r
- IN UINT64 Attributes\r
- )\r
-{\r
- return EFI_UNSUPPORTED;\r
-}\r
\r
//\r
// Globals used to initialize the protocol\r
IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
- InitializeExceptions(&mCpu); \r
- return gBS->InstallMultipleProtocolInterfaces(&mCpuHandle, &gEfiCpuArchProtocolGuid, &mCpu, NULL);\r
+ EFI_STATUS Status;\r
+\r
+ InitializeExceptions (&mCpu); \r
+ \r
+ \r
+ Status = gBS->InstallMultipleProtocolInterfaces (\r
+ &mCpuHandle, \r
+ &gEfiCpuArchProtocolGuid, &mCpu, \r
+ &gVirtualUncachedPagesProtocolGuid, &gVirtualUncachedPages,\r
+ NULL\r
+ );\r
+ \r
+ //\r
+ // Make sure GCD and MMU settings match. This API calls gDS->SetMemorySpaceAttributes ()\r
+ // and that calls EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes, so this code needs to go\r
+ // after the protocol is installed\r
+ //\r
+ SyncCacheConfig (&mCpu);\r
+ \r
+ return Status;\r
}\r
\r
projects / mirror_edk2.git / blobdiff