ArmPkg: Create MpCoreInfo PPI and HOB to describe CPU Cores on a MPCore platform

[mirror_edk2.git] / ArmPkg / Drivers / CpuDxe / CpuDxe.inf

diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.inf b/ArmPkg/Drivers/CpuDxe/CpuDxe.inf
index d4b494536bdf1e31cb5e53d18b2a2619fad74996..e5709a63d0b575ac14ff40996573be8d861ccc57 100644 (file)
--- a/ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+++ b/ArmPkg/Drivers/CpuDxe/CpuDxe.inf
@@ -2,8 +2,10 @@
 #  \r
 #  DXE CPU driver\r
 #  \r
-#  Copyright (c) 2009, Apple Inc. <BR>\r
-#  All rights reserved. This program and the accompanying materials\r
+#  Copyright (c) 2009, Apple Inc. All rights reserved.<BR>\r
+#  Copyright (c) 2011, ARM Limited. All rights reserved.\r
+#\r
+#  This program and the accompanying materials\r
 #  are licensed and made available under the terms and conditions of the BSD License\r
 #  which accompanies this distribution.  The full text of the license may be found at\r
 #  http://opensource.org/licenses/bsd-license.php\r
@@ -25,36 +27,41 @@
 [Sources.ARM]\r
   CpuDxe.c\r
   CpuDxe.h\r
-  DebugSupport.c\r
+  CpuMpCore.c\r
   Exception.c\r
 \r
 #\r
 # Prior to ARMv6 we have multiple stacks, one per mode\r
 #\r
 #  ExceptionSupport.asm | RVCT\r
-  ExceptionSupport.S         | GCC\r
+#  ExceptionSupport.S   | GCC\r
 \r
 #\r
 # ARMv6 or later uses a single stack via srs/stm instructions\r
 #\r
   ExceptionSupport.ARMv6.asm | RVCT\r
-#  ExceptionSupport.ARMv6.S   | GCC\r
-  Mmu.c\r
+  ExceptionSupport.ARMv6.S   | GCC\r
+  Mmu.c  \r
+\r
 \r
 [Packages]\r
   ArmPkg/ArmPkg.dec\r
   EmbeddedPkg/EmbeddedPkg.dec\r
   MdePkg/MdePkg.dec\r
+  MdeModulePkg/MdeModulePkg.dec\r
 \r
 [LibraryClasses]\r
+  ArmLib\r
   BaseMemoryLib\r
   CacheMaintenanceLib\r
-  UefiDriverEntryPoint\r
-  ArmLib\r
+  CpuLib\r
+  DebugLib\r
+  DefaultExceptionHandlerLib\r
   DxeServicesTableLib\r
+  HobLib\r
   PeCoffGetEntryPointLib\r
+  UefiDriverEntryPoint\r
   UefiLib\r
-  CpuLib\r
 \r
 [Protocols]\r
   gEfiCpuArchProtocolGuid\r
@@ -63,12 +70,18 @@
 \r
 [Guids]\r
   gEfiDebugImageInfoTableGuid\r
+  gArmMpCoreInfoGuid\r
+  gIdleLoopEventGuid\r
 \r
 [Pcd.common]\r
+  gArmTokenSpaceGuid.PcdVFPEnabled\r
   gArmTokenSpaceGuid.PcdCpuVectorBaseAddress\r
   \r
 [FeaturePcd.common]\r
   gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport\r
+  gArmTokenSpaceGuid.PcdRelocateVectorTable\r
+  gArmTokenSpaceGuid.PcdDebuggerExceptionSupport\r
+  gArmTokenSpaceGuid.PcdEfiUncachedMemoryToStronglyOrdered\r
 \r
-[depex]\r
-  gHardwareInterruptProtocolGuid\r
+[Depex]\r
+  TRUE\r