/** @file\r
\r
- Copyright (c) 2008-2009, Apple Inc. All rights reserved.\r
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
\r
- All rights reserved. This program and the accompanying materials\r
+ This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
#include "CpuDxe.h" \r
\r
-EFI_DEBUG_IMAGE_INFO_TABLE_HEADER *gDebugImageTableHeader = NULL;\r
+//FIXME: Will not compile on non-ARMv7 builds\r
+#include <Chipset/ArmV7.h>\r
\r
VOID\r
ExceptionHandlersStart (\r
}\r
\r
\r
-/**\r
- This function registers and enables the handler specified by InterruptHandler for a processor \r
- interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the \r
- handler for the processor interrupt or exception type specified by InterruptType is uninstalled. \r
- The installed handler is called once for each processor interrupt or exception.\r
-\r
- @param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts\r
- are enabled and FALSE if interrupts are disabled.\r
- @param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called\r
- when a processor interrupt occurs. If this parameter is NULL, then the handler\r
- will be uninstalled.\r
-\r
- @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.\r
- @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was\r
- previously installed.\r
- @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not\r
- previously installed.\r
- @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.\r
-\r
-**/\r
-EFI_STATUS\r
-RegisterDebuggerInterruptHandler (\r
- IN EFI_EXCEPTION_TYPE InterruptType,\r
- IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler\r
- )\r
-{\r
- if (InterruptType > MAX_ARM_EXCEPTION) {\r
- return EFI_UNSUPPORTED;\r
- }\r
\r
- if ((InterruptHandler != NULL) && (gDebuggerExceptionHandlers[InterruptType] != NULL)) {\r
- return EFI_ALREADY_STARTED;\r
- }\r
-\r
- gDebuggerExceptionHandlers[InterruptType] = InterruptHandler;\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
-\r
-\r
-\r
-CHAR8 *\r
-GetImageName (\r
- IN UINT32 FaultAddress,\r
- OUT UINT32 *ImageBase,\r
- OUT UINT32 *PeCoffSizeOfHeaders\r
- )\r
-{\r
- EFI_DEBUG_IMAGE_INFO *DebugTable;\r
- UINTN Entry;\r
- CHAR8 *Address;\r
-\r
- \r
- DebugTable = gDebugImageTableHeader->EfiDebugImageInfoTable;\r
- if (DebugTable == NULL) {\r
- return NULL;\r
- }\r
-\r
- Address = (CHAR8 *)(UINTN)FaultAddress;\r
- for (Entry = 0; Entry < gDebugImageTableHeader->TableSize; Entry++, DebugTable++) {\r
- if (DebugTable->NormalImage != NULL) {\r
- if ((DebugTable->NormalImage->ImageInfoType == EFI_DEBUG_IMAGE_INFO_TYPE_NORMAL) && \r
- (DebugTable->NormalImage->LoadedImageProtocolInstance != NULL)) {\r
- if ((Address >= (CHAR8 *)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase) &&\r
- (Address <= ((CHAR8 *)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase + DebugTable->NormalImage->LoadedImageProtocolInstance->ImageSize))) {\r
- *ImageBase = (UINT32)DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase;\r
- *PeCoffSizeOfHeaders = PeCoffGetSizeOfHeaders ((VOID *)(UINTN)*ImageBase);\r
- return PeCoffLoaderGetPdbPointer (DebugTable->NormalImage->LoadedImageProtocolInstance->ImageBase);\r
- } \r
- }\r
- } \r
- }\r
-\r
- return NULL;\r
-}\r
-\r
-typedef struct {\r
- UINT32 Bit;\r
- CHAR8 Char;\r
-} CPSR_CHAR;\r
-\r
-\r
-VOID\r
-CpsrString (\r
- IN UINT32 Cpsr,\r
- OUT CHAR8 *ReturnStr\r
- )\r
-{\r
- UINTN Index;\r
- CHAR8 *Str = ReturnStr;\r
- CHAR8 *ModeStr;\r
- CPSR_CHAR CpsrChar[] = {\r
- { 31, 'n' },\r
- { 30, 'z' },\r
- { 29, 'c' },\r
- { 28, 'v' },\r
-\r
- { 9, 'e' },\r
- { 8, 'a' },\r
- { 7, 'i' },\r
- { 6, 'f' },\r
- { 5, 't' },\r
- { 0, '?' }\r
- };\r
- \r
- for (Index = 0; CpsrChar[Index].Bit != 0; Index++, Str++) {\r
- *Str = CpsrChar[Index].Char;\r
- if ((Cpsr & (1 << CpsrChar[Index].Bit)) != 0) {\r
- // Concert to upper case if bit is set\r
- *Str &= ~0x20;\r
- }\r
- }\r
- \r
- *Str++ = '_';\r
- *Str = '\0';\r
- \r
- switch (Cpsr & 0x1f) {\r
- case 0x17:\r
- ModeStr = "abt";\r
- break;\r
- case 0x011:\r
- ModeStr = "fiq";\r
- break;\r
- case 0x12:\r
- ModeStr = "irq";\r
- break;\r
- case 0x13:\r
- ModeStr = "svc";\r
- break;\r
- case 0x1f:\r
- ModeStr = "sys";\r
- break;\r
- case 0x1b:\r
- ModeStr = "und";\r
- break;\r
- case 0x10:\r
- ModeStr = "usr";\r
- break;\r
- \r
- default:\r
- ModeStr = "???";\r
- break;\r
- }\r
- \r
- AsciiStrCat (Str, ModeStr);\r
- return;\r
-} \r
- \r
-CHAR8 *gExceptionTypeString[] = {\r
- "Reset",\r
- "Undefined Instruction",\r
- "SWI",\r
- "Prefetch Abort",\r
- "Data Abort",\r
- "Undefined",\r
- "IRQ",\r
- "FIQ"\r
-};\r
\r
VOID\r
EFIAPI\r
IN OUT EFI_SYSTEM_CONTEXT SystemContext\r
)\r
{\r
- BOOLEAN Dispatched = FALSE;\r
- \r
- \r
+\r
if (ExceptionType <= MAX_ARM_EXCEPTION) {\r
- if (gDebuggerExceptionHandlers[ExceptionType]) {\r
- //\r
- // If DebugSupport hooked the interrupt call the handler. This does not disable \r
- // the normal handler.\r
- //\r
- gDebuggerExceptionHandlers[ExceptionType] (ExceptionType, SystemContext);\r
- Dispatched = TRUE;\r
- }\r
if (gExceptionHandlers[ExceptionType]) {\r
gExceptionHandlers[ExceptionType] (ExceptionType, SystemContext);\r
- Dispatched = TRUE;\r
+ return;\r
}\r
} else {\r
DEBUG ((EFI_D_ERROR, "Unknown exception type %d from %08x\n", ExceptionType, SystemContext.SystemContextArm->PC));\r
ASSERT (FALSE);\r
}\r
-\r
- if (Dispatched) {\r
- //\r
- // We did work so this was an expected ExceptionType\r
- //\r
- return;\r
- }\r
\r
if (ExceptionType == EXCEPT_ARM_SOFTWARE_INTERRUPT) {\r
//\r
return;\r
}\r
\r
- //\r
- // Code after here is the default exception handler... Dump the context\r
- //\r
- DEBUG ((EFI_D_ERROR, "\n%a Exception PC at 0x%08x CPSR 0x%08x ", gExceptionTypeString[ExceptionType], SystemContext.SystemContextArm->PC, SystemContext.SystemContextArm->CPSR));\r
- DEBUG_CODE_BEGIN ();\r
- CHAR8 *Pdb;\r
- UINT32 ImageBase;\r
- UINT32 PeCoffSizeOfHeader;\r
- UINT32 Offset;\r
- CHAR8 CpsrStr[32]; // char per bit. Lower 5-bits are mode that is a 3 char string\r
- \r
- CpsrString (SystemContext.SystemContextArm->CPSR, CpsrStr);\r
- DEBUG ((EFI_D_ERROR, "%a\n", CpsrStr));\r
- \r
- Pdb = GetImageName (SystemContext.SystemContextArm->PC, &ImageBase, &PeCoffSizeOfHeader);\r
- Offset = SystemContext.SystemContextArm->PC - ImageBase;\r
- if (Pdb != NULL) {\r
- DEBUG ((EFI_D_ERROR, "%a\n", Pdb));\r
-\r
- //\r
- // A PE/COFF image loads its headers into memory so the headers are \r
- // included in the linked addressess. ELF and Mach-O images do not\r
- // include the headers so the first byte of the image is usually\r
- // text (code). If you look at link maps from ELF or Mach-O images\r
- // you need to subtact out the size of the PE/COFF header to get\r
- // get the offset that matches the link map. \r
- //\r
- DEBUG ((EFI_D_ERROR, "loadded at 0x%08x (PE/COFF offset) 0x%x (ELF or Mach-O offset) 0x%x", ImageBase, Offset, Offset - PeCoffSizeOfHeader));\r
- }\r
- DEBUG_CODE_END ();\r
- DEBUG ((EFI_D_ERROR, "\n R0 0x%08x R1 0x%08x R2 0x%08x R3 0x%08x\n", SystemContext.SystemContextArm->R0, SystemContext.SystemContextArm->R1, SystemContext.SystemContextArm->R2, SystemContext.SystemContextArm->R3));\r
- DEBUG ((EFI_D_ERROR, " R4 0x%08x R5 0x%08x R6 0x%08x R7 0x%08x\n", SystemContext.SystemContextArm->R4, SystemContext.SystemContextArm->R5, SystemContext.SystemContextArm->R6, SystemContext.SystemContextArm->R7));\r
- DEBUG ((EFI_D_ERROR, " R8 0x%08x R9 0x%08x R10 0x%08x R11 0x%08x\n", SystemContext.SystemContextArm->R8, SystemContext.SystemContextArm->R9, SystemContext.SystemContextArm->R10, SystemContext.SystemContextArm->R11));\r
- DEBUG ((EFI_D_ERROR, " R12 0x%08x SP 0x%08x LR 0x%08x PC 0x%08x\n", SystemContext.SystemContextArm->R12, SystemContext.SystemContextArm->SP, SystemContext.SystemContextArm->LR, SystemContext.SystemContextArm->PC));\r
- DEBUG ((EFI_D_ERROR, "DFSR 0x%08x DFAR 0x%08x IFSR 0x%08x IFAR 0x%08x\n\n", SystemContext.SystemContextArm->DFSR, SystemContext.SystemContextArm->DFAR, SystemContext.SystemContextArm->IFSR, SystemContext.SystemContextArm->IFAR));\r
-\r
- ASSERT (FALSE);\r
+ DefaultExceptionHandler (ExceptionType, SystemContext);\r
}\r
\r
\r
UINTN Offset;\r
UINTN Length;\r
UINTN Index;\r
- BOOLEAN Enabled;\r
+ BOOLEAN IrqEnabled;\r
+ BOOLEAN FiqEnabled;\r
EFI_PHYSICAL_ADDRESS Base;\r
+ UINT32 *VectorBase;\r
\r
- Status = EfiGetSystemConfigurationTable (&gEfiDebugImageInfoTableGuid, (VOID **)&gDebugImageTableHeader);\r
- if (EFI_ERROR (Status)) {\r
- gDebugImageTableHeader = NULL;\r
- }\r
-\r
+ Status = EFI_SUCCESS;\r
//\r
// Disable interrupts\r
//\r
- Cpu->GetInterruptState (Cpu, &Enabled);\r
+ Cpu->GetInterruptState (Cpu, &IrqEnabled);\r
Cpu->DisableInterrupt (Cpu);\r
\r
//\r
- // Initialize the C entry points for interrupts\r
+ // EFI does not use the FIQ, but a debugger might so we must disable \r
+ // as we take over the exception vectors. \r
//\r
- for (Index = 0; Index <= MAX_ARM_EXCEPTION; Index++) {\r
- Status = RegisterInterruptHandler (Index, NULL);\r
- ASSERT_EFI_ERROR (Status);\r
+ FiqEnabled = ArmGetFiqState ();\r
+ ArmDisableFiq ();\r
+\r
+ if (FeaturePcdGet(PcdRelocateVectorTable) == TRUE) {\r
+ //\r
+ // Copy an implementation of the ARM exception vectors to PcdCpuVectorBaseAddress.\r
+ //\r
+ Length = (UINTN)ExceptionHandlersEnd - (UINTN)ExceptionHandlersStart;\r
\r
- Status = RegisterDebuggerInterruptHandler (Index, NULL);\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
- \r
- //\r
- // Copy an implementation of the ARM exception vectors to PcdCpuVectorBaseAddress.\r
- //\r
- Length = (UINTN)ExceptionHandlersEnd - (UINTN)ExceptionHandlersStart;\r
+ //\r
+ // Reserve space for the exception handlers\r
+ //\r
+ Base = (EFI_PHYSICAL_ADDRESS)PcdGet32 (PcdCpuVectorBaseAddress);\r
+ VectorBase = (UINT32 *)(UINTN)Base;\r
+ Status = gBS->AllocatePages (AllocateAddress, EfiBootServicesCode, EFI_SIZE_TO_PAGES (Length), &Base);\r
+ // If the request was for memory that's not in the memory map (which is often the case for 0x00000000\r
+ // on embedded systems, for example, we don't want to hang up. So we'll check here for a status of \r
+ // EFI_NOT_FOUND, and continue in that case.\r
+ if (EFI_ERROR(Status) && (Status != EFI_NOT_FOUND)) {\r
+ ASSERT_EFI_ERROR (Status);\r
+ }\r
+ \r
+ // Save existing vector table, in case debugger is already hooked in\r
+ CopyMem ((VOID *)gDebuggerExceptionHandlers, (VOID *)VectorBase, sizeof (gDebuggerExceptionHandlers));\r
+ \r
+ // Copy our assembly code into the page that contains the exception vectors. \r
+ CopyMem ((VOID *)VectorBase, (VOID *)ExceptionHandlersStart, Length);\r
+ \r
+ //\r
+ // Patch in the common Assembly exception handler\r
+ //\r
+ Offset = (UINTN)CommonExceptionEntry - (UINTN)ExceptionHandlersStart;\r
+ *(UINTN *) ((UINT8 *)(UINTN)PcdGet32 (PcdCpuVectorBaseAddress) + Offset) = (UINTN)AsmCommonExceptionEntry;\r
+ \r
+ //\r
+ // Initialize the C entry points for interrupts\r
+ //\r
+ for (Index = 0; Index <= MAX_ARM_EXCEPTION; Index++) {\r
+ if ((gDebuggerExceptionHandlers[Index] == 0) || (gDebuggerExceptionHandlers[Index] == (VOID *)(UINTN)0xEAFFFFFE)) {\r
+ // Exception handler contains branch to vector location (jmp $) so no handler\r
+ // NOTE: This code assumes vectors are ARM and not Thumb code\r
+ Status = RegisterInterruptHandler (Index, NULL);\r
+ ASSERT_EFI_ERROR (Status);\r
+ } else {\r
+ // If the debugger has alread hooked put its vector back\r
+ VectorBase[Index] = (UINT32)(UINTN)gDebuggerExceptionHandlers[Index];\r
+ }\r
+ }\r
+ \r
+ // Flush Caches since we updated executable stuff\r
+ InvalidateInstructionCacheRange ((VOID *)PcdGet32(PcdCpuVectorBaseAddress), Length);\r
\r
- //\r
- // Reserve space for the exception handlers\r
- //\r
- Base = (EFI_PHYSICAL_ADDRESS)PcdGet32 (PcdCpuVectorBaseAddress);\r
- Status = gBS->AllocatePages (AllocateAddress, EfiBootServicesCode, EFI_SIZE_TO_PAGES (Length), &Base);\r
- // If the request was for memory that's not in the memory map (which is often the case for 0x00000000\r
- // on embedded systems, for example, we don't want to hang up. So we'll check here for a status of \r
- // EFI_NOT_FOUND, and continue in that case.\r
- if (EFI_ERROR(Status) && (Status != EFI_NOT_FOUND)) {\r
- ASSERT_EFI_ERROR (Status);\r
+ //Note: On ARM processor with the Security Extension, the Vector Table can be located anywhere in the memory.\r
+ // The Vector Base Address Register defines the location\r
+ ArmWriteVBar(PcdGet32(PcdCpuVectorBaseAddress));\r
+ } else {\r
+ // We do not copy the Exception Table at PcdGet32(PcdCpuVectorBaseAddress). We just set Vector Base Address to point into CpuDxe code.\r
+ ArmWriteVBar((UINT32)ExceptionHandlersStart);\r
}\r
\r
- CopyMem ((VOID *)(UINTN)PcdGet32 (PcdCpuVectorBaseAddress), (VOID *)ExceptionHandlersStart, Length);\r
-\r
- //\r
- // Patch in the common Assembly exception handler\r
- //\r
- Offset = (UINTN)CommonExceptionEntry - (UINTN)ExceptionHandlersStart;\r
- *(UINTN *) ((UINT8 *)(UINTN)PcdGet32 (PcdCpuVectorBaseAddress) + Offset) = (UINTN)AsmCommonExceptionEntry;\r
-\r
- // Flush Caches since we updated executable stuff\r
- InvalidateInstructionCacheRange ((VOID *)PcdGet32(PcdCpuVectorBaseAddress), Length);\r
+ if (FiqEnabled) {\r
+ ArmEnableFiq ();\r
+ }\r
\r
- if (Enabled) {\r
+ if (IrqEnabled) {\r
// \r
// Restore interrupt state\r
//\r
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