return EFI_SUCCESS;\r
}\r
\r
+EFI_STATUS\r
+PageToGcdAttributes (\r
+ IN UINT32 PageAttributes,\r
+ OUT UINT64 *GcdAttributes\r
+ )\r
+{\r
+ *GcdAttributes = 0;\r
+\r
+ // determine cacheability attributes\r
+ switch(PageAttributes & TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) {\r
+ case TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED:\r
+ *GcdAttributes |= EFI_MEMORY_UC;\r
+ break;\r
+ case TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE:\r
+ *GcdAttributes |= EFI_MEMORY_UC;\r
+ break;\r
+ case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC:\r
+ *GcdAttributes |= EFI_MEMORY_WT;\r
+ break;\r
+ case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC:\r
+ *GcdAttributes |= EFI_MEMORY_WB;\r
+ break;\r
+ case TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE:\r
+ *GcdAttributes |= EFI_MEMORY_WC;\r
+ break;\r
+ case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC:\r
+ *GcdAttributes |= EFI_MEMORY_WB;\r
+ break;\r
+ case TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE:\r
+ *GcdAttributes |= EFI_MEMORY_UC;\r
+ break;\r
+ default:\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+\r
+ // determine protection attributes\r
+ switch(PageAttributes & TT_DESCRIPTOR_PAGE_AP_MASK) {\r
+ case TT_DESCRIPTOR_PAGE_AP_NO_NO: // no read, no write\r
+ //*GcdAttributes |= EFI_MEMORY_WP | EFI_MEMORY_RP;\r
+ break;\r
+\r
+ case TT_DESCRIPTOR_PAGE_AP_RW_NO:\r
+ case TT_DESCRIPTOR_PAGE_AP_RW_RW:\r
+ // normal read/write access, do not add additional attributes\r
+ break;\r
+\r
+ // read only cases map to write-protect\r
+ case TT_DESCRIPTOR_PAGE_AP_RO_NO:\r
+ case TT_DESCRIPTOR_PAGE_AP_RO_RO:\r
+ *GcdAttributes |= EFI_MEMORY_WP;\r
+ break;\r
+\r
+ default:\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+\r
+ // now process eXectue Never attribute\r
+ if ((PageAttributes & TT_DESCRIPTOR_PAGE_XN_MASK) != 0 ) {\r
+ *GcdAttributes |= EFI_MEMORY_XP;\r
+ }\r
+\r
+ return EFI_SUCCESS;\r
+}\r
+\r
/**\r
Searches memory descriptors covered by given memory range.\r
\r
return EFI_SUCCESS;\r
}\r
\r
+EFI_STATUS\r
+SyncCacheConfigPage (\r
+ IN UINT32 SectionIndex,\r
+ IN UINT32 FirstLevelDescriptor,\r
+ IN UINTN NumberOfDescriptors,\r
+ IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,\r
+ IN OUT EFI_PHYSICAL_ADDRESS *NextRegionBase,\r
+ IN OUT UINT64 *NextRegionLength,\r
+ IN OUT UINT32 *NextSectionAttributes\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ UINT32 i;\r
+ volatile ARM_PAGE_TABLE_ENTRY *SecondLevelTable;\r
+ UINT32 NextPageAttributes = 0;\r
+ UINT32 PageAttributes = 0;\r
+ UINT32 BaseAddress;\r
+ UINT64 GcdAttributes;\r
+\r
+ // Get the Base Address from FirstLevelDescriptor;\r
+ BaseAddress = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(SectionIndex << TT_DESCRIPTOR_SECTION_BASE_SHIFT);\r
+\r
+ // Convert SectionAttributes into PageAttributes\r
+ NextPageAttributes =\r
+ TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(*NextSectionAttributes,0) |\r
+ TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(*NextSectionAttributes);\r
+\r
+ // obtain page table base\r
+ SecondLevelTable = (ARM_PAGE_TABLE_ENTRY *)(FirstLevelDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);\r
+\r
+ for (i=0; i < TRANSLATION_TABLE_PAGE_COUNT; i++) {\r
+ if ((SecondLevelTable[i] & TT_DESCRIPTOR_PAGE_TYPE_MASK) == TT_DESCRIPTOR_PAGE_TYPE_PAGE) {\r
+ // extract attributes (cacheability and permissions)\r
+ PageAttributes = SecondLevelTable[i] & (TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK | TT_DESCRIPTOR_PAGE_AP_MASK);\r
+\r
+ if (NextPageAttributes == 0) {\r
+ // start on a new region\r
+ *NextRegionLength = 0;\r
+ *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);\r
+ NextPageAttributes = PageAttributes;\r
+ } else if (PageAttributes != NextPageAttributes) {\r
+ // Convert Section Attributes into GCD Attributes\r
+ Status = PageToGcdAttributes (NextPageAttributes, &GcdAttributes);\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)\r
+ SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);\r
+\r
+ // start on a new region\r
+ *NextRegionLength = 0;\r
+ *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);\r
+ NextPageAttributes = PageAttributes;\r
+ }\r
+ } else if (NextPageAttributes != 0) {\r
+ // Convert Page Attributes into GCD Attributes\r
+ Status = PageToGcdAttributes (NextPageAttributes, &GcdAttributes);\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)\r
+ SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);\r
+\r
+ *NextRegionLength = 0;\r
+ *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);\r
+ NextPageAttributes = 0;\r
+ }\r
+ *NextRegionLength += TT_DESCRIPTOR_PAGE_SIZE;\r
+ }\r
+\r
+ // Convert back PageAttributes into SectionAttributes\r
+ *NextSectionAttributes =\r
+ TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(NextPageAttributes,0) |\r
+ TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(NextPageAttributes);\r
+\r
+ return EFI_SUCCESS;\r
+}\r
\r
EFI_STATUS\r
SyncCacheConfig (\r
{\r
EFI_STATUS Status;\r
UINT32 i;\r
- UINT32 Descriptor;\r
- UINT32 SectionAttributes;\r
EFI_PHYSICAL_ADDRESS NextRegionBase;\r
UINT64 NextRegionLength;\r
+ UINT32 NextSectionAttributes = 0;\r
+ UINT32 SectionAttributes = 0;\r
UINT64 GcdAttributes;\r
- UINT32 NextRegionAttributes = 0;\r
volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;\r
UINTN NumberOfDescriptors;\r
EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;\r
// obtain page table base\r
FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)(ArmGetTTBR0BaseAddress ());\r
\r
+ // Get the first region\r
+ NextSectionAttributes = FirstLevelTable[0] & (TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK | TT_DESCRIPTOR_SECTION_AP_MASK);\r
\r
// iterate through each 1MB descriptor\r
NextRegionBase = NextRegionLength = 0;\r
- for (i=0; i< TRANSLATION_TABLE_SECTION_COUNT; i++) {\r
-\r
- // obtain existing descriptor and make sure it contains a valid Base Address even if it is a fault section\r
- Descriptor = FirstLevelTable[i] | TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);\r
-\r
- // extract attributes (cacheability and permissions)\r
- SectionAttributes = Descriptor & (TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK | TT_DESCRIPTOR_SECTION_AP_MASK);\r
-\r
- // do we already have an existing region (or are we about to finish)?\r
- // Skip the first entry, and make sure we close on the last entry\r
- if ( (NextRegionLength > 0) || (i == (TRANSLATION_TABLE_SECTION_COUNT-1)) ) {\r
- // attributes are changing, update attributes in GCD\r
- if (SectionAttributes != NextRegionAttributes) {\r
- \r
- // convert section entry attributes to GCD bitmask\r
- Status = SectionToGcdAttributes (NextRegionAttributes, &GcdAttributes);\r
+ for (i=0; i < TRANSLATION_TABLE_SECTION_COUNT; i++) {\r
+ if ((FirstLevelTable[i] & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) {\r
+ // extract attributes (cacheability and permissions)\r
+ SectionAttributes = FirstLevelTable[i] & (TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK | TT_DESCRIPTOR_SECTION_AP_MASK);\r
+\r
+ if (NextSectionAttributes == 0) {\r
+ // start on a new region\r
+ NextRegionLength = 0;\r
+ NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);\r
+ NextSectionAttributes = SectionAttributes;\r
+ } else if (SectionAttributes != NextSectionAttributes) {\r
+ // Convert Section Attributes into GCD Attributes\r
+ Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);\r
ASSERT_EFI_ERROR (Status);\r
\r
// update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)\r
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);\r
\r
-\r
// start on a new region\r
NextRegionLength = 0;\r
- NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(Descriptor);\r
+ NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);\r
+ NextSectionAttributes = SectionAttributes;\r
}\r
- }\r
+ NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;\r
+ } else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(FirstLevelTable[i])) {\r
+ Status = SyncCacheConfigPage (\r
+ i,FirstLevelTable[i],\r
+ &NumberOfDescriptors, &MemorySpaceMap,\r
+ &NextRegionBase,&NextRegionLength,&NextSectionAttributes);\r
+ ASSERT_EFI_ERROR (Status);\r
+ } else {\r
+ // We do not support yet 16MB sections\r
+ ASSERT ((FirstLevelTable[i] & TT_DESCRIPTOR_SECTION_TYPE_MASK) != TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION);\r
\r
- // starting a new region?\r
- if (NextRegionLength == 0) {\r
- NextRegionAttributes = SectionAttributes;\r
- }\r
+ // start on a new region\r
+ if (NextSectionAttributes != 0) {\r
+ // Convert Section Attributes into GCD Attributes\r
+ Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);\r
+ ASSERT_EFI_ERROR (Status);\r
\r
- NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;\r
+ // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)\r
+ SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);\r
\r
+ NextRegionLength = 0;\r
+ NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);\r
+ NextSectionAttributes = 0;\r
+ }\r
+ NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;\r
+ }\r
} // section entry loop\r
\r
+ if (NextSectionAttributes != 0) {\r
+ // Convert Section Attributes into GCD Attributes\r
+ Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)\r
+ SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);\r
+ }\r
+\r
return EFI_SUCCESS;\r
}\r
\r
UINT32 SectionDescriptor;\r
UINT32 PageTableDescriptor;\r
UINT32 PageDescriptor;\r
- UINT32 i;\r
+ UINT32 Index;\r
\r
volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;\r
volatile ARM_PAGE_TABLE_ENTRY *PageTable;\r
PageTable = (volatile ARM_PAGE_TABLE_ENTRY *)(UINTN)PageTableAddr;\r
\r
// write the page table entries out\r
- for (i=0; i < TRANSLATION_TABLE_PAGE_COUNT; i++) {\r
- PageTable[i] = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(BaseAddress + (i << 12)) | PageDescriptor;\r
+ for (Index = 0; Index < TRANSLATION_TABLE_PAGE_COUNT; Index++) {\r
+ PageTable[Index] = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(BaseAddress + (Index << 12)) | PageDescriptor;\r
}\r
\r
// flush d-cache so descriptors make it back to uncached memory for subsequent table walks\r
projects / mirror_edk2.git / blobdiff