ARM Packages: Fixed coding style and typos

[mirror_edk2.git] / ArmPkg / Drivers / CpuDxe / Mmu.c

diff --git a/ArmPkg/Drivers/CpuDxe/Mmu.c b/ArmPkg/Drivers/CpuDxe/Mmu.c
index 6218b5d27f1f0319950dfd57047b6956fe89a972..dcc7b682c06bae25c2d9fd1a469879c525df0115 100644 (file)
--- a/ArmPkg/Drivers/CpuDxe/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/Mmu.c
@@ -498,13 +498,8 @@ UpdatePageEntries (
     case EFI_MEMORY_UC:\r
       // modify cacheability attributes\r
       EntryMask |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK;\r
-      if (FeaturePcdGet(PcdEfiUncachedMemoryToStronglyOrdered)) {\r
-        // map to strongly ordered\r
-        EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0\r
-      } else {\r
-        // map to normal non-cachable\r
-        EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0\r
-      }\r
+      // map to strongly ordered\r
+      EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0\r
       break;\r
 \r
     case EFI_MEMORY_WC:\r
@@ -646,13 +641,8 @@ UpdateSectionEntries (
     case EFI_MEMORY_UC:\r
       // modify cacheability attributes\r
       EntryMask |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK;\r
-      if (FeaturePcdGet(PcdEfiUncachedMemoryToStronglyOrdered)) {\r
-        // map to strongly ordered\r
-        EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0\r
-      } else {\r
-        // map to normal non-cachable\r
-        EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0\r
-      }\r
+      // map to strongly ordered\r
+      EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0\r
       break;\r
 \r
     case EFI_MEMORY_WC:\r
@@ -759,14 +749,14 @@ ConvertSectionToPages (
 \r
   DEBUG ((EFI_D_PAGE, "Converting section at 0x%x to pages\n", (UINTN)BaseAddress));\r
 \r
-  // obtain page table base\r
+  // Obtain page table base\r
   FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();\r
 \r
-  // calculate index into first level translation table for start of modification\r
+  // Calculate index into first level translation table for start of modification\r
   FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;\r
   ASSERT (FirstLevelIdx < TRANSLATION_TABLE_SECTION_COUNT);\r
 \r
-  // get section attributes and convert to page attributes\r
+  // Get section attributes and convert to page attributes\r
   SectionDescriptor = FirstLevelTable[FirstLevelIdx];\r
   PageDescriptor = TT_DESCRIPTOR_PAGE_TYPE_PAGE;\r
   PageDescriptor |= TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(SectionDescriptor,0);\r
@@ -775,7 +765,7 @@ ConvertSectionToPages (
   PageDescriptor |= TT_DESCRIPTOR_CONVERT_TO_PAGE_NG(SectionDescriptor);\r
   PageDescriptor |= TT_DESCRIPTOR_CONVERT_TO_PAGE_S(SectionDescriptor);\r
 \r
-  // allocate a page table for the 4KB entries (we use up a full page even though we only need 1KB)\r
+  // Allocate a page table for the 4KB entries (we use up a full page even though we only need 1KB)\r
   Status = gBS->AllocatePages (AllocateAnyPages, EfiBootServicesData, 1, &PageTableAddr);\r
   if (EFI_ERROR(Status)) {\r
     return Status;\r
@@ -783,18 +773,18 @@ ConvertSectionToPages (
 \r
   PageTable = (volatile ARM_PAGE_TABLE_ENTRY *)(UINTN)PageTableAddr;\r
 \r
-  // write the page table entries out\r
+  // Write the page table entries out\r
   for (Index = 0; Index < TRANSLATION_TABLE_PAGE_COUNT; Index++) {\r
     PageTable[Index] = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(BaseAddress + (Index << 12)) | PageDescriptor;\r
   }\r
 \r
-  // flush d-cache so descriptors make it back to uncached memory for subsequent table walks\r
+  // Flush d-cache so descriptors make it back to uncached memory for subsequent table walks\r
   WriteBackInvalidateDataCacheRange ((VOID *)(UINTN)PageTableAddr, TT_DESCRIPTOR_PAGE_SIZE);\r
 \r
-  // formulate page table entry, Domain=0, NS=0\r
+  // Formulate page table entry, Domain=0, NS=0\r
   PageTableDescriptor = (((UINTN)PageTableAddr) & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK) | TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE;\r
 \r
-  // write the page table entry out, repalcing section entry\r
+  // Write the page table entry out, replacing section entry\r
   FirstLevelTable[FirstLevelIdx] = PageTableDescriptor;\r
 \r
   return EFI_SUCCESS;\r