ArmPkg/PL390Gic: Introduced PcdGicSgiIntId to define which SGI is used for core synch...

[mirror_edk2.git] / ArmPkg / Drivers / PL390Gic / PL390Gic.c

diff --git a/ArmPkg/Drivers/PL390Gic/PL390Gic.c b/ArmPkg/Drivers/PL390Gic/PL390Gic.c
index 9da5cc4b591aa8a43c11c2ebcc2b6ae9ebc202f2..25daabeb1d0bd722835b4c212664b389b827b806 100644 (file)
--- a/ArmPkg/Drivers/PL390Gic/PL390Gic.c
+++ b/ArmPkg/Drivers/PL390Gic/PL390Gic.c
@@ -15,6 +15,7 @@
 #include <Uefi.h>\r
 #include <Library/IoLib.h>\r
 #include <Library/ArmGicLib.h>\r
+#include <Library/PcdLib.h>\r
 \r
 VOID\r
 EFIAPI\r
@@ -24,7 +25,7 @@ ArmGicSendSgiTo (
   IN  INTN          CPUTargetList\r
   )\r
 {\r
-  MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16));\r
+  MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | PcdGet32(PcdGicSgiIntId));\r
 }\r
 \r
 UINT32\r
@@ -39,7 +40,7 @@ ArmGicAcknowledgeSgiFrom (
   InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);\r
 \r
   // Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID\r
-  if (((CoreId & 0x7) << 10) == (InterruptId & 0x1C00)) {\r
+  if ((((CoreId & 0x7) << 10) | PcdGet32(PcdGicSgiIntId)) == InterruptId) {\r
     // Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR\r
     MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, InterruptId);\r
     return 1;\r