TT_DESCRIPTOR_SECTION_AP_RW_RW | \\r
TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE)\r
\r
+#define CPACR_CP_FULL_ACCESS 0x0FFFFFFF\r
+\r
+// NSACR - Non-Secure Access Control Register definitions\r
+#define NSACR_CP(cp) ((1 << (cp)) & 0x3FFF)\r
+#define NSACR_PLE 0\r
+#define NSACR_TL 0\r
+#define NSACR_NS_SMP 0\r
+\r
+// SCR - Secure Configuration Register definitions\r
+#define SCR_NS (1 << 0)\r
+#define SCR_IRQ (1 << 1)\r
+#define SCR_FIQ (1 << 2)\r
+#define SCR_EA (1 << 3)\r
+#define SCR_FW (1 << 4)\r
+#define SCR_AW (1 << 5)\r
+\r
#endif // __ARM1176JZ_S_H__\r