//\r
// Cortex A5x feature bit definitions\r
//\r
-#define A5X_FEATURE_SMP (1 << 6)\r
+#define A5X_FEATURE_SMP (1 << 6)\r
\r
//\r
// Helper functions to access CPU Extended Control Register\r
VOID\r
EFIAPI\r
ArmWriteCpuExCr (\r
- IN UINT64 Val\r
+ IN UINT64 Val\r
);\r
\r
VOID\r
EFIAPI\r
ArmSetCpuExCrBit (\r
- IN UINT64 Bits\r
+ IN UINT64 Bits\r
);\r
\r
VOID\r
EFIAPI\r
ArmUnsetCpuExCrBit (\r
- IN UINT64 Bits\r
+ IN UINT64 Bits\r
);\r
\r
#endif // ARM_CORTEX_A5X_H_\r