UefiCpuPkg: Move AsmRelocateApLoopStart from Mpfuncs.nasm to AmdSev.nasm

[mirror_edk2.git] / ArmPkg / Include / Library / ArmLib.h

diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index e4d0476090c7b72dff82aeae4280e0bccf5f11d9..fa605f128bfd1e4db0294b69e56d603d971f313c 100644 (file)
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -108,10 +108,16 @@ typedef enum {
 \r
 #define ARM_CORE_MASK     ARM_CORE_AFF0\r
 #define ARM_CLUSTER_MASK  ARM_CORE_AFF1\r
-#define GET_CORE_ID(MpId)            ((MpId) & ARM_CORE_MASK)\r
-#define GET_CLUSTER_ID(MpId)         (((MpId) & ARM_CLUSTER_MASK) >> 8)\r
-#define GET_MPID(ClusterId, CoreId)  (((ClusterId) << 8) | (CoreId))\r
+#define GET_CORE_ID(MpId)              ((MpId) & ARM_CORE_MASK)\r
+#define GET_CLUSTER_ID(MpId)           (((MpId) & ARM_CLUSTER_MASK) >> 8)\r
+#define GET_MPID(ClusterId, CoreId)    (((ClusterId) << 8) | (CoreId))\r
+#define GET_MPIDR_AFF0(MpId)           ((MpId) & ARM_CORE_AFF0)\r
+#define GET_MPIDR_AFF1(MpId)           (((MpId) & ARM_CORE_AFF1) >> 8)\r
+#define GET_MPIDR_AFF2(MpId)           (((MpId) & ARM_CORE_AFF2) >> 16)\r
+#define GET_MPIDR_AFF3(MpId)           (((MpId) & ARM_CORE_AFF3) >> 32)\r
+#define GET_MPIDR_AFFINITY_BITS(MpId)  ((MpId) & 0xFF00FFFFFF)\r
 #define PRIMARY_CORE_ID  (PcdGet32(PcdArmPrimaryCore) & ARM_CORE_MASK)\r
+#define MPIDR_MT_BIT     BIT24\r
 \r
 /** Reads the CCSIDR register for the specified cache.\r
 \r