//\r
// ARM MP Core IDs\r
//\r
-#define IS_PRIMARY_CORE(MpId) (((MpId) & PcdGet32(PcdArmPrimaryCoreMask)) == PcdGet32(PcdArmPrimaryCore))\r
#define ARM_CORE_MASK 0xFF\r
#define ARM_CLUSTER_MASK (0xFF << 8)\r
#define GET_CORE_ID(MpId) ((MpId) & ARM_CORE_MASK)\r
ArmDisableInterrupts (\r
VOID\r
);\r
- \r
+\r
BOOLEAN\r
EFIAPI\r
ArmGetInterruptState (\r
VOID\r
);\r
\r
+UINTN\r
+EFIAPI\r
+ArmDisableIrq (\r
+ VOID\r
+ );\r
+\r
+VOID\r
+EFIAPI\r
+ArmEnableIrq (\r
+ VOID\r
+ );\r
+\r
VOID\r
EFIAPI\r
ArmEnableFiq (\r
VOID\r
);\r
\r
+UINTN\r
+EFIAPI\r
+ArmReadHVBar (\r
+ VOID\r
+ );\r
+\r
+VOID\r
+EFIAPI\r
+ArmWriteHVBar (\r
+ IN UINTN HypModeVectorBase\r
+ );\r
+\r
#endif // __ARM_LIB__\r