MdeModulePkg/BootLogoLib: Fix INF comments to follow coding standards

[mirror_edk2.git] / ArmPkg / Library / ArmCacheMaintenanceLib / ArmCacheMaintenanceLib.c

diff --git a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
index f4c12e71731748032b835f819a9baabc12407c33..65ba8749e79604ddf2b0c74f6bd3093d2d74d9f4 100644 (file)
--- a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
+++ b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
@@ -2,7 +2,7 @@
 \r
   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
   Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.\r
-  \r
+\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -14,34 +14,29 @@
 **/\r
 #include <Base.h>\r
 #include <Library/ArmLib.h>\r
+#include <Library/DebugLib.h>\r
 #include <Library/PcdLib.h>\r
 \r
 VOID\r
 CacheRangeOperation (\r
   IN  VOID            *Start,\r
   IN  UINTN           Length,\r
-  IN  CACHE_OPERATION CacheOperation,\r
   IN  LINE_OPERATION  LineOperation\r
   )\r
 {\r
   UINTN ArmCacheLineLength         = ArmDataCacheLineLength();\r
   UINTN ArmCacheLineAlignmentMask  = ArmCacheLineLength - 1;\r
-  UINTN ArmCacheOperationThreshold = PcdGet32(PcdArmCacheOperationThreshold);\r
-  \r
-  if ((CacheOperation != NULL) && (Length >= ArmCacheOperationThreshold)) {\r
-    ArmDrainWriteBuffer ();\r
-    CacheOperation ();\r
-  } else {\r
-    // Align address (rounding down)\r
-    UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);\r
-    UINTN EndAddress     = (UINTN)Start + Length;\r
 \r
-    // Perform the line operation on an address in each cache line\r
-    while (AlignedAddress < EndAddress) {\r
-      LineOperation(AlignedAddress);\r
-      AlignedAddress += ArmCacheLineLength;\r
-    }\r
+  // Align address (rounding down)\r
+  UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);\r
+  UINTN EndAddress     = (UINTN)Start + Length;\r
+\r
+  // Perform the line operation on an address in each cache line\r
+  while (AlignedAddress < EndAddress) {\r
+    LineOperation(AlignedAddress);\r
+    AlignedAddress += ArmCacheLineLength;\r
   }\r
+  ArmDataSynchronizationBarrier ();\r
 }\r
 \r
 VOID\r
@@ -50,7 +45,6 @@ InvalidateInstructionCache (
   VOID\r
   )\r
 {\r
-  ArmCleanDataCache();\r
   ArmInvalidateInstructionCache();\r
 }\r
 \r
@@ -60,7 +54,7 @@ InvalidateDataCache (
   VOID\r
   )\r
 {\r
-  ArmInvalidateDataCache();\r
+  ASSERT (FALSE);\r
 }\r
 \r
 VOID *\r
@@ -70,7 +64,7 @@ InvalidateInstructionCacheRange (
   IN      UINTN                     Length\r
   )\r
 {\r
-  CacheRangeOperation (Address, Length, ArmCleanDataCacheToPoU, ArmCleanDataCacheEntryByMVA);\r
+  CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryByMVA);\r
   ArmInvalidateInstructionCache ();\r
   return Address;\r
 }\r
@@ -81,7 +75,7 @@ WriteBackInvalidateDataCache (
   VOID\r
   )\r
 {\r
-  ArmCleanInvalidateDataCache();\r
+  ASSERT (FALSE);\r
 }\r
 \r
 VOID *\r
@@ -91,7 +85,7 @@ WriteBackInvalidateDataCacheRange (
   IN      UINTN                     Length\r
   )\r
 {\r
-  CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCache, ArmCleanInvalidateDataCacheEntryByMVA);\r
+  CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCacheEntryByMVA);\r
   return Address;\r
 }\r
 \r
@@ -101,7 +95,7 @@ WriteBackDataCache (
   VOID\r
   )\r
 {\r
-  ArmCleanDataCache();\r
+  ASSERT (FALSE);\r
 }\r
 \r
 VOID *\r
@@ -111,7 +105,7 @@ WriteBackDataCacheRange (
   IN      UINTN                     Length\r
   )\r
 {\r
-  CacheRangeOperation(Address, Length, ArmCleanDataCache, ArmCleanDataCacheEntryByMVA);\r
+  CacheRangeOperation(Address, Length, ArmCleanDataCacheEntryByMVA);\r
   return Address;\r
 }\r
 \r
@@ -122,6 +116,6 @@ InvalidateDataCacheRange (
   IN      UINTN                     Length\r
   )\r
 {\r
-  CacheRangeOperation(Address, Length, NULL, ArmInvalidateDataCacheEntryByMVA);\r
+  CacheRangeOperation(Address, Length, ArmInvalidateDataCacheEntryByMVA);\r
   return Address;\r
 }\r