#include <Library/UncachedMemoryAllocationLib.h>\r
#include <Library/IoLib.h>\r
#include <Library/BaseMemoryLib.h>\r
-#include <Library/ArmLib.h>\r
\r
#include <Protocol/Cpu.h>\r
\r
\r
\r
\r
-EFI_CPU_ARCH_PROTOCOL *gCpu;\r
-UINTN gCacheAlignment = 0;\r
+STATIC EFI_CPU_ARCH_PROTOCOL *mCpu;\r
\r
/**\r
Provides the DMA controller-specific addresses needed to access system memory.\r
return EFI_OUT_OF_RESOURCES;\r
}\r
\r
- *Mapping = Map;\r
-\r
- if ((((UINTN)HostAddress & (gCacheAlignment - 1)) != 0) ||\r
- ((*NumberOfBytes % gCacheAlignment) != 0)) {\r
+ if ((((UINTN)HostAddress & (mCpu->DmaBufferAlignment - 1)) != 0) ||\r
+ ((*NumberOfBytes & (mCpu->DmaBufferAlignment - 1)) != 0)) {\r
\r
// Get the cacheability of the region\r
Status = gDS->GetMemorySpaceDescriptor (*DeviceAddress, &GcdDescriptor);\r
if (EFI_ERROR(Status)) {\r
- return Status;\r
+ goto FreeMapInfo;\r
}\r
\r
// If the mapped buffer is not an uncached buffer\r
- if ( (GcdDescriptor.Attributes != EFI_MEMORY_WC) &&\r
- (GcdDescriptor.Attributes != EFI_MEMORY_UC) )\r
- {\r
+ if ((GcdDescriptor.Attributes & (EFI_MEMORY_WB | EFI_MEMORY_WT)) != 0) {\r
+ //\r
+ // Operations of type MapOperationBusMasterCommonBuffer are only allowed\r
+ // on uncached buffers.\r
+ //\r
+ if (Operation == MapOperationBusMasterCommonBuffer) {\r
+ DEBUG ((EFI_D_ERROR,\r
+ "%a: Operation type 'MapOperationBusMasterCommonBuffer' is only supported\n"\r
+ "on memory regions that were allocated using DmaAllocateBuffer ()\n",\r
+ __FUNCTION__));\r
+ Status = EFI_UNSUPPORTED;\r
+ goto FreeMapInfo;\r
+ }\r
+\r
//\r
// If the buffer does not fill entire cache lines we must double buffer into\r
// uncached memory. Device (PCI) address becomes uncached page.\r
Map->DoubleBuffer = TRUE;\r
Status = DmaAllocateBuffer (EfiBootServicesData, EFI_SIZE_TO_PAGES (*NumberOfBytes), &Buffer);\r
if (EFI_ERROR (Status)) {\r
- return Status;\r
+ goto FreeMapInfo;\r
}\r
\r
- if ((Operation == MapOperationBusMasterRead) || (Operation == MapOperationBusMasterCommonBuffer)) {\r
+ if (Operation == MapOperationBusMasterRead) {\r
CopyMem (Buffer, HostAddress, *NumberOfBytes);\r
}\r
\r
} else {\r
Map->DoubleBuffer = FALSE;\r
\r
- // Flush the Data Cache (should not have any effect if the memory region is uncached)\r
- gCpu->FlushDataCache (gCpu, *DeviceAddress, *NumberOfBytes, EfiCpuFlushTypeWriteBackInvalidate);\r
+ DEBUG_CODE_BEGIN ();\r
\r
- if ((Operation == MapOperationBusMasterRead) || (Operation == MapOperationBusMasterCommonBuffer)) {\r
- // In case the buffer is used for instance to send command to a PCI controller, we must ensure the memory is uncached\r
- Status = gDS->SetMemorySpaceAttributes (*DeviceAddress & ~(BASE_4KB - 1), ALIGN_VALUE (*NumberOfBytes, BASE_4KB), EFI_MEMORY_WC);\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
+ //\r
+ // The operation type check above only executes if the buffer happens to be\r
+ // misaligned with respect to CWG, but even if it is aligned, we should not\r
+ // allow arbitrary buffers to be used for creating consistent mappings.\r
+ // So duplicate the check here when running in DEBUG mode, just to assert\r
+ // that we are not trying to create a consistent mapping for cached memory.\r
+ //\r
+ Status = gDS->GetMemorySpaceDescriptor (*DeviceAddress, &GcdDescriptor);\r
+ ASSERT_EFI_ERROR(Status);\r
+\r
+ ASSERT (Operation != MapOperationBusMasterCommonBuffer ||\r
+ (GcdDescriptor.Attributes & (EFI_MEMORY_WB | EFI_MEMORY_WT)) == 0);\r
+\r
+ DEBUG_CODE_END ();\r
+\r
+ // Flush the Data Cache (should not have any effect if the memory region is uncached)\r
+ mCpu->FlushDataCache (mCpu, *DeviceAddress, *NumberOfBytes,\r
+ EfiCpuFlushTypeWriteBackInvalidate);\r
}\r
\r
Map->HostAddress = (UINTN)HostAddress;\r
Map->NumberOfBytes = *NumberOfBytes;\r
Map->Operation = Operation;\r
\r
+ *Mapping = Map;\r
+\r
return EFI_SUCCESS;\r
+\r
+FreeMapInfo:\r
+ FreePool (Map);\r
+\r
+ return Status;\r
}\r
\r
\r
\r
@retval EFI_SUCCESS The range was unmapped.\r
@retval EFI_DEVICE_ERROR The data was not committed to the target system memory.\r
+ @retval EFI_INVALID_PARAMETER An inconsistency was detected between the mapping type\r
+ and the DoubleBuffer field\r
\r
**/\r
EFI_STATUS\r
)\r
{\r
MAP_INFO_INSTANCE *Map;\r
+ EFI_STATUS Status;\r
\r
if (Mapping == NULL) {\r
ASSERT (FALSE);\r
\r
Map = (MAP_INFO_INSTANCE *)Mapping;\r
\r
+ Status = EFI_SUCCESS;\r
if (Map->DoubleBuffer) {\r
- if ((Map->Operation == MapOperationBusMasterWrite) || (Map->Operation == MapOperationBusMasterCommonBuffer)) {\r
+ ASSERT (Map->Operation != MapOperationBusMasterCommonBuffer);\r
+\r
+ if (Map->Operation == MapOperationBusMasterCommonBuffer) {\r
+ Status = EFI_INVALID_PARAMETER;\r
+ } else if (Map->Operation == MapOperationBusMasterWrite) {\r
CopyMem ((VOID *)(UINTN)Map->HostAddress, (VOID *)(UINTN)Map->DeviceAddress, Map->NumberOfBytes);\r
}\r
\r
//\r
// Make sure we read buffer from uncached memory and not the cache\r
//\r
- gCpu->FlushDataCache (gCpu, Map->HostAddress, Map->NumberOfBytes, EfiCpuFlushTypeInvalidate);\r
+ mCpu->FlushDataCache (mCpu, Map->HostAddress, Map->NumberOfBytes,\r
+ EfiCpuFlushTypeInvalidate);\r
}\r
}\r
\r
FreePool (Map);\r
\r
- return EFI_SUCCESS;\r
+ return Status;\r
}\r
\r
/**\r
OUT VOID **HostAddress\r
)\r
{\r
+ VOID *Allocation;\r
+\r
if (HostAddress == NULL) {\r
return EFI_INVALID_PARAMETER;\r
}\r
// We used uncached memory to keep coherency\r
//\r
if (MemoryType == EfiBootServicesData) {\r
- *HostAddress = UncachedAllocatePages (Pages);\r
+ Allocation = UncachedAllocatePages (Pages);\r
} else if (MemoryType == EfiRuntimeServicesData) {\r
- *HostAddress = UncachedAllocateRuntimePages (Pages);\r
+ Allocation = UncachedAllocateRuntimePages (Pages);\r
} else {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
+ if (Allocation == NULL) {\r
+ return EFI_OUT_OF_RESOURCES;\r
+ }\r
+\r
+ *HostAddress = Allocation;\r
+\r
return EFI_SUCCESS;\r
}\r
\r
EFI_STATUS Status;\r
\r
// Get the Cpu protocol for later use\r
- Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&gCpu);\r
+ Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&mCpu);\r
ASSERT_EFI_ERROR(Status);\r
\r
- gCacheAlignment = ArmDataCacheLineLength ();\r
-\r
return Status;\r
}\r
\r
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