#include <Library/UncachedMemoryAllocationLib.h>\r
#include <Library/IoLib.h>\r
#include <Library/BaseMemoryLib.h>\r
-#include <Library/ArmLib.h>\r
\r
#include <Protocol/Cpu.h>\r
\r
\r
\r
\r
-EFI_CPU_ARCH_PROTOCOL *gCpu;\r
-UINTN gCacheAlignment = 0;\r
+STATIC EFI_CPU_ARCH_PROTOCOL *mCpu;\r
\r
/**\r
Provides the DMA controller-specific addresses needed to access system memory.\r
return EFI_OUT_OF_RESOURCES;\r
}\r
\r
- if ((((UINTN)HostAddress & (gCacheAlignment - 1)) != 0) ||\r
- ((*NumberOfBytes & (gCacheAlignment - 1)) != 0)) {\r
+ if ((((UINTN)HostAddress & (mCpu->DmaBufferAlignment - 1)) != 0) ||\r
+ ((*NumberOfBytes & (mCpu->DmaBufferAlignment - 1)) != 0)) {\r
\r
// Get the cacheability of the region\r
Status = gDS->GetMemorySpaceDescriptor (*DeviceAddress, &GcdDescriptor);\r
DEBUG_CODE_END ();\r
\r
// Flush the Data Cache (should not have any effect if the memory region is uncached)\r
- gCpu->FlushDataCache (gCpu, *DeviceAddress, *NumberOfBytes, EfiCpuFlushTypeWriteBackInvalidate);\r
+ mCpu->FlushDataCache (mCpu, *DeviceAddress, *NumberOfBytes,\r
+ EfiCpuFlushTypeWriteBackInvalidate);\r
}\r
\r
Map->HostAddress = (UINTN)HostAddress;\r
//\r
// Make sure we read buffer from uncached memory and not the cache\r
//\r
- gCpu->FlushDataCache (gCpu, Map->HostAddress, Map->NumberOfBytes, EfiCpuFlushTypeInvalidate);\r
+ mCpu->FlushDataCache (mCpu, Map->HostAddress, Map->NumberOfBytes,\r
+ EfiCpuFlushTypeInvalidate);\r
}\r
}\r
\r
EFI_STATUS Status;\r
\r
// Get the Cpu protocol for later use\r
- Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&gCpu);\r
+ Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&mCpu);\r
ASSERT_EFI_ERROR(Status);\r
\r
- gCacheAlignment = ArmCacheWritebackGranule ();\r
-\r
return Status;\r
}\r
\r