ArmPkg/ArmExceptionLib: stack FPSR on common path

[mirror_edk2.git] / ArmPkg / Library / ArmExceptionLib / AArch64 / ExceptionSupport.S

diff --git a/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S b/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S
index c47974b81e8b4142af2acc444bc228e819419482..3117e710fa5320f56a2e10a4e9242f328c977fe0 100644 (file)
--- a/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S
+++ b/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S
@@ -286,26 +286,25 @@ ASM_PFX(CommonExceptionEntry):
   EL1_OR_EL2_OR_EL3(x1)\r
 1:mrs      x1, elr_el1   // Exception Link Register\r
   mrs      x2, spsr_el1  // Saved Processor Status Register 32bit\r
-  mrs      x3, fpsr      // Floating point Status Register  32bit\r
   mrs      x4, esr_el1   // EL1 Exception syndrome register 32bit\r
   mrs      x5, far_el1   // EL1 Fault Address Register\r
   b        4f\r
 \r
 2:mrs      x1, elr_el2   // Exception Link Register\r
   mrs      x2, spsr_el2  // Saved Processor Status Register 32bit\r
-  mrs      x3, fpsr      // Floating point Status Register  32bit\r
   mrs      x4, esr_el2   // EL2 Exception syndrome register 32bit\r
   mrs      x5, far_el2   // EL2 Fault Address Register\r
   b        4f\r
 \r
 3:mrs      x1, elr_el3   // Exception Link Register\r
   mrs      x2, spsr_el3  // Saved Processor Status Register 32bit\r
-  mrs      x3, fpsr      // Floating point Status Register  32bit\r
   mrs      x4, esr_el3   // EL3 Exception syndrome register 32bit\r
   mrs      x5, far_el3   // EL3 Fault Address Register\r
 \r
+4:mrs      x3, fpsr      // Floating point Status Register  32bit\r
+\r
   // Adjust SP to save next set\r
-4:add      sp, sp, #FP_CONTEXT_SIZE\r
+  add      sp, sp, #FP_CONTEXT_SIZE\r
 \r
   // Push FP regs to Stack.\r
   ALL_FP_REGS\r
@@ -357,22 +356,21 @@ ASM_PFX(CommonExceptionEntry):
   EL1_OR_EL2_OR_EL3(x6)\r
 1:msr      elr_el1, x1   // Exception Link Register\r
   msr      spsr_el1,x2   // Saved Processor Status Register 32bit\r
-  msr      fpsr, x3      // Floating point Status Register  32bit\r
   msr      esr_el1, x4   // EL1 Exception syndrome register 32bit\r
   msr      far_el1, x5   // EL1 Fault Address Register\r
   b        4f\r
 2:msr      elr_el2, x1   // Exception Link Register\r
   msr      spsr_el2,x2   // Saved Processor Status Register 32bit\r
-  msr      fpsr, x3      // Floating point Status Register  32bit\r
   msr      esr_el2, x4   // EL2 Exception syndrome register 32bit\r
   msr      far_el2, x5   // EL2 Fault Address Register\r
   b        4f\r
 3:msr      elr_el3, x1   // Exception Link Register\r
   msr      spsr_el3,x2   // Saved Processor Status Register 32bit\r
-  msr      fpsr, x3      // Floating point Status Register  32bit\r
   msr      esr_el3, x4   // EL3 Exception syndrome register 32bit\r
   msr      far_el3, x5   // EL3 Fault Address Register\r
-4:// pop all regs and return from exception.\r
+4:msr      fpsr, x3      // Floating point Status Register  32bit\r
+\r
+  // pop all regs and return from exception.\r
   sub     sp, sp, #(FP_CONTEXT_SIZE + SYS_CONTEXT_SIZE)\r
   ALL_GP_REGS\r
 \r