ArmPkg/ArmLib: ASSERT on set/way cache ops being used with MMU on

[mirror_edk2.git] / ArmPkg / Library / ArmLib / AArch64 / AArch64Lib.c

diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
index 924bf48020e0ec426b925239173adf01619d0901..3fbd591192e270131af594cca53f1babd7cb0489 100644 (file)
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
@@ -10,6 +10,7 @@
 #include <Base.h>\r
 \r
 #include <Library/ArmLib.h>\r
+#include <Library/DebugLib.h>\r
 \r
 #include <Chipset/AArch64.h>\r
 \r
@@ -41,6 +42,8 @@ ArmInvalidateDataCache (
   VOID\r
   )\r
 {\r
+  ASSERT (!ArmMmuEnabled ());\r
+\r
   ArmDataSynchronizationBarrier ();\r
   AArch64DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay);\r
 }\r
@@ -51,6 +54,8 @@ ArmCleanInvalidateDataCache (
   VOID\r
   )\r
 {\r
+  ASSERT (!ArmMmuEnabled ());\r
+\r
   ArmDataSynchronizationBarrier ();\r
   AArch64DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay);\r
 }\r
@@ -61,6 +66,8 @@ ArmCleanDataCache (
   VOID\r
   )\r
 {\r
+  ASSERT (!ArmMmuEnabled ());\r
+\r
   ArmDataSynchronizationBarrier ();\r
   AArch64DataCacheOperation (ArmCleanDataCacheEntryBySetWay);\r
 }\r