ArmPkg/ArmLib: Set again TCR after getting the Translation Table attributes

[mirror_edk2.git] / ArmPkg / Library / ArmLib / AArch64 / AArch64Mmu.c

diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c
index bababab880cb806c2cb0725ef531e3c94f1fc02c..f0d2bff1a3a465d3c82a9b2dba354207db4ab8e8 100644 (file)
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c
@@ -397,8 +397,11 @@ GetBlockEntryListFromAddress (
         BlockEntry = TranslationTable;\r
       }\r
     } else {\r
-      // Case of Invalid Entry and we are at a page level above of the one targetted.\r
       if (IndexLevel != PageLevel) {\r
+        //\r
+        // Case when we have an Invalid Entry and we are at a page level above of the one targetted.\r
+        //\r
+\r
         // Create a new translation table\r
         TranslationTable = (UINT64*)AllocatePages (EFI_SIZE_TO_PAGES((TT_ENTRY_COUNT * sizeof(UINT64)) + TT_ALIGNMENT_DESCRIPTION_TABLE));\r
         if (TranslationTable == NULL) {\r
@@ -412,6 +415,11 @@ GetBlockEntryListFromAddress (
         *BlockEntry = ((UINTN)TranslationTable & TT_ADDRESS_MASK_DESCRIPTION_TABLE) | TT_TYPE_TABLE_ENTRY;\r
         // Update the last block entry with the newly created translation table\r
         *LastBlockEntry = TT_LAST_BLOCK_ADDRESS(TranslationTable, TT_ENTRY_COUNT);\r
+      } else {\r
+        //\r
+        // Case when the new region is part of an existing page table\r
+        //\r
+        *LastBlockEntry = TT_LAST_BLOCK_ADDRESS(TranslationTable, TT_ENTRY_COUNT);\r
       }\r
     }\r
   }\r
@@ -531,8 +539,7 @@ ArmConfigureMmu (
   UINT64                        TCR;\r
   RETURN_STATUS                 Status;\r
 \r
-  if(MemoryTable == NULL)\r
-  {\r
+  if(MemoryTable == NULL) {\r
     ASSERT (MemoryTable != NULL);\r
     return RETURN_INVALID_PARAMETER;\r
   }\r
@@ -671,6 +678,9 @@ ArmConfigureMmu (
     goto FREE_TRANSLATION_TABLE;\r
   }\r
 \r
+  // Set again TCR after getting the Translation Table attributes\r
+  ArmSetTCR (TCR);\r
+\r
   ArmSetMAIR (MAIR_ATTR(TT_ATTR_INDX_DEVICE_MEMORY, MAIR_ATTR_DEVICE_MEMORY) |                      // mapped to EFI_MEMORY_UC\r
               MAIR_ATTR(TT_ATTR_INDX_MEMORY_NON_CACHEABLE, MAIR_ATTR_NORMAL_MEMORY_NON_CACHEABLE) | // mapped to EFI_MEMORY_WC\r
               MAIR_ATTR(TT_ATTR_INDX_MEMORY_WRITE_THROUGH, MAIR_ATTR_NORMAL_MEMORY_WRITE_THROUGH) | // mapped to EFI_MEMORY_WT\r