ArmPkg/ArmLib: AARCH64: set frame pointer in cache maintenance routine

[mirror_edk2.git] / ArmPkg / Library / ArmLib / AArch64 / AArch64Support.S

diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
index 5cee7c1519c3bc0a219005a3588eb7ee041a93d0..886c420962b538bac196c43655514aa69ea846a4 100644 (file)
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
@@ -273,7 +273,8 @@ ASM_FUNC(ArmDisableBranchPrediction)
 ASM_FUNC(AArch64AllDataCachesOperation)\r
 // We can use regs 0-7 and 9-15 without having to save/restore.\r
 // Save our link register on the stack. - The stack must always be quad-word aligned\r
 ASM_FUNC(AArch64AllDataCachesOperation)\r
 // We can use regs 0-7 and 9-15 without having to save/restore.\r
 // Save our link register on the stack. - The stack must always be quad-word aligned\r

-  str   x30, [sp, #-16]!\r
+  stp   x29, x30, [sp, #-16]!\r
+  mov   x29, sp\r

   mov   x1, x0                  // Save Function call in x1\r
   mrs   x6, clidr_el1           // Read EL1 CLIDR\r
   and   x3, x6, #0x7000000      // Mask out all but Level of Coherency (LoC)\r
   mov   x1, x0                  // Save Function call in x1\r
   mrs   x6, clidr_el1           // Read EL1 CLIDR\r
   and   x3, x6, #0x7000000      // Mask out all but Level of Coherency (LoC)\r


@@ -324,7 +325,7 @@ L_Skip:
 L_Finished:\r
   dsb   sy\r
   isb\r
 L_Finished:\r
   dsb   sy\r
   isb\r

-  ldr   x30, [sp], #0x10\r
+  ldp   x29, x30, [sp], #0x10\r

   ret\r
 \r
 \r
   ret\r
 \r
 \r