ArmPkg/ArmMmuLib AARCH64: get rid of needless TLB invalidation

[mirror_edk2.git] / ArmPkg / Library / ArmLib / AArch64 / ArmLibSupport.S

diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S
index 1ef2f61f5979013a63247eafb19b0e87f0d6d894..175fb58206b6652a24211bac859845fd9116a672 100644 (file)
--- a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S
+++ b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S
@@ -124,15 +124,15 @@ ASM_FUNC(ArmSetMAIR)
 //  IN VOID  *MVA                    // X1\r
 //  );\r
 ASM_FUNC(ArmUpdateTranslationTableEntry)\r
-   dc      civac, x0             // Clean and invalidate data line\r
-   dsb     sy\r
+   dsb     nshst\r
+   lsr     x1, x1, #12\r
    EL1_OR_EL2_OR_EL3(x0)\r
 1: tlbi    vaae1, x1             // TLB Invalidate VA , EL1\r
    b       4f\r
 2: tlbi    vae2, x1              // TLB Invalidate VA , EL2\r
    b       4f\r
 3: tlbi    vae3, x1              // TLB Invalidate VA , EL3\r
-4: dsb     sy\r
+4: dsb     nsh\r
    isb\r
    ret\r
 \r
@@ -196,4 +196,21 @@ ASM_FUNC(ArmWriteSctlr)
 3:msr   sctlr_el3, x0\r
 4:ret\r
 \r
+ASM_FUNC(ArmGetPhysicalAddressBits)\r
+  mrs   x0, id_aa64mmfr0_el1\r
+  adr   x1, .LPARanges\r
+  and   x0, x0, #0xf\r
+  ldrb  w0, [x1, x0]\r
+  ret\r
+\r
+//\r
+// Bits 0..3 of the AA64MFR0_EL1 system register encode the size of the\r
+// physical address space support on this CPU:\r
+// 0 == 32 bits, 1 == 36 bits, etc etc\r
+// 7 and up are reserved\r
+//\r
+.LPARanges:\r
+  .byte 32, 36, 40, 42, 44, 48, 52,  0\r
+  .byte  0,  0,  0,  0,  0,  0,  0,  0\r
+\r
 ASM_FUNCTION_REMOVE_IF_UNREFERENCED\r