-/** @file
-*
-* Copyright (c) 2011, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Uefi.h>
-#include <Chipset/ArmV7.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/ArmLib.h>
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include "ArmV7Lib.h"
-#include "ArmLibPrivate.h"
-#include <Library/ArmV7ArchTimerLib.h>
-
-VOID
-EFIAPI
-ArmArchTimerReadReg (
- IN ARM_ARCH_TIMER_REGS Reg,
- OUT VOID *DstBuf
- )
-{
- // Check if the Generic/Architecture timer is implemented
- if (ArmIsArchTimerImplemented ()) {
-
- switch (Reg) {
-
- case CntFrq:
- *((UINTN *)DstBuf) = ArmReadCntFrq ();
- break;
-
- case CntPct:
- *((UINT64 *)DstBuf) = ArmReadCntPct ();
- break;
-
- case CntkCtl:
- *((UINTN *)DstBuf) = ArmReadCntkCtl();
- break;
-
- case CntpTval:
- *((UINTN *)DstBuf) = ArmReadCntpTval ();
- break;
-
- case CntpCtl:
- *((UINTN *)DstBuf) = ArmReadCntpCtl ();
- break;
-
- case CntvTval:
- *((UINTN *)DstBuf) = ArmReadCntvTval ();
- break;
-
- case CntvCtl:
- *((UINTN *)DstBuf) = ArmReadCntvCtl ();
- break;
-
- case CntvCt:
- *((UINT64 *)DstBuf) = ArmReadCntvCt ();
- break;
-
- case CntpCval:
- *((UINT64 *)DstBuf) = ArmReadCntpCval ();
- break;
-
- case CntvCval:
- *((UINT64 *)DstBuf) = ArmReadCntvCval ();
- break;
-
- case CntvOff:
- *((UINT64 *)DstBuf) = ArmReadCntvOff ();
- break;
-
- case CnthCtl:
- case CnthpTval:
- case CnthpCtl:
- case CnthpCval:
- DEBUG ((EFI_D_ERROR, "The register is related to Hypervisor Mode. Can't perform requested operation\n "));
- break;
-
- default:
- DEBUG ((EFI_D_ERROR, "Unknown ARM Generic Timer register %x. \n ", Reg));
- }
- } else {
- DEBUG ((EFI_D_ERROR, "Attempt to read ARM Generic Timer registers. But ARM Generic Timer extension is not implemented \n "));
- ASSERT (0);
- }
-}
-
-VOID
-EFIAPI
-ArmArchTimerWriteReg (
- IN ARM_ARCH_TIMER_REGS Reg,
- IN VOID *SrcBuf
- )
-{
- // Check if the Generic/Architecture timer is implemented
- if (ArmIsArchTimerImplemented ()) {
-
- switch (Reg) {
-
- case CntFrq:
- ArmWriteCntFrq (*((UINTN *)SrcBuf));
- break;
-
- case CntPct:
- DEBUG ((EFI_D_ERROR, "Can't write to Read Only Register: CNTPCT \n"));
- break;
-
- case CntkCtl:
- ArmWriteCntkCtl (*((UINTN *)SrcBuf));
- break;
-
- case CntpTval:
- ArmWriteCntpTval (*((UINTN *)SrcBuf));
- break;
-
- case CntpCtl:
- ArmWriteCntpCtl (*((UINTN *)SrcBuf));
- break;
-
- case CntvTval:
- ArmWriteCntvTval (*((UINTN *)SrcBuf));
- break;
-
- case CntvCtl:
- ArmWriteCntvCtl (*((UINTN *)SrcBuf));
- break;
-
- case CntvCt:
- DEBUG ((EFI_D_ERROR, "Can't write to Read Only Register: CNTVCT \n"));
- break;
-
- case CntpCval:
- ArmWriteCntpCval (*((UINT64 *)SrcBuf) );
- break;
-
- case CntvCval:
- ArmWriteCntvCval (*((UINT64 *)SrcBuf) );
- break;
-
- case CntvOff:
- ArmWriteCntvOff (*((UINT64 *)SrcBuf));
- break;
-
- case CnthCtl:
- case CnthpTval:
- case CnthpCtl:
- case CnthpCval:
- DEBUG ((EFI_D_ERROR, "The register is related to Hypervisor Mode. Can't perform requested operation\n "));
- break;
-
- default:
- DEBUG ((EFI_D_ERROR, "Unknown ARM Generic Timer register %x. \n ", Reg));
- }
- } else {
- DEBUG ((EFI_D_ERROR, "Attempt to write to ARM Generic Timer registers. But ARM Generic Timer extension is not implemented \n "));
- ASSERT (0);
- }
-}
-
-VOID
-EFIAPI
-ArmArchTimerEnableTimer (
- VOID
- )
-{
- UINTN TimerCtrlReg;
-
- ArmArchTimerReadReg (CntpCtl, (VOID *)&TimerCtrlReg);
- TimerCtrlReg |= ARM_ARCH_TIMER_ENABLE;
- ArmArchTimerWriteReg (CntpCtl, (VOID *)&TimerCtrlReg);
-}
-
-VOID
-EFIAPI
-ArmArchTimerDisableTimer (
- VOID
- )
-{
- UINTN TimerCtrlReg;
-
- ArmArchTimerReadReg (CntpCtl, (VOID *)&TimerCtrlReg);
- TimerCtrlReg &= ~ARM_ARCH_TIMER_ENABLE;
- ArmArchTimerWriteReg (CntpCtl, (VOID *)&TimerCtrlReg);
-}
-
-VOID
-EFIAPI
-ArmArchTimerSetTimerFreq (
- IN UINTN FreqInHz
- )
-{
- ArmArchTimerWriteReg (CntFrq, (VOID *)&FreqInHz);
-}
-
-UINTN
-EFIAPI
-ArmArchTimerGetTimerFreq (
- VOID
- )
-{
- UINTN ArchTimerFreq = 0;
- ArmArchTimerReadReg (CntFrq, (VOID *)&ArchTimerFreq);
- return ArchTimerFreq;
-}
-
-UINTN
-EFIAPI
-ArmArchTimerGetTimerVal (
- VOID
- )
-{
- UINTN ArchTimerVal;
- ArmArchTimerReadReg (CntpTval, (VOID *)&ArchTimerVal);
- return ArchTimerVal;
-}
-
-
-VOID
-EFIAPI
-ArmArchTimerSetTimerVal (
- IN UINTN Val
- )
-{
- ArmArchTimerWriteReg (CntpTval, (VOID *)&Val);
-}
-
-UINT64
-EFIAPI
-ArmArchTimerGetSystemCount (
- VOID
- )
-{
- UINT64 SystemCount;
- ArmArchTimerReadReg (CntPct, (VOID *)&SystemCount);
- return SystemCount;
-}
-
-UINTN
-EFIAPI
-ArmArchTimerGetTimerCtrlReg (
- VOID
- )
-{
- UINTN Val;
- ArmArchTimerReadReg (CntpCtl, (VOID *)&Val);
- return Val;
-}
-
-VOID
-EFIAPI
-ArmArchTimerSetTimerCtrlReg (
- UINTN Val
- )
-{
- ArmArchTimerWriteReg (CntpCtl, (VOID *)&Val);
-}
-
-VOID
-EFIAPI
-ArmArchTimerSetCompareVal (
- IN UINT64 Val
- )
-{
- ArmArchTimerWriteReg (CntpCval, (VOID *)&Val);
-}
+/** @file\r
+*\r
+* Copyright (c) 2011, ARM Limited. All rights reserved.\r
+* \r
+* This program and the accompanying materials \r
+* are licensed and made available under the terms and conditions of the BSD License \r
+* which accompanies this distribution. The full text of the license may be found at \r
+* http://opensource.org/licenses/bsd-license.php \r
+*\r
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+*\r
+**/\r
+\r
+#include <Uefi.h> \r
+#include <Chipset/ArmV7.h>\r
+#include <Library/BaseMemoryLib.h>\r
+#include <Library/MemoryAllocationLib.h>\r
+#include <Library/ArmLib.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/DebugLib.h>\r
+#include "ArmV7Lib.h"\r
+#include "ArmLibPrivate.h"\r
+#include <Library/ArmV7ArchTimerLib.h>\r
+\r
+VOID\r
+EFIAPI\r
+ArmArchTimerReadReg (\r
+ IN ARM_ARCH_TIMER_REGS Reg,\r
+ OUT VOID *DstBuf\r
+ )\r
+{\r
+ // Check if the Generic/Architecture timer is implemented\r
+ if (ArmIsArchTimerImplemented ()) {\r
+\r
+ switch (Reg) {\r
+\r
+ case CntFrq:\r
+ *((UINTN *)DstBuf) = ArmReadCntFrq ();\r
+ break;\r
+\r
+ case CntPct:\r
+ *((UINT64 *)DstBuf) = ArmReadCntPct ();\r
+ break;\r
+\r
+ case CntkCtl:\r
+ *((UINTN *)DstBuf) = ArmReadCntkCtl();\r
+ break;\r
+\r
+ case CntpTval:\r
+ *((UINTN *)DstBuf) = ArmReadCntpTval ();\r
+ break;\r
+\r
+ case CntpCtl:\r
+ *((UINTN *)DstBuf) = ArmReadCntpCtl ();\r
+ break;\r
+\r
+ case CntvTval:\r
+ *((UINTN *)DstBuf) = ArmReadCntvTval ();\r
+ break;\r
+\r
+ case CntvCtl:\r
+ *((UINTN *)DstBuf) = ArmReadCntvCtl ();\r
+ break;\r
+\r
+ case CntvCt:\r
+ *((UINT64 *)DstBuf) = ArmReadCntvCt ();\r
+ break;\r
+\r
+ case CntpCval:\r
+ *((UINT64 *)DstBuf) = ArmReadCntpCval ();\r
+ break;\r
+\r
+ case CntvCval:\r
+ *((UINT64 *)DstBuf) = ArmReadCntvCval ();\r
+ break;\r
+\r
+ case CntvOff:\r
+ *((UINT64 *)DstBuf) = ArmReadCntvOff ();\r
+ break;\r
+\r
+ case CnthCtl:\r
+ case CnthpTval:\r
+ case CnthpCtl:\r
+ case CnthpCval:\r
+ DEBUG ((EFI_D_ERROR, "The register is related to Hypervisor Mode. Can't perform requested operation\n "));\r
+ break;\r
+\r
+ default:\r
+ DEBUG ((EFI_D_ERROR, "Unknown ARM Generic Timer register %x. \n ", Reg));\r
+ }\r
+ } else {\r
+ DEBUG ((EFI_D_ERROR, "Attempt to read ARM Generic Timer registers. But ARM Generic Timer extension is not implemented \n "));\r
+ ASSERT (0);\r
+ }\r
+}\r
+\r
+VOID\r
+EFIAPI\r
+ArmArchTimerWriteReg (\r
+ IN ARM_ARCH_TIMER_REGS Reg,\r
+ IN VOID *SrcBuf\r
+ )\r
+{\r
+ // Check if the Generic/Architecture timer is implemented\r
+ if (ArmIsArchTimerImplemented ()) {\r
+\r
+ switch (Reg) {\r
+\r
+ case CntFrq:\r
+ ArmWriteCntFrq (*((UINTN *)SrcBuf));\r
+ break;\r
+\r
+ case CntPct:\r
+ DEBUG ((EFI_D_ERROR, "Can't write to Read Only Register: CNTPCT \n"));\r
+ break;\r
+\r
+ case CntkCtl:\r
+ ArmWriteCntkCtl (*((UINTN *)SrcBuf));\r
+ break;\r
+\r
+ case CntpTval:\r
+ ArmWriteCntpTval (*((UINTN *)SrcBuf));\r
+ break;\r
+\r
+ case CntpCtl:\r
+ ArmWriteCntpCtl (*((UINTN *)SrcBuf));\r
+ break;\r
+\r
+ case CntvTval:\r
+ ArmWriteCntvTval (*((UINTN *)SrcBuf));\r
+ break;\r
+\r
+ case CntvCtl:\r
+ ArmWriteCntvCtl (*((UINTN *)SrcBuf));\r
+ break;\r
+\r
+ case CntvCt:\r
+ DEBUG ((EFI_D_ERROR, "Can't write to Read Only Register: CNTVCT \n"));\r
+ break;\r
+\r
+ case CntpCval:\r
+ ArmWriteCntpCval (*((UINT64 *)SrcBuf) );\r
+ break;\r
+\r
+ case CntvCval:\r
+ ArmWriteCntvCval (*((UINT64 *)SrcBuf) );\r
+ break;\r
+\r
+ case CntvOff:\r
+ ArmWriteCntvOff (*((UINT64 *)SrcBuf));\r
+ break;\r
+\r
+ case CnthCtl:\r
+ case CnthpTval:\r
+ case CnthpCtl:\r
+ case CnthpCval:\r
+ DEBUG ((EFI_D_ERROR, "The register is related to Hypervisor Mode. Can't perform requested operation\n "));\r
+ break;\r
+\r
+ default:\r
+ DEBUG ((EFI_D_ERROR, "Unknown ARM Generic Timer register %x. \n ", Reg));\r
+ }\r
+ } else {\r
+ DEBUG ((EFI_D_ERROR, "Attempt to write to ARM Generic Timer registers. But ARM Generic Timer extension is not implemented \n "));\r
+ ASSERT (0);\r
+ }\r
+}\r
+\r
+VOID\r
+EFIAPI\r
+ArmArchTimerEnableTimer (\r
+ VOID\r
+ )\r
+{\r
+ UINTN TimerCtrlReg;\r
+\r
+ ArmArchTimerReadReg (CntpCtl, (VOID *)&TimerCtrlReg);\r
+ TimerCtrlReg |= ARM_ARCH_TIMER_ENABLE;\r
+ ArmArchTimerWriteReg (CntpCtl, (VOID *)&TimerCtrlReg);\r
+}\r
+\r
+VOID\r
+EFIAPI\r
+ArmArchTimerDisableTimer (\r
+ VOID\r
+ )\r
+{\r
+ UINTN TimerCtrlReg;\r
+\r
+ ArmArchTimerReadReg (CntpCtl, (VOID *)&TimerCtrlReg);\r
+ TimerCtrlReg &= ~ARM_ARCH_TIMER_ENABLE;\r
+ ArmArchTimerWriteReg (CntpCtl, (VOID *)&TimerCtrlReg);\r
+}\r
+\r
+VOID\r
+EFIAPI\r
+ArmArchTimerSetTimerFreq (\r
+ IN UINTN FreqInHz\r
+ )\r
+{\r
+ ArmArchTimerWriteReg (CntFrq, (VOID *)&FreqInHz);\r
+}\r
+\r
+UINTN\r
+EFIAPI\r
+ArmArchTimerGetTimerFreq (\r
+ VOID\r
+ )\r
+{\r
+ UINTN ArchTimerFreq = 0;\r
+ ArmArchTimerReadReg (CntFrq, (VOID *)&ArchTimerFreq);\r
+ return ArchTimerFreq;\r
+}\r
+\r
+UINTN\r
+EFIAPI\r
+ArmArchTimerGetTimerVal (\r
+ VOID\r
+ )\r
+{\r
+ UINTN ArchTimerVal;\r
+ ArmArchTimerReadReg (CntpTval, (VOID *)&ArchTimerVal);\r
+ return ArchTimerVal;\r
+}\r
+\r
+\r
+VOID\r
+EFIAPI\r
+ArmArchTimerSetTimerVal (\r
+ IN UINTN Val\r
+ )\r
+{\r
+ ArmArchTimerWriteReg (CntpTval, (VOID *)&Val);\r
+}\r
+\r
+UINT64\r
+EFIAPI\r
+ArmArchTimerGetSystemCount (\r
+ VOID\r
+ )\r
+{\r
+ UINT64 SystemCount;\r
+ ArmArchTimerReadReg (CntPct, (VOID *)&SystemCount);\r
+ return SystemCount;\r
+}\r
+\r
+UINTN\r
+EFIAPI\r
+ArmArchTimerGetTimerCtrlReg (\r
+ VOID\r
+ )\r
+{\r
+ UINTN Val;\r
+ ArmArchTimerReadReg (CntpCtl, (VOID *)&Val);\r
+ return Val;\r
+}\r
+\r
+VOID\r
+EFIAPI\r
+ArmArchTimerSetTimerCtrlReg (\r
+ UINTN Val\r
+ )\r
+{\r
+ ArmArchTimerWriteReg (CntpCtl, (VOID *)&Val);\r
+}\r
+\r
+VOID\r
+EFIAPI\r
+ArmArchTimerSetCompareVal (\r
+ IN UINT64 Val\r
+ )\r
+{\r
+ ArmArchTimerWriteReg (CntpCval, (VOID *)&Val);\r
+}\r
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