ArmPkg/ArmLib: Improved ArmConfigureMmu Performance

[mirror_edk2.git] / ArmPkg / Library / ArmLib / ArmV7 / ArmV7Mmu.c

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
index 0f8b814c63b288dfb5c69256e01907e3fb4bcd3c..1a5d98202279230312650fa003611efc4a6275e5 100644 (file)
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
@@ -23,6 +23,24 @@
 #include "ArmV7Lib.h"\r
 #include "ArmLibPrivate.h"\r
 \r
+UINT32\r
+ConvertSectionAttributesToPageAttributes (\r
+  IN UINT32   SectionAttributes,\r
+  IN BOOLEAN  IsLargePage\r
+  )\r
+{\r
+  UINT32 PageAttributes;\r
+\r
+  PageAttributes = 0;\r
+  PageAttributes |= TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY (SectionAttributes, IsLargePage);\r
+  PageAttributes |= TT_DESCRIPTOR_CONVERT_TO_PAGE_AP (SectionAttributes);\r
+  PageAttributes |= TT_DESCRIPTOR_CONVERT_TO_PAGE_XN (SectionAttributes, IsLargePage);\r
+  PageAttributes |= TT_DESCRIPTOR_CONVERT_TO_PAGE_NG (SectionAttributes);\r
+  PageAttributes |= TT_DESCRIPTOR_CONVERT_TO_PAGE_S (SectionAttributes);\r
+\r
+  return PageAttributes;\r
+}\r
+\r
 STATIC\r
 VOID\r
 PopulateLevel2PageTable (\r
@@ -76,12 +94,7 @@ PopulateLevel2PageTable (
       TranslationTable = ((UINTN)TranslationTable + TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK;\r
 \r
       // Translate the Section Descriptor into Page Descriptor\r
-      SectionDescriptor = TT_DESCRIPTOR_PAGE_TYPE_PAGE;\r
-      SectionDescriptor |= TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(*SectionEntry,0);\r
-      SectionDescriptor |= TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(*SectionEntry);\r
-      SectionDescriptor |= TT_DESCRIPTOR_CONVERT_TO_PAGE_XN(*SectionEntry,0);\r
-      SectionDescriptor |= TT_DESCRIPTOR_CONVERT_TO_PAGE_NG(*SectionEntry);\r
-      SectionDescriptor |= TT_DESCRIPTOR_CONVERT_TO_PAGE_S(*SectionEntry);\r
+      SectionDescriptor = TT_DESCRIPTOR_PAGE_TYPE_PAGE | ConvertSectionAttributesToPageAttributes (*SectionEntry, FALSE);\r
 \r
       BaseSectionAddress = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(*SectionEntry);\r
 \r
@@ -225,18 +238,6 @@ ArmConfigureMmu (
 \r
   ZeroMem (TranslationTable, TRANSLATION_TABLE_SECTION_SIZE);\r
 \r
-  ArmCleanInvalidateDataCache ();\r
-  ArmInvalidateInstructionCache ();\r
-\r
-  ArmDisableDataCache ();\r
-  ArmDisableInstructionCache();\r
-  // TLBs are also invalidated when calling ArmDisableMmu()\r
-  ArmDisableMmu ();\r
-\r
-  // Make sure nothing sneaked into the cache\r
-  ArmCleanInvalidateDataCache ();\r
-  ArmInvalidateInstructionCache ();\r
-\r
   // By default, mark the translation table as belonging to a uncached region\r
   TranslationTableAttribute = ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED;\r
   while (MemoryTable->Length != 0) {\r
@@ -264,6 +265,18 @@ ArmConfigureMmu (
     return RETURN_UNSUPPORTED;\r
   }\r
 \r
+  ArmCleanInvalidateDataCache ();\r
+  ArmInvalidateInstructionCache ();\r
+\r
+  ArmDisableDataCache ();\r
+  ArmDisableInstructionCache();\r
+  // TLBs are also invalidated when calling ArmDisableMmu()\r
+  ArmDisableMmu ();\r
+\r
+  // Make sure nothing sneaked into the cache\r
+  ArmCleanInvalidateDataCache ();\r
+  ArmInvalidateInstructionCache ();\r
+\r
   ArmSetTTBR0 ((VOID *)(UINTN)(((UINTN)TranslationTable & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) | (TTBRAttributes & 0x7F)));\r
     \r
   ArmSetDomainAccessControl (DOMAIN_ACCESS_CONTROL_NONE(15) |\r