ArmPkg/ArmLib: Clean ArmV7Lib

[mirror_edk2.git] / ArmPkg / Library / ArmLib / ArmV7 / ArmV7Mmu.c

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
index 3ba66d62bfdc605ea04d529f7ff0c8a44d078c35..f57e48b3a5ad32c42de0a73e4caad65dbecff2c6 100644 (file)
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
@@ -29,7 +29,8 @@ PopulateLevel2PageTable (
   IN UINT32                         PhysicalBase,\r
   IN UINT32                         RemainLength,\r
   IN ARM_MEMORY_REGION_ATTRIBUTES   Attributes\r
-  ) {\r
+  )\r
+{\r
   UINT32* PageEntry;\r
   UINT32  Pages;\r
   UINT32  Index;\r
@@ -173,14 +174,14 @@ FillTranslationTable (
         PhysicalBase += TT_DESCRIPTOR_SECTION_SIZE;\r
       } else {\r
         // Case: Physical address aligned on the Section Size (1MB) && the length does not fill a section\r
-        PopulateLevel2PageTable(SectionEntry++,PhysicalBase,RemainLength,MemoryRegion->Attributes);\r
+        PopulateLevel2PageTable (SectionEntry++, PhysicalBase, RemainLength, MemoryRegion->Attributes);\r
 \r
         // It must be the last entry\r
         break;\r
       }\r
     } else {\r
       // Case: Physical address NOT aligned on the Section Size (1MB)\r
-      PopulateLevel2PageTable(SectionEntry++,PhysicalBase,RemainLength,MemoryRegion->Attributes);\r
+      PopulateLevel2PageTable (SectionEntry++, PhysicalBase, RemainLength, MemoryRegion->Attributes);\r
       // Aligned the address\r
       PhysicalBase = (PhysicalBase + TT_DESCRIPTOR_SECTION_SIZE) & ~(TT_DESCRIPTOR_SECTION_SIZE-1);\r
 \r
@@ -206,7 +207,7 @@ ArmConfigureMmu (
   UINT32                        TTBRAttributes;\r
 \r
   // Allocate pages for translation table.\r
-  TranslationTable = (UINTN)AllocatePages(EFI_SIZE_TO_PAGES(TRANSLATION_TABLE_SECTION_SIZE + TRANSLATION_TABLE_SECTION_ALIGNMENT));\r
+  TranslationTable = (UINTN)AllocatePages (EFI_SIZE_TO_PAGES(TRANSLATION_TABLE_SECTION_SIZE + TRANSLATION_TABLE_SECTION_ALIGNMENT));\r
   TranslationTable = ((UINTN)TranslationTable + TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK;\r
 \r
   if (TranslationTableBase != NULL) {\r
@@ -219,17 +220,17 @@ ArmConfigureMmu (
 \r
   ZeroMem ((VOID *)TranslationTable, TRANSLATION_TABLE_SECTION_SIZE);\r
 \r
-  ArmCleanInvalidateDataCache();\r
-  ArmInvalidateInstructionCache();\r
-  ArmInvalidateTlb();\r
+  ArmCleanInvalidateDataCache ();\r
+  ArmInvalidateInstructionCache ();\r
+  ArmInvalidateTlb ();\r
 \r
-  ArmDisableDataCache();\r
+  ArmDisableDataCache ();\r
   ArmDisableInstructionCache();\r
-  ArmDisableMmu();\r
+  ArmDisableMmu ();\r
 \r
   // Make sure nothing sneaked into the cache\r
-  ArmCleanInvalidateDataCache();\r
-  ArmInvalidateInstructionCache();\r
+  ArmCleanInvalidateDataCache ();\r
+  ArmInvalidateInstructionCache ();\r
 \r
   TranslationTableAttribute = (ARM_MEMORY_REGION_ATTRIBUTES)0;\r
   while (MemoryTable->Length != 0) {\r