ASM_PFX(ArmWriteAuxCr):\r
EL1_OR_EL2(x1)\r
1:msr actlr_el1, x0 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3\r
- b 3f\r
+ ret\r
2:msr actlr_el2, x0 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3\r
-3:ret\r
+ ret\r
\r
ASM_PFX(ArmReadAuxCr):\r
EL1_OR_EL2(x1)\r
1:mrs x0, actlr_el1 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3\r
- b 3f\r
+ ret\r
2:mrs x0, actlr_el2 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3\r
-3:ret\r
+ ret\r
\r
ASM_PFX(ArmSetTTBR0):\r
EL1_OR_EL2_OR_EL3(x1)\r
ret\r
\r
ASM_PFX(ArmWriteMVBar):\r
- msr vbar_el3, x0 // Excpetion Vector Base address for Monitor on EL3\r
+ msr vbar_el3, x0 // Exception Vector Base address for Monitor on EL3\r
ret\r
\r
ASM_PFX(ArmCallWFE):\r