Added FIQ interrupt primatives. Update exception handler to disable/reenable FIQ...

[mirror_edk2.git] / ArmPkg / Library / ArmLib / Common / ArmLibSupport.asm

diff --git a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm
index 630c72fdeeb7de56782963d05301b07532951111..ca8d980b0d71520dfdb8e3404a50eacbbfdcfbbd 100644 (file)
--- a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm
+++ b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm
@@ -18,6 +18,9 @@
     EXPORT  ArmEnableInterrupts
     EXPORT  ArmDisableInterrupts
     EXPORT  ArmGetInterruptState
+    EXPORT  ArmEnableFiq
+    EXPORT  ArmDisableFiq
+    EXPORT  ArmGetFiqState
     EXPORT  ArmInvalidateTlb
     EXPORT  ArmSetTranslationTableBaseAddress
     EXPORT  ArmGetTranslationTableBaseAddress
@@ -56,6 +59,28 @@ ArmGetInterruptState
        moveq   R0,#1
        movne   R0,#0
        bx      LR
+
+ArmEnableFiq
+       mrs     R0,CPSR
+       bic     R0,R0,#0x40             ;Enable IRQ interrupts
+       msr     CPSR_c,R0
+       bx      LR
+
+ArmDisableFiq
+       mrs     R0,CPSR
+       orr     R1,R0,#0x40             ;Disable IRQ interrupts
+       msr     CPSR_c,R1
+  tst     R0,#0x40
+  moveq   R0,#1
+  movne   R0,#0
+       bx      LR
+
+ArmGetFiqState
+       mrs     R0,CPSR
+       tst     R0,#0x40            ;Check if IRQ is enabled.
+       moveq   R0,#1
+       movne   R0,#0
+       bx      LR
   
 ArmInvalidateTlb
   mov     r0,#0